Add aarch64-sighandler-regs.exp test
Add Aarch64 test to check register values of a previous frame can be shown correctly across a signal. gdb/testsuite/ChangeLog: * gdb.arch/aarch64-sighandler-regs.c: New test. * gdb.arch/aarch64-sighandler-regs.exp: New file. * lib/gdb.exp (skip_aarch64_sve_tests): New proc.
This commit is contained in:
Alan Hayward
parent
05c71722fc
commit
6bb8890e2c
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@ -1,3 +1,9 @@
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2018-10-01 Alan Hayward <alan.hayward@arm.com>
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* gdb.arch/aarch64-sighandler-regs.c: New test.
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* gdb.arch/aarch64-sighandler-regs.exp: New file.
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* lib/gdb.exp (skip_aarch64_sve_tests): New proc.
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2018-10-01 Markus Metzger <markus.t.metzger@intel.com>
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* lib/gdb.exp (is_amd64_regs_target): Change assembly to C inline
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@ -0,0 +1,187 @@
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/* This file is part of GDB, the GNU debugger.
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Copyright 2018 Free Software Foundation, Inc.
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This program is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 3 of the License, or
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(at your option) any later version.
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This program is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this program. If not, see <http://www.gnu.org/licenses/>. */
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#include <signal.h>
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#include <unistd.h>
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#include <stdlib.h>
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#define OVERWRITE_GP_REGS \
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"ldr x1, [x0]\n\t" \
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"ldr x2, [x0]\n\t" \
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"ldr x3, [x0]\n\t" \
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"ldr x4, [x0]\n\t" \
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"ldr x5, [x0]\n\t" \
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"ldr x6, [x0]\n\t" \
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"ldr x7, [x0]\n\t" \
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"ldr x8, [x0]\n\t" \
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"ldr x9, [x0]\n\t" \
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"ldr x10, [x0]\n\t" \
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"ldr x11, [x0]\n\t" \
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"ldr x12, [x0]\n\t" \
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"ldr x13, [x0]\n\t" \
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"ldr x14, [x0]\n\t" \
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"ldr x15, [x0]\n\t" \
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"ldr x16, [x0]\n\t" \
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"ldr x17, [x0]\n\t" \
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"ldr x18, [x0]\n\t" \
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"ldr x19, [x0]\n\t" \
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"ldr x20, [x0]\n\t" \
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"ldr x21, [x0]\n\t" \
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"ldr x22, [x0]\n\t" \
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"ldr x23, [x0]\n\t" \
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"ldr x24, [x0]\n\t" \
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"ldr x25, [x0]\n\t" \
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"ldr x26, [x0]\n\t" \
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"ldr x27, [x0]\n\t" \
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"ldr x28, [x0]\n\t"
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#ifdef SVE
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#define OVERWRITE_FP_REGS \
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"ptrue p3.s\n\t" \
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"ld1w z0.s, p3/z, [x0]\n\t" \
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"ld1w z1.s, p3/z, [x0]\n\t" \
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"ld1w z2.s, p3/z, [x0]\n\t" \
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"ld1w z3.s, p3/z, [x0]\n\t" \
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"ld1w z4.s, p3/z, [x0]\n\t" \
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"ld1w z5.s, p3/z, [x0]\n\t" \
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"ld1w z6.s, p3/z, [x0]\n\t" \
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"ld1w z7.s, p3/z, [x0]\n\t" \
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"ld1w z8.s, p3/z, [x0]\n\t" \
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"ld1w z9.s, p3/z, [x0]\n\t" \
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"ld1w z10.s, p3/z, [x0]\n\t" \
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"ld1w z11.s, p3/z, [x0]\n\t" \
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"ld1w z12.s, p3/z, [x0]\n\t" \
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"ld1w z13.s, p3/z, [x0]\n\t" \
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"ld1w z14.s, p3/z, [x0]\n\t" \
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"ld1w z15.s, p3/z, [x0]\n\t" \
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"ld1w z16.s, p3/z, [x0]\n\t" \
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"ld1w z17.s, p3/z, [x0]\n\t" \
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"ld1w z18.s, p3/z, [x0]\n\t" \
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"ld1w z19.s, p3/z, [x0]\n\t" \
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"ld1w z20.s, p3/z, [x0]\n\t" \
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"ld1w z21.s, p3/z, [x0]\n\t" \
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"ld1w z22.s, p3/z, [x0]\n\t" \
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"ld1w z23.s, p3/z, [x0]\n\t" \
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"ld1w z24.s, p3/z, [x0]\n\t" \
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"ld1w z25.s, p3/z, [x0]\n\t" \
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"ld1w z26.s, p3/z, [x0]\n\t" \
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"ld1w z27.s, p3/z, [x0]\n\t" \
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"ld1w z28.s, p3/z, [x0]\n\t" \
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"ld1w z29.s, p3/z, [x0]\n\t" \
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"ld1w z30.s, p3/z, [x0]\n\t" \
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"ld1w z31.s, p3/z, [x0]\n\t"
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#else
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#define OVERWRITE_FP_REGS \
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"ldr q0, [x0]\n\t" \
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"ldr q1, [x0]\n\t" \
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"ldr q2, [x0]\n\t" \
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"ldr q3, [x0]\n\t" \
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"ldr q4, [x0]\n\t" \
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"ldr q5, [x0]\n\t" \
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"ldr q6, [x0]\n\t" \
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"ldr q7, [x0]\n\t" \
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"ldr q8, [x0]\n\t" \
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"ldr q9, [x0]\n\t" \
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"ldr q10, [x0]\n\t" \
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"ldr q11, [x0]\n\t" \
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"ldr q12, [x0]\n\t" \
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"ldr q13, [x0]\n\t" \
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"ldr q14, [x0]\n\t" \
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"ldr q15, [x0]\n\t" \
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"ldr q16, [x0]\n\t" \
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"ldr q17, [x0]\n\t" \
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"ldr q18, [x0]\n\t" \
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"ldr q19, [x0]\n\t" \
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"ldr q20, [x0]\n\t" \
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"ldr q21, [x0]\n\t" \
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"ldr q22, [x0]\n\t" \
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"ldr q23, [x0]\n\t" \
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"ldr q24, [x0]\n\t" \
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"ldr q25, [x0]\n\t" \
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"ldr q26, [x0]\n\t" \
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"ldr q27, [x0]\n\t" \
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"ldr q28, [x0]\n\t" \
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"ldr q29, [x0]\n\t" \
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"ldr q30, [x0]\n\t" \
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"ldr q31, [x0]\n\t"
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#endif
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#ifdef SVE
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#define OVERWRITE_P_REGS(pattern) \
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"ptrue p0.s, " #pattern "\n\t" \
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"ptrue p1.s, " #pattern "\n\t" \
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"ptrue p2.s, " #pattern "\n\t" \
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"ptrue p3.s, " #pattern "\n\t" \
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"ptrue p4.s, " #pattern "\n\t" \
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"ptrue p5.s, " #pattern "\n\t" \
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"ptrue p6.s, " #pattern "\n\t" \
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"ptrue p7.s, " #pattern "\n\t" \
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"ptrue p8.s, " #pattern "\n\t" \
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"ptrue p9.s, " #pattern "\n\t" \
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"ptrue p10.s, " #pattern "\n\t" \
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"ptrue p11.s, " #pattern "\n\t" \
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"ptrue p12.s, " #pattern "\n\t" \
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"ptrue p13.s, " #pattern "\n\t" \
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"ptrue p14.s, " #pattern "\n\t" \
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"ptrue p15.s, " #pattern "\n\t"
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#else
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#define OVERWRITE_P_REGS(pattern)
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#endif
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void
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handler (int sig)
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{
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char buf_handler[] = {0x50, 0x51, 0x52, 0x53, 0x54, 0x55, 0x56, 0x57,
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0x58, 0x59, 0x5a, 0x5b, 0x5c, 0x5d, 0x5e, 0x5f};
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__asm __volatile ("mov x0, %0\n\t" \
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OVERWRITE_GP_REGS \
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OVERWRITE_FP_REGS \
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OVERWRITE_P_REGS(MUL3) \
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: : "r" (buf_handler));
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exit(0);
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}
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int
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main ()
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{
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/* Ensure all the signals aren't blocked. */
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sigset_t newset;
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sigemptyset (&newset);
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sigprocmask (SIG_SETMASK, &newset, NULL);
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signal (SIGILL, handler);
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char buf_main[] = {0x10, 0x11, 0x12, 0x13, 0x14, 0x15, 0x16, 0x17,
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0x18, 0x19, 0x1a, 0x1b, 0x1c, 0x1d, 0x1e, 0x1f};
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/* 0x06000000 : Cause an illegal instruction. Value undefined as per ARM
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Architecture Reference Manual ARMv8, Section C4.1. */
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__asm __volatile ("mov x0, %0\n\t" \
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OVERWRITE_GP_REGS \
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OVERWRITE_FP_REGS \
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OVERWRITE_P_REGS(VL1) \
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".inst 0x06000000"
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: : "r" (buf_main));
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return 0;
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}
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@ -0,0 +1,149 @@
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# Copyright 2018 Free Software Foundation, Inc.
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#
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# This program is free software; you can redistribute it and/or modify
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# it under the terms of the GNU General Public License as published by
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# the Free Software Foundation; either version 3 of the License, or
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# (at your option) any later version.
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#
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# This program is distributed in the hope that it will be useful,
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# but WITHOUT ANY WARRANTY; without even the implied warranty of
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# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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# GNU General Public License for more details.
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#
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# You should have received a copy of the GNU General Public License
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# along with this program. If not, see <http://www.gnu.org/licenses/>.
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#
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# This file is part of the gdb testsuite.
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if {![is_aarch64_target]} {
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verbose "Skipping ${gdb_test_file_name}."
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return -1
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}
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set compile_flags {debug}
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if { [skip_aarch64_sve_tests] } {
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unsupported "target does not support SVE"
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set sve_hw 0
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} else {
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set sve_hw 1
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lappend compile_flags "additional_flags=-DSVE"
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}
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standard_testfile
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if { [prepare_for_testing "failed to prepare" ${testfile} ${srcfile} ${compile_flags}] } {
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return -1
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}
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if ![runto_main] {
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untested "could not run to main"
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return -1
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}
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set endianness [get_endianness]
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if {$endianness == "little"} {
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set reg_handler_value_128 "0x5f5e5d5c5b5a59585756555453525150"
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set reg_handler_value_64 "0x5756555453525150"
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set reg_handler_value_32 "0x53525150"
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set reg_handler_value_16 "0x5150"
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set reg_handler_value_8 "0x50"
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set reg_main_value_128 "0x1f1e1d1c1b1a19181716151413121110"
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set reg_main_value_64 "0x1716151413121110"
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set reg_main_value_32 "0x13121110"
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set reg_main_value_16 "0x1110"
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set reg_main_value_8 "0x10"
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} else {
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set reg_handler_value_128 "0x505152535455565758595a5b5c5d5e5f"
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set reg_handler_value_64 "0x5051525354555657"
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set reg_handler_value_32 "0x50515253"
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set reg_handler_value_16 "0x5051"
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set reg_handler_value_8 "0x50"
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set reg_main_value_128 "0x101112131415161718191a1b1c1d1e1f"
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set reg_main_value_64 "0x1011121314151617"
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set reg_main_value_32 "0x10111213"
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set reg_main_value_16 "0x1011"
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set reg_main_value_8 "0x10"
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}
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set zreg_handler_value "\\{0x5756555453525150, .*"
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set zreg_main_value "\\{0x1716151413121110, .*"
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set preg_handler_value "\\{0x11, .*"
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set preg_main_value "\\{0x1, 0x0, .*"
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#Ignore x0, and x29 to x31
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set xreg_nums [list 1 2 3 4 5 6 7 8 9 11 12 13 14 15 16 17 18 19 21 22 23 24 \
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25 26 27 28 ]
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set vreg_nums [list 0 1 2 3 4 5 6 7 8 9 11 12 13 14 15 16 17 18 19 21 22 23 \
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24 25 26 27 28 29 30 31]
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set preg_nums [list 0 1 2 3 4 5 6 7 8 9 11 12 13 14 15]
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proc check_regs {regtype regnums value postfix} {
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foreach regnum $regnums {
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gdb_test "print /x \$$regtype$regnum$postfix" \
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".* = {?$value}?" \
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"check register \$$regtype$regnum has value $value"
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}
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}
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# Run until end of signal handler
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gdb_test "continue" \
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"Continuing.*Program received signal SIGILL.*" \
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"continue until signal"
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gdb_breakpoint [gdb_get_line_number "exit(0)"]
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gdb_continue_to_breakpoint "exit" ".*exit.*"
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set handlerframe [get_current_frame_number]
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set mainframe [expr $handlerframe + 2]
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# Check register values
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check_regs x $xreg_nums $reg_handler_value_64 ""
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check_regs v $vreg_nums $reg_handler_value_128 ".q.u"
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check_regs q $vreg_nums $reg_handler_value_128 ".u"
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check_regs d $vreg_nums $reg_handler_value_64 ".u"
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check_regs s $vreg_nums $reg_handler_value_32 ".u"
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check_regs h $vreg_nums $reg_handler_value_16 ".u"
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check_regs b $vreg_nums $reg_handler_value_8 ".u"
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if { $sve_hw } {
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check_regs z $vreg_nums $zreg_handler_value ".d.u"
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check_regs p $preg_nums $preg_handler_value ""
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}
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# Switch to the frame for main(), and check register values
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gdb_test "frame $mainframe" \
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"#$mainframe.*in main ().*" \
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"set to main frame"
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check_regs x $xreg_nums $reg_main_value_64 ""
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check_regs v $vreg_nums $reg_main_value_128 ".q.u"
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check_regs q $vreg_nums $reg_main_value_128 ".u"
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check_regs d $vreg_nums $reg_main_value_64 ".u"
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check_regs s $vreg_nums $reg_main_value_32 ".u"
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check_regs h $vreg_nums $reg_main_value_16 ".u"
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check_regs b $vreg_nums $reg_main_value_8 ".u"
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if { $sve_hw } {
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check_regs z $vreg_nums $zreg_main_value ".d.u"
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check_regs p $preg_nums $preg_main_value ""
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}
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# Switch back to the signal handler frame, and check register values
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gdb_test "frame $handlerframe" \
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"#$handlerframe.*handler \\\(sig=4\\\).*" \
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"set to signal handler frame"
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check_regs x $xreg_nums $reg_handler_value_64 ""
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check_regs v $vreg_nums $reg_handler_value_128 ".q.u"
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check_regs q $vreg_nums $reg_handler_value_128 ".u"
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check_regs d $vreg_nums $reg_handler_value_64 ".u"
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check_regs s $vreg_nums $reg_handler_value_32 ".u"
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check_regs h $vreg_nums $reg_handler_value_16 ".u"
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check_regs b $vreg_nums $reg_handler_value_8 ".u"
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if { $sve_hw } {
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check_regs z $vreg_nums $zreg_handler_value ".d.u"
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check_regs p $preg_nums $preg_handler_value ""
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}
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@ -2825,6 +2825,56 @@ gdb_caching_proc skip_btrace_pt_tests {
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return $skip_btrace_tests
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}
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# Run a test on the target to see if it supports Aarch64 SVE hardware.
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# Return 0 if so, 1 if it does not. Note this causes a restart of GDB.
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gdb_caching_proc skip_aarch64_sve_tests {
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global srcdir subdir gdb_prompt inferior_exited_re
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set me "skip_aarch64_sve_tests"
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if { ![is_aarch64_target]} {
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return 1
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}
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set compile_flags "{additional_flags=-march=armv8-a+sve}"
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# Compile a test program containing SVE instructions.
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set src {
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int main() {
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asm volatile ("ptrue p0.b");
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return 0;
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}
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}
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if {![gdb_simple_compile $me $src executable $compile_flags]} {
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return 1
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}
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# Compilation succeeded so now run it via gdb.
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clean_restart $obj
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gdb_run_cmd
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gdb_expect {
|
||||
-re ".*Illegal instruction.*${gdb_prompt} $" {
|
||||
verbose -log "\n$me sve hardware not detected"
|
||||
set skip_sve_tests 1
|
||||
}
|
||||
-re ".*$inferior_exited_re normally.*${gdb_prompt} $" {
|
||||
verbose -log "\n$me: sve hardware detected"
|
||||
set skip_sve_tests 0
|
||||
}
|
||||
default {
|
||||
warning "\n$me: default case taken"
|
||||
set skip_sve_tests 1
|
||||
}
|
||||
}
|
||||
gdb_exit
|
||||
remote_file build delete $obj
|
||||
|
||||
verbose "$me: returning $skip_sve_tests" 2
|
||||
return $skip_sve_tests
|
||||
}
|
||||
|
||||
|
||||
# A helper that compiles a test case to see if __int128 is supported.
|
||||
proc gdb_int128_helper {lang} {
|
||||
return [gdb_can_simple_compile "i128-for-$lang" {
|
||||
|
|
|
|||
Loading…
Reference in New Issue