gas/
2009-09-14 H.J. Lu <hongjiu.lu@intel.com> PR gas/10637 * config/tc-i386-intel.c (intel_state): Add has_offset. (i386_intel_simplify): Set intel_state.has_offset to 1 for O_offset. (i386_intel_operand): Turn on intel_state.is_mem if intel_state.has_offset is 0 and the last char is ']'. gas/testsuite/ 2009-09-14 H.J. Lu <hongjiu.lu@intel.com> PR gas/10637 * gas/i386/disp.s: Add tests for Intel syntax. * gas/i386/x86-64-disp.s: Likewise. * gas/i386/disp.d: Updated. * gas/i386/intelok.d: Likewise. * gas/i386/x86-64-disp.d: Likewise. * gas/i386/disp-intel.d: New. * gas/i386/x86-64-disp-intel.d: Likewise. * gas/i386/i386.exp: Run disp-intel and x86-64-disp-intel.
This commit is contained in:
H.J. Lu
parent
41dcd03ff7
commit
6cee4cdae4
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@ -1,3 +1,12 @@
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2009-09-14 H.J. Lu <hongjiu.lu@intel.com>
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PR gas/10637
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* config/tc-i386-intel.c (intel_state): Add has_offset.
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(i386_intel_simplify): Set intel_state.has_offset to 1 for
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O_offset.
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(i386_intel_operand): Turn on intel_state.is_mem if
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intel_state.has_offset is 0 and the last char is ']'.
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2009-09-14 H.J. Lu <hongjiu.lu@intel.com>
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PR gas/10636
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@ -23,6 +23,7 @@ static struct
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{
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operatorT op_modifier; /* Operand modifier. */
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int is_mem; /* 1 if operand is memory reference. */
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int has_offset; /* 1 if operand has offset. */
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unsigned int in_offset; /* >=1 if processing operand of offset. */
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unsigned int in_bracket; /* >=1 if processing operand in brackets. */
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unsigned int in_scale; /* >=1 if processing multipication operand
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@ -279,6 +280,7 @@ static int i386_intel_simplify (expressionS *e)
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break;
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case O_offset:
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intel_state.has_offset = 1;
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++intel_state.in_offset;
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ret = i386_intel_simplify_symbol (e->X_add_symbol);
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--intel_state.in_offset;
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@ -497,6 +499,10 @@ i386_intel_operand (char *operand_string, int got_a_float)
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as_bad (_("invalid expression"));
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ret = 0;
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}
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else if (!intel_state.has_offset
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&& input_line_pointer > buf
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&& *(input_line_pointer - 1) == ']')
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intel_state.is_mem |= 1;
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input_line_pointer = saved_input_line_pointer;
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free (buf);
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@ -1,3 +1,18 @@
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2009-09-14 H.J. Lu <hongjiu.lu@intel.com>
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PR gas/10637
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* gas/i386/disp.s: Add tests for Intel syntax.
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* gas/i386/x86-64-disp.s: Likewise.
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* gas/i386/disp.d: Updated.
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* gas/i386/intelok.d: Likewise.
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* gas/i386/x86-64-disp.d: Likewise.
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* gas/i386/disp-intel.d: New.
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* gas/i386/x86-64-disp-intel.d: Likewise.
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* gas/i386/i386.exp: Run disp-intel and x86-64-disp-intel.
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2009-09-14 H.J. Lu <hongjiu.lu@intel.com>
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* gas/i386/merom.[ds]: Renamed to ...
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@ -0,0 +1,43 @@
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#source: disp.s
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#objdump: -dw -Mintel
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#name: i386 displacement (Intel mode)
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.*: +file format .*
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Disassembly of section .text:
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0+ <.text>:
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[ ]*[a-f0-9]+: 8b 98 ff ff ff 7f mov ebx,DWORD PTR \[eax\+0x7fffffff\]
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[ ]*[a-f0-9]+: 8b 98 00 00 00 80 mov ebx,DWORD PTR \[eax-0x80000000\]
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[ ]*[a-f0-9]+: 8b 98 00 00 00 80 mov ebx,DWORD PTR \[eax-0x80000000\]
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[ ]*[a-f0-9]+: 8b 1d ff ff ff 7f mov ebx,DWORD PTR ds:0x7fffffff
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[ ]*[a-f0-9]+: 8b 1d 00 00 00 80 mov ebx,DWORD PTR ds:0x80000000
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[ ]*[a-f0-9]+: 8b 1d 00 00 00 80 mov ebx,DWORD PTR ds:0x80000000
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[ ]*[a-f0-9]+: a1 ff ff ff 7f mov eax,ds:0x7fffffff
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[ ]*[a-f0-9]+: a1 00 00 00 80 mov eax,ds:0x80000000
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[ ]*[a-f0-9]+: a1 00 00 00 80 mov eax,ds:0x80000000
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[ ]*[a-f0-9]+: 89 98 f0 00 e0 0e mov DWORD PTR \[eax\+0xee000f0\],ebx
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[ ]*[a-f0-9]+: 89 98 f0 00 e0 0e mov DWORD PTR \[eax\+0xee000f0\],ebx
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[ ]*[a-f0-9]+: 65 89 98 f0 00 e0 0e mov DWORD PTR gs:\[eax\+0xee000f0\],ebx
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[ ]*[a-f0-9]+: 65 89 98 f0 00 e0 0e mov DWORD PTR gs:\[eax\+0xee000f0\],ebx
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[ ]*[a-f0-9]+: 89 1d f0 00 e0 0e mov DWORD PTR ds:0xee000f0,ebx
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[ ]*[a-f0-9]+: 65 89 1d f0 00 e0 0e mov DWORD PTR gs:0xee000f0,ebx
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[ ]*[a-f0-9]+: 89 1d f0 00 e0 fe mov DWORD PTR ds:0xfee000f0,ebx
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[ ]*[a-f0-9]+: 65 89 1d f0 00 e0 fe mov DWORD PTR gs:0xfee000f0,ebx
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[ ]*[a-f0-9]+: a3 f0 00 e0 0e mov ds:0xee000f0,eax
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[ ]*[a-f0-9]+: 65 a3 f0 00 e0 0e mov gs:0xee000f0,eax
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[ ]*[a-f0-9]+: a3 f0 00 e0 fe mov ds:0xfee000f0,eax
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[ ]*[a-f0-9]+: 65 a3 f0 00 e0 fe mov gs:0xfee000f0,eax
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[ ]*[a-f0-9]+: 65 8b 1d f0 00 e0 0e mov ebx,DWORD PTR gs:0xee000f0
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[ ]*[a-f0-9]+: 8b 1d f0 00 e0 0e mov ebx,DWORD PTR ds:0xee000f0
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[ ]*[a-f0-9]+: 8b 1d f0 00 e0 0e mov ebx,DWORD PTR ds:0xee000f0
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[ ]*[a-f0-9]+: 65 8b 1d f0 00 e0 fe mov ebx,DWORD PTR gs:0xfee000f0
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[ ]*[a-f0-9]+: 8b 1d f0 00 e0 fe mov ebx,DWORD PTR ds:0xfee000f0
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[ ]*[a-f0-9]+: 8b 1d f0 00 e0 fe mov ebx,DWORD PTR ds:0xfee000f0
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[ ]*[a-f0-9]+: 65 a1 f0 00 e0 0e mov eax,gs:0xee000f0
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[ ]*[a-f0-9]+: a1 f0 00 e0 0e mov eax,ds:0xee000f0
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[ ]*[a-f0-9]+: a1 f0 00 e0 0e mov eax,ds:0xee000f0
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[ ]*[a-f0-9]+: 65 a1 f0 00 e0 fe mov eax,gs:0xfee000f0
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[ ]*[a-f0-9]+: a1 f0 00 e0 fe mov eax,ds:0xfee000f0
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[ ]*[a-f0-9]+: a1 f0 00 e0 fe mov eax,ds:0xfee000f0
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#pass
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@ -16,4 +16,28 @@ Disassembly of section .text:
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[ ]*[a-f0-9]+: a1 ff ff ff 7f mov 0x7fffffff,%eax
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[ ]*[a-f0-9]+: a1 00 00 00 80 mov 0x80000000,%eax
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[ ]*[a-f0-9]+: a1 00 00 00 80 mov 0x80000000,%eax
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[ ]*[a-f0-9]+: 89 98 f0 00 e0 0e mov %ebx,0xee000f0\(%eax\)
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[ ]*[a-f0-9]+: 89 98 f0 00 e0 0e mov %ebx,0xee000f0\(%eax\)
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[ ]*[a-f0-9]+: 65 89 98 f0 00 e0 0e mov %ebx,%gs:0xee000f0\(%eax\)
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[ ]*[a-f0-9]+: 65 89 98 f0 00 e0 0e mov %ebx,%gs:0xee000f0\(%eax\)
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[ ]*[a-f0-9]+: 89 1d f0 00 e0 0e mov %ebx,0xee000f0
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[ ]*[a-f0-9]+: 65 89 1d f0 00 e0 0e mov %ebx,%gs:0xee000f0
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[ ]*[a-f0-9]+: 89 1d f0 00 e0 fe mov %ebx,0xfee000f0
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[ ]*[a-f0-9]+: 65 89 1d f0 00 e0 fe mov %ebx,%gs:0xfee000f0
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[ ]*[a-f0-9]+: a3 f0 00 e0 0e mov %eax,0xee000f0
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[ ]*[a-f0-9]+: 65 a3 f0 00 e0 0e mov %eax,%gs:0xee000f0
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[ ]*[a-f0-9]+: a3 f0 00 e0 fe mov %eax,0xfee000f0
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[ ]*[a-f0-9]+: 65 a3 f0 00 e0 fe mov %eax,%gs:0xfee000f0
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[ ]*[a-f0-9]+: 65 8b 1d f0 00 e0 0e mov %gs:0xee000f0,%ebx
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[ ]*[a-f0-9]+: 8b 1d f0 00 e0 0e mov 0xee000f0,%ebx
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[ ]*[a-f0-9]+: 8b 1d f0 00 e0 0e mov 0xee000f0,%ebx
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[ ]*[a-f0-9]+: 65 8b 1d f0 00 e0 fe mov %gs:0xfee000f0,%ebx
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[ ]*[a-f0-9]+: 8b 1d f0 00 e0 fe mov 0xfee000f0,%ebx
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[ ]*[a-f0-9]+: 8b 1d f0 00 e0 fe mov 0xfee000f0,%ebx
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[ ]*[a-f0-9]+: 65 a1 f0 00 e0 0e mov %gs:0xee000f0,%eax
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[ ]*[a-f0-9]+: a1 f0 00 e0 0e mov 0xee000f0,%eax
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[ ]*[a-f0-9]+: a1 f0 00 e0 0e mov 0xee000f0,%eax
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[ ]*[a-f0-9]+: 65 a1 f0 00 e0 fe mov %gs:0xfee000f0,%eax
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[ ]*[a-f0-9]+: a1 f0 00 e0 fe mov 0xfee000f0,%eax
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[ ]*[a-f0-9]+: a1 f0 00 e0 fe mov 0xfee000f0,%eax
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#pass
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@ -8,3 +8,33 @@
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mov 0x7fffffff,%eax
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mov 0x80000000,%eax
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mov -0x80000000,%eax
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.intel_syntax noprefix
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mov DWORD PTR [eax+0xEE000F0], ebx
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mov [eax+0xEE000F0], ebx
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mov DWORD PTR gs:[eax+0xEE000F0], ebx
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mov gs:[eax+0xEE000F0], ebx
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mov DWORD PTR [0xEE000F0], ebx
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mov DWORD PTR gs:0xEE000F0, ebx
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mov DWORD PTR [0xFEE000F0], ebx
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mov DWORD PTR gs:0xFEE000F0, ebx
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mov DWORD PTR [0xEE000F0], eax
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mov DWORD PTR gs:0xEE000F0, eax
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mov DWORD PTR [0xFEE000F0], eax
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mov DWORD PTR gs:0xFEE000F0, eax
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mov ebx, DWORD PTR gs:0xEE000F0
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mov ebx, DWORD PTR [0xEE000F0]
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mov ebx, [0xEE000F0]
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mov ebx, DWORD PTR gs:0xFEE000F0
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mov ebx, DWORD PTR [0xFEE000F0]
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mov ebx, [0xFEE000F0]
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mov eax, DWORD PTR gs:0xEE000F0
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mov eax, DWORD PTR [0xEE000F0]
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mov eax, [0xEE000F0]
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mov eax, DWORD PTR gs:0xFEE000F0
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mov eax, DWORD PTR [0xFEE000F0]
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mov eax, [0xFEE000F0]
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@ -48,6 +48,7 @@ if [expr ([istarget "i*86-*-*"] || [istarget "x86_64-*-*"]) && [gas_32_check]]
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run_dump_test "sib"
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run_dump_test "sib-intel"
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run_dump_test "disp"
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run_dump_test "disp-intel"
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run_dump_test "vmx"
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run_dump_test "smx"
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run_dump_test "suffix"
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@ -282,6 +283,7 @@ if [expr ([istarget "i*86-*-*"] || [istarget "x86_64-*-*"]) && [gas_64_check]] t
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run_dump_test "x86-64-sib"
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run_dump_test "x86-64-sib-intel"
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run_dump_test "x86-64-disp"
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run_dump_test "x86-64-disp-intel"
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if { ![istarget "*-*-mingw*"] } then {
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run_dump_test "x86-64-opcode-inval"
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run_dump_test "x86-64-opcode-inval-intel"
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@ -169,9 +169,9 @@ Disassembly of section .text:
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[ ]*[0-9a-f]+: 6a 03[ ]+push[ ]+0x3
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[ ]*[0-9a-f]+: 6a 04[ ]+push[ ]+0x4
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[ ]*[0-9a-f]+: b8 01 00 00 00[ ]+mov[ ]+eax,(0x)?1
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[ ]*[0-9a-f]+: a1 01 00 00 00[ ]+mov[ ]+eax,ds:(0x)?1
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[ ]*[0-9a-f]+: b8 01 00 00 00[ ]+mov[ ]+eax,(0x)?1
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[ ]*[0-9a-f]+: b8 01 00 00 00[ ]+mov[ ]+eax,(0x)?1
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[ ]*[0-9a-f]+: b8 01 00 00 00[ ]+mov[ ]+eax,(0x)?1
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[ ]*[0-9a-f]+: a1 01 00 00 00[ ]+mov[ ]+eax,ds:(0x)?1
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[ ]*[0-9a-f]+: b8 00 00 00 00[ ]+mov[ ]+eax,(0x)?0
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[ ]*[0-9a-f]+: b8 00 00 00 00[ ]+mov[ ]+eax,(0x)?0
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[ ]*[0-9a-f]+: b8 00 00 00 00[ ]+mov[ ]+eax,(0x)?0
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@ -0,0 +1,39 @@
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#source: x86-64-disp.s
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#as: -J
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#objdump: -dw -Mintel
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#name: x86-64 displacement (Intel mode)
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.*: +file format .*
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Disassembly of section .text:
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0+ <.text>:
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[ ]*[a-f0-9]+: 8b 98 ff ff ff 7f mov ebx,DWORD PTR \[rax\+0x7fffffff\]
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[ ]*[a-f0-9]+: 8b 98 00 00 00 80 mov ebx,DWORD PTR \[rax-0x80000000\]
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[ ]*[a-f0-9]+: 8b 1c 25 00 00 00 80 mov ebx,DWORD PTR ds:0xffffffff80000000
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[ ]*[a-f0-9]+: 8b 1c 25 00 00 00 80 mov ebx,DWORD PTR ds:0xffffffff80000000
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[ ]*[a-f0-9]+: 8b 1c 25 ff ff ff 7f mov ebx,DWORD PTR ds:0x7fffffff
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[ ]*[a-f0-9]+: 8b 04 25 00 00 00 80 mov eax,DWORD PTR ds:0xffffffff80000000
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[ ]*[a-f0-9]+: 8b 04 25 00 00 00 80 mov eax,DWORD PTR ds:0xffffffff80000000
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[ ]*[a-f0-9]+: 8b 04 25 ff ff ff 7f mov eax,DWORD PTR ds:0x7fffffff
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[ ]*[a-f0-9]+: a1 00 00 00 80 00 00 00 00 mov eax,ds:0x80000000
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[ ]*[a-f0-9]+: 89 98 f0 00 e0 0e mov DWORD PTR \[rax\+0xee000f0\],ebx
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[ ]*[a-f0-9]+: 89 98 f0 00 e0 0e mov DWORD PTR \[rax\+0xee000f0\],ebx
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[ ]*[a-f0-9]+: 65 89 98 f0 00 e0 0e mov DWORD PTR gs:\[rax\+0xee000f0\],ebx
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[ ]*[a-f0-9]+: 65 89 98 f0 00 e0 0e mov DWORD PTR gs:\[rax\+0xee000f0\],ebx
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[ ]*[a-f0-9]+: 89 1c 25 f0 00 e0 0e mov DWORD PTR ds:0xee000f0,ebx
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[ ]*[a-f0-9]+: 65 89 1c 25 f0 00 e0 0e mov DWORD PTR gs:0xee000f0,ebx
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[ ]*[a-f0-9]+: 89 04 25 f0 00 e0 0e mov DWORD PTR ds:0xee000f0,eax
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[ ]*[a-f0-9]+: 65 89 04 25 f0 00 e0 0e mov DWORD PTR gs:0xee000f0,eax
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[ ]*[a-f0-9]+: a3 f0 00 e0 fe 00 00 00 00 mov ds:0xfee000f0,eax
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[ ]*[a-f0-9]+: 65 a3 f0 00 e0 fe 00 00 00 00 mov gs:0xfee000f0,eax
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[ ]*[a-f0-9]+: 65 8b 1c 25 f0 00 e0 0e mov ebx,DWORD PTR gs:0xee000f0
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[ ]*[a-f0-9]+: 8b 1c 25 f0 00 e0 0e mov ebx,DWORD PTR ds:0xee000f0
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[ ]*[a-f0-9]+: 8b 1c 25 f0 00 e0 0e mov ebx,DWORD PTR ds:0xee000f0
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[ ]*[a-f0-9]+: 65 8b 04 25 f0 00 e0 0e mov eax,DWORD PTR gs:0xee000f0
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[ ]*[a-f0-9]+: 8b 04 25 f0 00 e0 0e mov eax,DWORD PTR ds:0xee000f0
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[ ]*[a-f0-9]+: 8b 04 25 f0 00 e0 0e mov eax,DWORD PTR ds:0xee000f0
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[ ]*[a-f0-9]+: 65 a1 f0 00 e0 fe 00 00 00 00 mov eax,gs:0xfee000f0
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[ ]*[a-f0-9]+: a1 f0 00 e0 fe 00 00 00 00 mov eax,ds:0xfee000f0
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[ ]*[a-f0-9]+: a1 f0 00 e0 fe 00 00 00 00 mov eax,ds:0xfee000f0
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#pass
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@ -16,4 +16,23 @@ Disassembly of section .text:
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[ ]*[a-f0-9]+: 8b 04 25 00 00 00 80 mov 0xffffffff80000000,%eax
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[ ]*[a-f0-9]+: 8b 04 25 ff ff ff 7f mov 0x7fffffff,%eax
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[ ]*[a-f0-9]+: a1 00 00 00 80 00 00 00 00 mov 0x80000000,%eax
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[ ]*[a-f0-9]+: 89 98 f0 00 e0 0e mov %ebx,0xee000f0\(%rax\)
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[ ]*[a-f0-9]+: 89 98 f0 00 e0 0e mov %ebx,0xee000f0\(%rax\)
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[ ]*[a-f0-9]+: 65 89 98 f0 00 e0 0e mov %ebx,%gs:0xee000f0\(%rax\)
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[ ]*[a-f0-9]+: 65 89 98 f0 00 e0 0e mov %ebx,%gs:0xee000f0\(%rax\)
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[ ]*[a-f0-9]+: 89 1c 25 f0 00 e0 0e mov %ebx,0xee000f0
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[ ]*[a-f0-9]+: 65 89 1c 25 f0 00 e0 0e mov %ebx,%gs:0xee000f0
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[ ]*[a-f0-9]+: 89 04 25 f0 00 e0 0e mov %eax,0xee000f0
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[ ]*[a-f0-9]+: 65 89 04 25 f0 00 e0 0e mov %eax,%gs:0xee000f0
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[ ]*[a-f0-9]+: a3 f0 00 e0 fe 00 00 00 00 mov %eax,0xfee000f0
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[ ]*[a-f0-9]+: 65 a3 f0 00 e0 fe 00 00 00 00 mov %eax,%gs:0xfee000f0
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[ ]*[a-f0-9]+: 65 8b 1c 25 f0 00 e0 0e mov %gs:0xee000f0,%ebx
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[ ]*[a-f0-9]+: 8b 1c 25 f0 00 e0 0e mov 0xee000f0,%ebx
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[ ]*[a-f0-9]+: 8b 1c 25 f0 00 e0 0e mov 0xee000f0,%ebx
|
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[ ]*[a-f0-9]+: 65 8b 04 25 f0 00 e0 0e mov %gs:0xee000f0,%eax
|
||||
[ ]*[a-f0-9]+: 8b 04 25 f0 00 e0 0e mov 0xee000f0,%eax
|
||||
[ ]*[a-f0-9]+: 8b 04 25 f0 00 e0 0e mov 0xee000f0,%eax
|
||||
[ ]*[a-f0-9]+: 65 a1 f0 00 e0 fe 00 00 00 00 mov %gs:0xfee000f0,%eax
|
||||
[ ]*[a-f0-9]+: a1 f0 00 e0 fe 00 00 00 00 mov 0xfee000f0,%eax
|
||||
[ ]*[a-f0-9]+: a1 f0 00 e0 fe 00 00 00 00 mov 0xfee000f0,%eax
|
||||
#pass
|
||||
|
|
|
|||
|
|
@ -1,3 +1,4 @@
|
|||
.text
|
||||
mov 0x7fffffff(%rax),%ebx
|
||||
mov -0x80000000(%rax),%ebx
|
||||
mov -0x80000000,%ebx
|
||||
|
|
@ -7,3 +8,28 @@
|
|||
mov 0xffffffff80000000,%eax
|
||||
mov 0x7fffffff,%eax
|
||||
mov 0x80000000,%eax
|
||||
|
||||
.intel_syntax noprefix
|
||||
mov DWORD PTR [rax+0xEE000F0], ebx
|
||||
mov [rax+0xEE000F0], ebx
|
||||
mov DWORD PTR gs:[rax+0xEE000F0], ebx
|
||||
mov gs:[rax+0xEE000F0], ebx
|
||||
|
||||
mov DWORD PTR [0xEE000F0], ebx
|
||||
mov DWORD PTR gs:0xEE000F0, ebx
|
||||
|
||||
mov DWORD PTR [0xEE000F0], eax
|
||||
mov DWORD PTR gs:0xEE000F0, eax
|
||||
mov DWORD PTR [0xFEE000F0], eax
|
||||
mov DWORD PTR gs:0xFEE000F0, eax
|
||||
|
||||
mov ebx, DWORD PTR gs:0xEE000F0
|
||||
mov ebx, DWORD PTR [0xEE000F0]
|
||||
mov ebx, [0xEE000F0]
|
||||
|
||||
mov eax, DWORD PTR gs:0xEE000F0
|
||||
mov eax, DWORD PTR [0xEE000F0]
|
||||
mov eax, [0xEE000F0]
|
||||
mov eax, DWORD PTR gs:0xFEE000F0
|
||||
mov eax, DWORD PTR [0xFEE000F0]
|
||||
mov eax, [0xFEE000F0]
|
||||
|
|
|
|||
Loading…
Reference in New Issue