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2013-02-11 Kyrylo Tkachov <kyrylo.tkachov@arm.com> 

* arm-dis.c: Update strht pattern.

	* gas/arm/archv6t2.s: Add strht and ldrht tests.
	* gas/arm/archv6t2.d: Add disassembly patterns for the above.
This commit is contained in:
Richard Earnshaw 2013-02-11 10:15:52 +00:00
parent 9f7c3e5e99
commit 6fe6ded97b
5 changed files with 35 additions and 2 deletions
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5
gas/testsuite/ChangeLog
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@ -1,3 +1,8 @@
2013-02-11 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
* gas/arm/archv6t2.s: Add strht and ldrht tests.
* gas/arm/archv6t2.d: Add disassembly patterns for the above.
2013-02-09 Jürgen Urban <JuergenUrban@gmx.de>
* gas/mips/24k-triple-stores-2.d, gas/mips/24k-triple-stores-2.s,

12
gas/testsuite/gas/arm/archv6t2.d
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@ -49,3 +49,15 @@ Disassembly of section .text:
0+a4 <[^>]+> e03090b9 ldrht r9, \[r0\], -r9
0+a8 <[^>]+> e0f099b9 ldrht r9, \[r0\], #153.*
0+ac <[^>]+> e07099b9 ldrht r9, \[r0\], #-153.*
0+b0 <[^>]+> 10b090b9 ldrhtne r9, \[r0\], r9
0+b4 <[^>]+> 103090b9 ldrhtne r9, \[r0\], -r9
0+b8 <[^>]+> 10f099b9 ldrhtne r9, \[r0\], #153 ; 0x99
0+bc <[^>]+> 107099b9 ldrhtne r9, \[r0\], #-153 ; 0xffffff67
0+c0 <[^>]+> e02100b2 strht r0, \[r1\], -r2
0+c4 <[^>]+> 102100b2 strhtne r0, \[r1\], -r2
0+c8 <[^>]+> e0a100b2 strht r0, \[r1\], r2
0+cc <[^>]+> 10a100b2 strhtne r0, \[r1\], r2
0+d0 <[^>]+> e0e100b2 strht r0, \[r1\], #2
0+d4 <[^>]+> e06100b2 strht r0, \[r1\], #-2
0+d8 <[^>]+> 10e100b2 strhtne r0, \[r1\], #2
0+dc <[^>]+> 106100b2 strhtne r0, \[r1\], #-2

12
gas/testsuite/gas/arm/archv6t2.s
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@ -53,3 +53,15 @@ x:
ldrht r9, [r0], -r9
ldrht r9, [r0], #0x99
ldrht r9, [r0], #-0x99
ldrneht r9, [r0], r9
ldrneht r9, [r0], -r9
ldrneht r9, [r0], #0x99
ldrneht r9, [r0], #-0x99
strht r0, [r1], -r2
strneht r0, [r1], -r2
strht r0, [r1], r2
strneht r0, [r1], r2
strht r0, [r1], #2
strht r0, [r1], #-2
strneht r0, [r1], #2
strneht r0, [r1], #-2

4
opcodes/ChangeLog
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@ -1,3 +1,7 @@
2013-02-11 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
* arm-dis.c: Update strht pattern.
2013-02-09 Jürgen Urban <JuergenUrban@gmx.de>
* mips-opc.c (mips_builtin_opcodes): Enable l.d and s.d macros for

4
opcodes/arm-dis.c
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@ -928,8 +928,8 @@ static const struct opcode32 arm_opcodes[] =
{ARM_EXT_V6T2, 0x07c0001f, 0x0fe0007f, "bfc%c\t%12-15R, %E"},
{ARM_EXT_V6T2, 0x07c00010, 0x0fe00070, "bfi%c\t%12-15R, %0-3r, %E"},
{ARM_EXT_V6T2, 0x00600090, 0x0ff000f0, "mls%c\t%16-19R, %0-3R, %8-11R, %12-15R"},
{ARM_EXT_V6T2, 0x006000b0, 0x0f7000f0, "strht%c\t%12-15R, %S"},
{ARM_EXT_V6T2, 0x002000b0, 0x0f3000f0, "strht%c\t%12-15R, %S"},
{ARM_EXT_V6T2, 0x00300090, 0x0f3000f0, UNDEFINED_INSTRUCTION },
{ARM_EXT_V6T2, 0x00300090, 0x0f300090, "ldr%6's%5?hbt%c\t%12-15R, %S"},