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[AArch64][7/8] GAS support BFD_RELOC_AARCH64_TLSLD_ADD_DTPREL_LO12 

2015-08-11  Jiong Wang  <jiong.wang@arm.com>

include/elf/
  * aarch64.h (R_AARCH64_P32_TLSLD_ADD_DTPREL_LO12): Define.

bfd/
  * reloc.c (BFD_RELOC_AARCH64_TLSLD_ADD_DTPREL_LO12): New entry.
  * bfd-in2.h: Regenerate.
  * libbfd.h: Regenerate.
  * elfnn-aarch64.c (elfNN_aarch64_howto_table): New entry for
  BFD_RELOC_AARCH64_TLSLD_ADD_DTPREL_LO12.

gas/
  * config/tc-aarch64.c (reloc_table): New relocation modifiers
  "dtprel_lo12".
  (md_apply_fix): Support BFD_RELOC_AARCH64_TLSLD_ADD_DTPREL_LO12.
  (aarch64_force_relocation): Likewise.

gas/testsuite/
  * gas/aarch64/reloc-dtprel_lo12-1.s: New testcase.
  * gas/aarch64/reloc-dtprel_lo12-ilp32-1.s: Likewise.
  * gas/aarch64/reloc-dtprel_lo12-1.d: New expectation file.
  * gas/aarch64/reloc-dtprel_lo12-ilp32-1.d: Likewise.
This commit is contained in:
Jiong Wang 2015-08-11 17:38:49 +01:00
parent 73f925cc20
commit 70151fb54a
14 changed files with 90 additions and 0 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

8
bfd/ChangeLog
View File

@ -1,3 +1,11 @@
2015-08-11 Jiong Wang <jiong.wang@arm.com>
* reloc.c (BFD_RELOC_AARCH64_TLSLD_ADD_DTPREL_LO12): New entry.
* bfd-in2.h: Regenerate.
* libbfd.h: Regenerate.
* elfnn-aarch64.c (elfNN_aarch64_howto_table): New entry for
BFD_RELOC_AARCH64_TLSLD_ADD_DTPREL_LO12.
2015-08-11 Jiong Wang <jiong.wang@arm.com>
* elfnn-aarch64.c (IS_AARCH64_TLS_RELOC): Recognize

3
bfd/bfd-in2.h
View File

@ -5794,6 +5794,9 @@ BFD_RELOC_AARCH64_TLSGD_ADR_PAGE21. */
/* AArch64 TLS INITIAL EXEC relocation. */
BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_PREL19,
/* Unsigned 12 bit byte offset to module TLS base address. */
BFD_RELOC_AARCH64_TLSLD_ADD_DTPREL_LO12,
/* Unsigned 12 bit byte offset to global offset table entry for a symbols
tls_index structure. Used in conjunction with
BFD_RELOC_AARCH64_TLSLD_ADR_PAGE21. */

15
bfd/elfnn-aarch64.c
View File

@ -1027,6 +1027,21 @@ static reloc_howto_type elfNN_aarch64_howto_table[] =
0x1ffffc, /* dst_mask */
FALSE), /* pcrel_offset */
/* Unsigned 12 bit byte offset to module TLS base address. */
HOWTO (AARCH64_R (TLSLD_ADD_DTPREL_LO12), /* type */
0, /* rightshift */
2, /* size (0 = byte, 1 = short, 2 = long) */
12, /* bitsize */
FALSE, /* pc_relative */
0, /* bitpos */
complain_overflow_unsigned, /* complain_on_overflow */
bfd_elf_generic_reloc, /* special_function */
AARCH64_R_STR (TLSLD_ADD_DTPREL_LO12), /* name */
FALSE, /* partial_inplace */
0xfff, /* src_mask */
0xfff, /* dst_mask */
FALSE), /* pcrel_offset */
/* ADD: GOT offset G(S) & 0xff8 [no overflow check] */
HOWTO (AARCH64_R (TLSLD_ADD_LO12_NC), /* type */
0, /* rightshift */

1
bfd/libbfd.h
View File

@ -2759,6 +2759,7 @@ static const char *const bfd_reloc_code_real_names[] = { "@@uninitialized@@",
"BFD_RELOC_AARCH64_TLSIE_LD64_GOTTPREL_LO12_NC",
"BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC",
"BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_PREL19",
"BFD_RELOC_AARCH64_TLSLD_ADD_DTPREL_LO12",
"BFD_RELOC_AARCH64_TLSLD_ADD_LO12_NC",
"BFD_RELOC_AARCH64_TLSLD_ADR_PAGE21",
"BFD_RELOC_AARCH64_TLSLD_ADR_PREL21",

4
bfd/reloc.c
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@ -6843,6 +6843,10 @@ ENUM
BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_PREL19
ENUMDOC
AArch64 TLS INITIAL EXEC relocation.
ENUM
BFD_RELOC_AARCH64_TLSLD_ADD_DTPREL_LO12
ENUMDOC
Unsigned 12 bit byte offset to module TLS base address.
ENUM
BFD_RELOC_AARCH64_TLSLD_ADD_LO12_NC
ENUMDOC

7
gas/ChangeLog
View File

@ -1,3 +1,10 @@
2015-08-11 Jiong Wang <jiong.wang@arm.com>
* config/tc-aarch64.c (reloc_table): New relocation modifiers
"dtprel_lo12".
(md_apply_fix): Support BFD_RELOC_AARCH64_TLSLD_ADD_DTPREL_LO12.
(aarch64_force_relocation): Likewise.
2015-08-11 Jiong Wang <jiong.wang@arm.com>
* config/tc-aarch64.c (reloc_table): New relocation modifiers.

11
gas/config/tc-aarch64.c
View File

@ -2522,6 +2522,15 @@ static struct reloc_table_entry reloc_table[] = {
0,
0},
/* 12 bit offset into the module TLS base address. */
{"dtprel_lo12", 0,
0, /* adr_type */
0,
0,
BFD_RELOC_AARCH64_TLSLD_ADD_DTPREL_LO12,
0,
0},
/* Get to the page containing GOT TLS entry for a symbol */
{"gottprel", 0,
0, /* adr_type */
@ -6787,6 +6796,7 @@ md_apply_fix (fixS * fixP, valueT * valP, segT seg)
case BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC:
case BFD_RELOC_AARCH64_TLSIE_LD64_GOTTPREL_LO12_NC:
case BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_PREL19:
case BFD_RELOC_AARCH64_TLSLD_ADD_DTPREL_LO12:
case BFD_RELOC_AARCH64_TLSLD_ADD_LO12_NC:
case BFD_RELOC_AARCH64_TLSLD_ADR_PAGE21:
case BFD_RELOC_AARCH64_TLSLD_ADR_PREL21:
@ -6999,6 +7009,7 @@ aarch64_force_relocation (struct fix *fixp)
case BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC:
case BFD_RELOC_AARCH64_TLSIE_LD64_GOTTPREL_LO12_NC:
case BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_PREL19:
case BFD_RELOC_AARCH64_TLSLD_ADD_DTPREL_LO12:
case BFD_RELOC_AARCH64_TLSLD_ADD_LO12_NC:
case BFD_RELOC_AARCH64_TLSLD_ADR_PAGE21:
case BFD_RELOC_AARCH64_TLSLD_ADR_PREL21:

7
gas/testsuite/ChangeLog
View File

@ -1,3 +1,10 @@
2015-08-11 Jiong Wang <jiong.wang@arm.com>
* gas/aarch64/reloc-dtprel_lo12-1.s: New testcase.
* gas/aarch64/reloc-dtprel_lo12-ilp32-1.s: Likewise.
* gas/aarch64/reloc-dtprel_lo12-1.d: New expectation file.
* gas/aarch64/reloc-dtprel_lo12-ilp32-1.d: Likewise.
2015-08-11 Jiong Wang <jiong.wang@arm.com>
* gas/aarch64/reloc-tlsldm_lo12_nc-1.s: New testcase.

9
gas/testsuite/gas/aarch64/reloc-dtprel_lo12-1.d Normal file
View File

@ -0,0 +1,9 @@
#objdump: -dr
.*: file format .*
Disassembly of section \.text:
0000000000000000 <.*>:
0: 91000347 add x7, x26, #0x0
0: R_AARCH64_TLSLD_ADD_DTPREL_LO12 x

5
gas/testsuite/gas/aarch64/reloc-dtprel_lo12-1.s Normal file
View File

@ -0,0 +1,5 @@
// Test file for AArch64 GAS -- dtprel_lo12
func:
// BFD_RELOC_AARCH64_TLSLD_ADD_DTPREL_LO12
add x7, x26, #:dtprel_lo12:x

10
gas/testsuite/gas/aarch64/reloc-dtprel_lo12-ilp32-1.d Normal file
View File

@ -0,0 +1,10 @@
#as: -mabi=ilp32
#objdump: -dr
.*: file format .*
Disassembly of section \.text:
00000000 <.*>:
0: 110002a8 add w8, w21, #0x0
0: R_AARCH64_P32_TLSLD_ADD_DTPREL_LO12 x

5
gas/testsuite/gas/aarch64/reloc-dtprel_lo12-ilp32-1.s Normal file
View File

@ -0,0 +1,5 @@
// Test file for AArch64 GAS -- dtprel_lo12 ILP32
func:
// BFD_RELOC_AARCH64_TLSLD_ADD_DTPREL_LO12
add w8, w21, #:dtprel_lo12:x

4
include/elf/ChangeLog
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@ -1,3 +1,7 @@
2015-08-11 Jiong Wang <jiong.wang@arm.com>
* aarch64.h (R_AARCH64_P32_TLSLD_ADD_DTPREL_LO12): Define.
2015-08-11 Jiong Wang <jiong.wang@arm.com>
* aarch64.h (R_AARCH64_P32_TLSLD_ADD_LO12_NC): Define.

1
include/elf/aarch64.h
View File

@ -132,6 +132,7 @@ RELOC_NUMBER (R_AARCH64_P32_TLSGD_ADD_LO12_NC, 82)
RELOC_NUMBER (R_AARCH64_P32_TLSLD_ADR_PREL21, 83)
RELOC_NUMBER (R_AARCH64_P32_TLSLD_ADR_PAGE21, 84)
RELOC_NUMBER (R_AARCH64_P32_TLSLD_ADD_LO12_NC, 85)
RELOC_NUMBER (R_AARCH64_P32_TLSLD_ADD_DTPREL_LO12, 91)
RELOC_NUMBER (R_AARCH64_P32_TLSIE_ADR_GOTTPREL_PAGE21, 103)
RELOC_NUMBER (R_AARCH64_P32_TLSIE_LD32_GOTTPREL_LO12_NC, 104)
RELOC_NUMBER (R_AARCH64_P32_TLSIE_LD_GOTTPREL_PREL19, 105)