MIPS16e2: Add MIPS16e2 ASE GAS test infrastructure
Define a new 32-bit and 64-bit MIPS16e2 test architecture and adjust existing tests now run against these architectures accordingly. gas/ * testsuite/gas/mips/mips.exp (run_dump_test_arch): Add `mips16e2@' prefix. (run_list_test_arch): Likewise. (mips16e2-32, mips16e2-64): New architectures. * testsuite/gas/mips/mips16e2-32@mips16-macro.d: New test. * testsuite/gas/mips/mips16e2-32@mips16-macro-t.d: New test. * testsuite/gas/mips/mips16e2-32@mips16-macro-e.d: New test. * testsuite/gas/mips/mips16e2-32@mips16-insn-t.d: New test. * testsuite/gas/mips/mips16e2-32@mips16-insn-e.d: New test. * testsuite/gas/mips/mips16e2-32@mips16e-64.d: New test. * testsuite/gas/mips/mips16e2-32@mips16-sub.d: New test. * testsuite/gas/mips/mips16e2-32@mips16e-64-sub.d: New test. * testsuite/gas/mips/mips16e2@relax-swap3.d: New test. * testsuite/gas/mips/mips16-32@mips16-asmacro.d: Remove `source' tag. Add `-I$srcdir/$subdir' to `as' flags. * testsuite/gas/mips/mips16-64@mips16-asmacro.d: Likewise. * testsuite/gas/mips/mips16e2-32@mips16-macro.l: New stderr output. * testsuite/gas/mips/mips16e2-32@mips16-macro-t.l: New stderr output. * testsuite/gas/mips/mips16e2-32@mips16-macro-e.l: New stderr output. * testsuite/gas/mips/mips16e2-32@mips16-insn-t.l: New stderr output. * testsuite/gas/mips/mips16e2-32@mips16-insn-e.l: New stderr output. * testsuite/gas/mips/mips16-sub.s: Add `.set nomips16e2'. * testsuite/gas/mips/mips16e-sub.s: Likewise. * testsuite/gas/mips/mips16e-64-sub.s: Likewise. * testsuite/gas/mips/mips16-asmacro.s: Remove `.set mips32'. * testsuite/gas/mips/mips16-32@mips16-asmacro.s: New test source. * testsuite/gas/mips/mips16-64@mips16-asmacro.s: New test source.
This commit is contained in:
Maciej W. Rozycki
parent
25499ac7ee
commit
70ab592fba
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@ -1,3 +1,40 @@
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2017-05-15 Maciej W. Rozycki <macro@imgtec.com>
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* testsuite/gas/mips/mips.exp (run_dump_test_arch): Add
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`mips16e2@' prefix.
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(run_list_test_arch): Likewise.
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(mips16e2-32, mips16e2-64): New architectures.
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* testsuite/gas/mips/mips16e2-32@mips16-macro.d: New test.
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* testsuite/gas/mips/mips16e2-32@mips16-macro-t.d: New test.
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* testsuite/gas/mips/mips16e2-32@mips16-macro-e.d: New test.
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* testsuite/gas/mips/mips16e2-32@mips16-insn-t.d: New test.
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* testsuite/gas/mips/mips16e2-32@mips16-insn-e.d: New test.
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* testsuite/gas/mips/mips16e2-32@mips16e-64.d: New test.
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* testsuite/gas/mips/mips16e2-32@mips16-sub.d: New test.
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* testsuite/gas/mips/mips16e2-32@mips16e-64-sub.d: New test.
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* testsuite/gas/mips/mips16e2@relax-swap3.d: New test.
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* testsuite/gas/mips/mips16-32@mips16-asmacro.d: Remove `source'
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tag. Add `-I$srcdir/$subdir' to `as' flags.
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* testsuite/gas/mips/mips16-64@mips16-asmacro.d: Likewise.
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* testsuite/gas/mips/mips16e2-32@mips16-macro.l: New stderr
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output.
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* testsuite/gas/mips/mips16e2-32@mips16-macro-t.l: New stderr
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output.
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* testsuite/gas/mips/mips16e2-32@mips16-macro-e.l: New stderr
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output.
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* testsuite/gas/mips/mips16e2-32@mips16-insn-t.l: New stderr
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output.
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* testsuite/gas/mips/mips16e2-32@mips16-insn-e.l: New stderr
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output.
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* testsuite/gas/mips/mips16-sub.s: Add `.set nomips16e2'.
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* testsuite/gas/mips/mips16e-sub.s: Likewise.
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* testsuite/gas/mips/mips16e-64-sub.s: Likewise.
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* testsuite/gas/mips/mips16-asmacro.s: Remove `.set mips32'.
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* testsuite/gas/mips/mips16-32@mips16-asmacro.s: New test
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source.
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* testsuite/gas/mips/mips16-64@mips16-asmacro.s: New test
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source.
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2017-05-15 Maciej W. Rozycki <macro@imgtec.com>
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Matthew Fortune <matthew.fortune@imgtec.com>
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Andrew Bennett <andrew.bennett@imgtec.com>
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@ -324,6 +324,9 @@ proc run_dump_test_arch { name opts arch } {
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set proparch [lindex [mips_arch_properties $arch 0] 0]
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set prefixes [list ${proparch}@ ]
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if { [ string match "mips16e2*" $proparch ] } {
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lappend prefixes mips16e2@
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}
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if { [ string match "mips16e*" $proparch ] } {
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lappend prefixes mips16e@
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}
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@ -380,6 +383,9 @@ proc run_list_test_arch { name opts arch } {
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set testname "MIPS $name ([concat $opts [mips_arch_displayname $arch]])"
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set proparch [lindex [mips_arch_properties $arch 0] 0]
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set prefixes [list ${proparch}@ ]
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if { [ string match "mips16e2*" $proparch ] } {
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lappend prefixes mips16e2@
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}
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if { [ string match "mips16e*" $proparch ] } {
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lappend prefixes mips16e@
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}
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@ -488,8 +494,14 @@ mips_arch_create mips16-64 64 mips16-32 {} \
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{ -march=mips3 -mips16 } { -mmips:4000 }
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mips_arch_create mips16e-32 32 mips16-32 {} \
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{ -march=mips32 -mips16 } { -mmips:isa32 }
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mips_arch_create mips16e2-32 32 mips16e-32 {} \
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{ -march=mips32r2 -mips16 -mmips16e2 } \
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{ -mmips:isa32r2 }
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mips_arch_create mips16e-64 64 mips16-64 { mips16e-32 } \
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{ -march=mips64 -mips16 } { -mmips:isa64 }
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mips_arch_create mips16e2-64 64 mips16e-64 { mips16e2-32 } \
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{ -march=mips64r2 -mips16 -mmips16e2 } \
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{ -mmips:isa64r2 }
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mips_arch_create micromips 64 mips64r2 {} \
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{ -march=mips64r2 -mmicromips } {}
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mips_arch_create r3000 32 mips1 {} \
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@ -1,7 +1,6 @@
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#objdump: -d --prefix-addresses --show-raw-insn
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#name: MIPS16 ASMACRO instruction
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#as: -32
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#source: mips16-asmacro.s
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#as: -32 -I$srcdir/$subdir
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.*: +file format .*mips.*
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@ -0,0 +1,2 @@
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.set mips32
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.include "mips16-asmacro.s"
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@ -1,7 +1,6 @@
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#objdump: -d --prefix-addresses --show-raw-insn
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#name: MIPS16 ASMACRO instruction
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#as: -32
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#source: mips16-asmacro.s
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#as: -32 -I$srcdir/$subdir
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.*: +file format .*mips.*
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@ -0,0 +1,2 @@
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.set mips64
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.include "mips16-asmacro.s"
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@ -1,4 +1,3 @@
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.set mips32
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.set mips16
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foo:
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asmacro 0, 0, 0, 0, 0, 0
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@ -1,2 +1,3 @@
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.set nomips16e2
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.set mips3
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.include "mips16.s"
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@ -1,2 +1,3 @@
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.set nomips16e2
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.set mips64
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.include "mips16e-64.s"
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@ -1,2 +1,3 @@
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.set nomips16e2
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.set mips32
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.include "mips16e.s"
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@ -0,0 +1,4 @@
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#as: -32
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#name: MIPS16 explicit extended instructions
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#error-output: mips16e2-32@mips16-insn-e.l
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#source: mips16-insn-e.s
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@ -0,0 +1,131 @@
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.*: Assembler messages:
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.*:4: Warning: extended operand requested but not required
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.*:5: Warning: extended operand requested but not required
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.*:8: Warning: extended operand requested but not required
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.*:9: Warning: extended operand requested but not required
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.*:23: Warning: extended operand requested but not required
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.*:24: Error: opcode not supported on this processor: mips32r2 \(mips32r2\) `dsll\.e \$16,\$16,8'
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.*:25: Warning: extended operand requested but not required
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.*:26: Warning: extended operand requested but not required
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.*:28: Error: opcode not supported on this processor: mips32r2 \(mips32r2\) `ld\.e \$16,0\(\$16\)'
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.*:30: Warning: extended operand requested but not required
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.*:31: Warning: extended operand requested but not required
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.*:32: Error: opcode not supported on this processor: mips32r2 \(mips32r2\) `daddiu\.e \$16,\$16,0'
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.*:33: Error: opcode not supported on this processor: mips32r2 \(mips32r2\) `daddu\.e \$16,\$16,0'
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.*:35: Warning: extended operand requested but not required
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.*:36: Warning: extended operand requested but not required
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.*:38: Warning: extended operand requested but not required
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.*:39: Warning: extended operand requested but not required
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.*:41: Warning: extended operand requested but not required
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.*:42: Warning: extended operand requested but not required
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.*:46: Warning: extended operand requested but not required
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.*:47: Warning: extended operand requested but not required
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.*:48: Warning: extended operand requested but not required
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.*:49: Warning: extended operand requested but not required
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.*:50: Warning: extended operand requested but not required
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.*:53: Error: unrecognized extended version of MIPS16 opcode `nop\.e '
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.*:54: Error: unrecognized extended version of MIPS16 opcode `move\.e \$0,\$16'
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.*:55: Error: unrecognized extended version of MIPS16 opcode `move\.e \$16,\$0'
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.*:57: Warning: extended operand requested but not required
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.*:59: Warning: extended operand requested but not required
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.*:60: Warning: extended operand requested but not required
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.*:62: Error: opcode not supported on this processor: mips32r2 \(mips32r2\) `sd\.e \$16,0\(\$16\)'
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.*:64: Warning: extended operand requested but not required
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.*:66: Warning: extended operand requested but not required
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.*:68: Warning: extended operand requested but not required
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.*:70: Warning: extended operand requested but not required
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.*:72: Warning: extended operand requested but not required
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.*:74: Warning: extended operand requested but not required
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.*:77: Warning: extended operand requested but not required
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.*:80: Error: opcode not supported on this processor: mips32r2 \(mips32r2\) `lwu\.e \$16,0\(\$16\)'
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.*:82: Warning: extended operand requested but not required
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.*:84: Warning: extended operand requested but not required
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.*:86: Warning: extended operand requested but not required
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.*:88: Warning: extended operand requested but not required
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.*:90: Error: opcode not supported on this processor: mips32r2 \(mips32r2\) `daddu\.e \$16,\$16,\$16'
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.*:91: Error: operand 3 must be an immediate expression `addu\.e \$16,\$16,\$16'
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.*:92: Error: opcode not supported on this processor: mips32r2 \(mips32r2\) `dsubu\.e \$16,\$16,\$16'
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.*:93: Error: unrecognized extended version of MIPS16 opcode `subu\.e \$16,\$16,\$16'
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.*:95: Error: unrecognized extended version of MIPS16 opcode `jr\.e \$16'
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.*:97: Error: unrecognized extended version of MIPS16 opcode `j\.e \$16'
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.*:99: Error: unrecognized extended version of MIPS16 opcode `jr\.e \$31'
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.*:101: Error: unrecognized extended version of MIPS16 opcode `j\.e \$31'
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.*:103: Error: unrecognized extended version of MIPS16 opcode `jalr\.e \$16'
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.*:105: Error: unrecognized extended version of MIPS16 opcode `jalr\.e \$31,\$16'
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.*:107: Error: operand 1 must be an immediate expression `jal\.e \$16'
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.*:109: Error: operand 1 must be an immediate expression `jal\.e \$31,\$16'
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.*:111: Error: unrecognized extended version of MIPS16 opcode `jrc\.e \$16'
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.*:112: Error: unrecognized extended version of MIPS16 opcode `jrc\.e \$31'
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.*:113: Error: unrecognized extended version of MIPS16 opcode `jalrc\.e \$16'
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.*:114: Error: unrecognized extended version of MIPS16 opcode `jalrc\.e \$31,\$16'
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.*:115: Error: unrecognized extended version of MIPS16 opcode `sdbbp\.e 0'
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.*:116: Error: operand 2 must be an immediate expression `slt\.e \$16,\$16'
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.*:117: Error: operand 2 must be an immediate expression `sltu\.e \$16,\$16'
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.*:118: Error: unrecognized extended version of MIPS16 opcode `sllv\.e \$16,\$16'
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.*:119: Error: operand 2 must be an immediate expression `sll\.e \$16,\$16'
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.*:120: Error: unrecognized extended version of MIPS16 opcode `break\.e 0'
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.*:121: Error: unrecognized extended version of MIPS16 opcode `srlv\.e \$16,\$16'
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.*:122: Error: operand 2 must be an immediate expression `srl\.e \$16,\$16'
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.*:123: Error: unrecognized extended version of MIPS16 opcode `srav\.e \$16,\$16'
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.*:124: Error: operand 2 must be an immediate expression `sra\.e \$16,\$16'
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.*:125: Error: opcode not supported on this processor: mips32r2 \(mips32r2\) `dsrl\.e \$16,8'
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.*:126: Error: unrecognized extended version of MIPS16 opcode `entry\.e '
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.*:127: Error: unrecognized extended version of MIPS16 opcode `entry\.e \$31'
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.*:128: Error: unrecognized extended version of MIPS16 opcode `exit\.e \$f0'
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.*:129: Error: unrecognized extended version of MIPS16 opcode `exit\.e'
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.*:130: Error: operand 2 must be an immediate expression `cmp\.e \$16,\$16'
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.*:131: Error: unrecognized extended version of MIPS16 opcode `neg\.e \$16,\$16'
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.*:132: Error: unrecognized extended version of MIPS16 opcode `and\.e \$16,\$16'
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.*:133: Error: unrecognized extended version of MIPS16 opcode `or\.e \$16,\$16'
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.*:134: Error: unrecognized extended version of MIPS16 opcode `xor\.e \$16,\$16'
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.*:135: Error: unrecognized extended version of MIPS16 opcode `not\.e \$16,\$16'
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.*:136: Error: unrecognized extended version of MIPS16 opcode `mfhi\.e \$16'
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.*:137: Error: unrecognized extended version of MIPS16 opcode `zeb\.e \$16'
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.*:138: Error: unrecognized extended version of MIPS16 opcode `zeh\.e \$16'
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.*:139: Error: opcode not supported on this processor: mips32r2 \(mips32r2\) `zew\.e \$16'
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.*:140: Error: unrecognized extended version of MIPS16 opcode `seb\.e \$16'
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.*:141: Error: unrecognized extended version of MIPS16 opcode `seh\.e \$16'
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.*:142: Error: opcode not supported on this processor: mips32r2 \(mips32r2\) `sew\.e \$16'
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.*:143: Error: unrecognized extended version of MIPS16 opcode `mflo\.e \$16'
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.*:144: Error: opcode not supported on this processor: mips32r2 \(mips32r2\) `dsra\.e \$16,8'
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.*:145: Error: opcode not supported on this processor: mips32r2 \(mips32r2\) `dsllv\.e \$16,\$16'
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.*:146: Error: opcode not supported on this processor: mips32r2 \(mips32r2\) `dsll\.e \$16,\$16'
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.*:147: Error: opcode not supported on this processor: mips32r2 \(mips32r2\) `dsrlv\.e \$16,\$16'
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.*:148: Error: opcode not supported on this processor: mips32r2 \(mips32r2\) `dsrl\.e \$16,\$16'
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.*:149: Error: opcode not supported on this processor: mips32r2 \(mips32r2\) `dsrav\.e \$16,\$16'
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.*:150: Error: opcode not supported on this processor: mips32r2 \(mips32r2\) `dsra\.e \$16,\$16'
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.*:151: Error: unrecognized extended version of MIPS16 opcode `mult\.e \$16,\$16'
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.*:152: Error: unrecognized extended version of MIPS16 opcode `multu\.e \$16,\$16'
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.*:153: Error: unrecognized extended version of MIPS16 opcode `div\.e \$0,\$16,\$16'
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.*:154: Error: unrecognized extended version of MIPS16 opcode `rem\.e \$0,\$16,\$16'
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.*:155: Error: unrecognized extended version of MIPS16 opcode `divu\.e \$0,\$16,\$16'
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.*:156: Error: unrecognized extended version of MIPS16 opcode `remu\.e \$0,\$16,\$16'
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.*:157: Error: opcode not supported on this processor: mips32r2 \(mips32r2\) `dmult\.e \$16,\$16'
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.*:158: Error: opcode not supported on this processor: mips32r2 \(mips32r2\) `dmultu\.e \$16,\$16'
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.*:159: Error: opcode not supported on this processor: mips32r2 \(mips32r2\) `ddiv\.e \$0,\$16,\$16'
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.*:160: Error: opcode not supported on this processor: mips32r2 \(mips32r2\) `drem\.e \$0,\$16,\$16'
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.*:161: Error: opcode not supported on this processor: mips32r2 \(mips32r2\) `ddivu\.e \$0,\$16,\$16'
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.*:162: Error: opcode not supported on this processor: mips32r2 \(mips32r2\) `dremu\.e \$0,\$16,\$16'
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.*:164: Error: unrecognized extended version of MIPS16 opcode `extend\.e 0'
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.*:166: Error: opcode not supported on this processor: mips32r2 \(mips32r2\) `ld\.e \$16,0\(\$29\)'
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.*:167: Error: opcode not supported on this processor: mips32r2 \(mips32r2\) `sd\.e \$16,0\(\$29\)'
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.*:168: Error: opcode not supported on this processor: mips32r2 \(mips32r2\) `sd\.e \$31,0\(\$29\)'
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.*:169: Error: opcode not supported on this processor: mips32r2 \(mips32r2\) `daddiu\.e \$29,0'
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.*:170: Error: opcode not supported on this processor: mips32r2 \(mips32r2\) `daddiu\.e \$29,\$29,0'
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.*:171: Error: opcode not supported on this processor: mips32r2 \(mips32r2\) `daddu\.e \$29,0'
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.*:172: Error: opcode not supported on this processor: mips32r2 \(mips32r2\) `daddu\.e \$29,\$29,0'
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.*:174: Error: opcode not supported on this processor: mips32r2 \(mips32r2\) `ld\.e \$16,0\(\$pc\)'
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.*:175: Error: opcode not supported on this processor: mips32r2 \(mips32r2\) `ld\.e \$16,\.-3'
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.*:176: Error: opcode not supported on this processor: mips32r2 \(mips32r2\) `daddiu\.e \$16,0'
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.*:177: Error: opcode not supported on this processor: mips32r2 \(mips32r2\) `daddu\.e \$16,0'
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.*:179: Error: opcode not supported on this processor: mips32r2 \(mips32r2\) `daddiu\.e \$16,\$pc,0'
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.*:180: Error: opcode not supported on this processor: mips32r2 \(mips32r2\) `daddu\.e \$16,\$pc,0'
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.*:181: Error: opcode not supported on this processor: mips32r2 \(mips32r2\) `dla\.e \$16,\.-1'
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.*:182: Error: opcode not supported on this processor: mips32r2 \(mips32r2\) `daddiu\.e \$16,\$sp,0'
|
||||
.*:183: Error: opcode not supported on this processor: mips32r2 \(mips32r2\) `daddu\.e \$16,\$sp,0'
|
||||
.*:10: Warning: extended operand requested but not required
|
||||
.*:12: Warning: extended operand requested but not required
|
||||
.*:19: Warning: extended operand requested but not required
|
||||
.*:21: Warning: extended operand requested but not required
|
||||
.*:44: Warning: extended operand requested but not required
|
||||
.*:45: Warning: extended operand requested but not required
|
||||
|
|
@ -0,0 +1,4 @@
|
|||
#as: -32
|
||||
#name: MIPS16 explicit unextended instructions
|
||||
#error-output: mips16e2-32@mips16-insn-t.l
|
||||
#source: mips16-insn-t.s
|
||||
|
|
@ -0,0 +1,43 @@
|
|||
.*: Assembler messages:
|
||||
.*:14: Error: invalid operands `jal\.t 0'
|
||||
.*:16: Error: unrecognized unextended version of MIPS16 opcode `jalx\.t 0'
|
||||
.*:24: Error: opcode not supported on this processor: mips32r2 \(mips32r2\) `dsll\.t \$16,\$16,8'
|
||||
.*:28: Error: opcode not supported on this processor: mips32r2 \(mips32r2\) `ld\.t \$16,0\(\$16\)'
|
||||
.*:32: Error: opcode not supported on this processor: mips32r2 \(mips32r2\) `daddiu\.t \$16,\$16,0'
|
||||
.*:33: Error: opcode not supported on this processor: mips32r2 \(mips32r2\) `daddu\.t \$16,\$16,0'
|
||||
.*:62: Error: opcode not supported on this processor: mips32r2 \(mips32r2\) `sd\.t \$16,0\(\$16\)'
|
||||
.*:80: Error: opcode not supported on this processor: mips32r2 \(mips32r2\) `lwu\.t \$16,0\(\$16\)'
|
||||
.*:90: Error: opcode not supported on this processor: mips32r2 \(mips32r2\) `daddu\.t \$16,\$16,\$16'
|
||||
.*:92: Error: opcode not supported on this processor: mips32r2 \(mips32r2\) `dsubu\.t \$16,\$16,\$16'
|
||||
.*:125: Error: opcode not supported on this processor: mips32r2 \(mips32r2\) `dsrl\.t \$16,8'
|
||||
.*:139: Error: opcode not supported on this processor: mips32r2 \(mips32r2\) `zew\.t \$16'
|
||||
.*:142: Error: opcode not supported on this processor: mips32r2 \(mips32r2\) `sew\.t \$16'
|
||||
.*:144: Error: opcode not supported on this processor: mips32r2 \(mips32r2\) `dsra\.t \$16,8'
|
||||
.*:145: Error: opcode not supported on this processor: mips32r2 \(mips32r2\) `dsllv\.t \$16,\$16'
|
||||
.*:146: Error: opcode not supported on this processor: mips32r2 \(mips32r2\) `dsll\.t \$16,\$16'
|
||||
.*:147: Error: opcode not supported on this processor: mips32r2 \(mips32r2\) `dsrlv\.t \$16,\$16'
|
||||
.*:148: Error: opcode not supported on this processor: mips32r2 \(mips32r2\) `dsrl\.t \$16,\$16'
|
||||
.*:149: Error: opcode not supported on this processor: mips32r2 \(mips32r2\) `dsrav\.t \$16,\$16'
|
||||
.*:150: Error: opcode not supported on this processor: mips32r2 \(mips32r2\) `dsra\.t \$16,\$16'
|
||||
.*:157: Error: opcode not supported on this processor: mips32r2 \(mips32r2\) `dmult\.t \$16,\$16'
|
||||
.*:158: Error: opcode not supported on this processor: mips32r2 \(mips32r2\) `dmultu\.t \$16,\$16'
|
||||
.*:159: Error: opcode not supported on this processor: mips32r2 \(mips32r2\) `ddiv\.t \$0,\$16,\$16'
|
||||
.*:160: Error: opcode not supported on this processor: mips32r2 \(mips32r2\) `drem\.t \$0,\$16,\$16'
|
||||
.*:161: Error: opcode not supported on this processor: mips32r2 \(mips32r2\) `ddivu\.t \$0,\$16,\$16'
|
||||
.*:162: Error: opcode not supported on this processor: mips32r2 \(mips32r2\) `dremu\.t \$0,\$16,\$16'
|
||||
.*:166: Error: opcode not supported on this processor: mips32r2 \(mips32r2\) `ld\.t \$16,0\(\$29\)'
|
||||
.*:167: Error: opcode not supported on this processor: mips32r2 \(mips32r2\) `sd\.t \$16,0\(\$29\)'
|
||||
.*:168: Error: opcode not supported on this processor: mips32r2 \(mips32r2\) `sd\.t \$31,0\(\$29\)'
|
||||
.*:169: Error: opcode not supported on this processor: mips32r2 \(mips32r2\) `daddiu\.t \$29,0'
|
||||
.*:170: Error: opcode not supported on this processor: mips32r2 \(mips32r2\) `daddiu\.t \$29,\$29,0'
|
||||
.*:171: Error: opcode not supported on this processor: mips32r2 \(mips32r2\) `daddu\.t \$29,0'
|
||||
.*:172: Error: opcode not supported on this processor: mips32r2 \(mips32r2\) `daddu\.t \$29,\$29,0'
|
||||
.*:174: Error: opcode not supported on this processor: mips32r2 \(mips32r2\) `ld\.t \$16,0\(\$pc\)'
|
||||
.*:175: Error: opcode not supported on this processor: mips32r2 \(mips32r2\) `ld\.t \$16,\.-3'
|
||||
.*:176: Error: opcode not supported on this processor: mips32r2 \(mips32r2\) `daddiu\.t \$16,0'
|
||||
.*:177: Error: opcode not supported on this processor: mips32r2 \(mips32r2\) `daddu\.t \$16,0'
|
||||
.*:179: Error: opcode not supported on this processor: mips32r2 \(mips32r2\) `daddiu\.t \$16,\$pc,0'
|
||||
.*:180: Error: opcode not supported on this processor: mips32r2 \(mips32r2\) `daddu\.t \$16,\$pc,0'
|
||||
.*:181: Error: opcode not supported on this processor: mips32r2 \(mips32r2\) `dla\.t \$16,\.-1'
|
||||
.*:182: Error: opcode not supported on this processor: mips32r2 \(mips32r2\) `daddiu\.t \$16,\$sp,0'
|
||||
.*:183: Error: opcode not supported on this processor: mips32r2 \(mips32r2\) `daddu\.t \$16,\$sp,0'
|
||||
|
|
@ -0,0 +1,4 @@
|
|||
#as: -32
|
||||
#name: MIPS16 explicit extended macros
|
||||
#source: mips16-macro-e.s
|
||||
#error-output: mips16e2-32@mips16-macro-e.l
|
||||
|
|
@ -0,0 +1,56 @@
|
|||
.*: Assembler messages:
|
||||
.*:4: Error: unrecognized extended version of MIPS16 opcode `div\.e \$2,\$3,\$4'
|
||||
.*:5: Error: unrecognized extended version of MIPS16 opcode `divu\.e \$3,\$4,\$5'
|
||||
.*:6: Error: opcode not supported on this processor: mips32r2 \(mips32r2\) `ddiv\.e \$4,\$5,\$6'
|
||||
.*:7: Error: opcode not supported on this processor: mips32r2 \(mips32r2\) `ddivu\.e \$5,\$6,\$7'
|
||||
.*:8: Error: unrecognized extended version of MIPS16 opcode `rem\.e \$6,\$7,\$16'
|
||||
.*:9: Error: unrecognized extended version of MIPS16 opcode `remu\.e \$6,\$7,\$17'
|
||||
.*:10: Error: opcode not supported on this processor: mips32r2 \(mips32r2\) `drem\.e \$2,\$3,\$4'
|
||||
.*:11: Error: opcode not supported on this processor: mips32r2 \(mips32r2\) `dremu\.e \$3,\$4,\$5'
|
||||
.*:12: Error: unrecognized extended version of MIPS16 opcode `mul\.e \$4,\$5,\$6'
|
||||
.*:13: Error: opcode not supported on this processor: mips32r2 \(mips32r2\) `dmul\.e \$5,\$6,\$7'
|
||||
.*:14: Error: unrecognized extended version of MIPS16 opcode `subu\.e \$2,-32767'
|
||||
.*:15: Error: unrecognized extended version of MIPS16 opcode `subu\.e \$3,16'
|
||||
.*:16: Error: unrecognized extended version of MIPS16 opcode `subu\.e \$4,32768'
|
||||
.*:17: Error: unrecognized extended version of MIPS16 opcode `subu\.e \$3,\$7,-16383'
|
||||
.*:18: Error: unrecognized extended version of MIPS16 opcode `subu\.e \$4,\$16,4'
|
||||
.*:19: Error: unrecognized extended version of MIPS16 opcode `subu\.e \$5,\$17,16384'
|
||||
.*:20: Error: opcode not supported on this processor: mips32r2 \(mips32r2\) `dsubu\.e \$4,-32767'
|
||||
.*:21: Error: opcode not supported on this processor: mips32r2 \(mips32r2\) `dsubu\.e \$6,6'
|
||||
.*:22: Error: opcode not supported on this processor: mips32r2 \(mips32r2\) `dsubu\.e \$7,32768'
|
||||
.*:23: Error: opcode not supported on this processor: mips32r2 \(mips32r2\) `dsubu\.e \$2,\$4,-16383'
|
||||
.*:24: Error: opcode not supported on this processor: mips32r2 \(mips32r2\) `dsubu\.e \$3,\$7,8'
|
||||
.*:25: Error: opcode not supported on this processor: mips32r2 \(mips32r2\) `dsubu\.e \$4,\$5,16384'
|
||||
.*:26: Error: unrecognized extended version of MIPS16 opcode `beq\.e \$2,\$3,1b'
|
||||
.*:27: Error: unrecognized extended version of MIPS16 opcode `bne\.e \$4,\$5,1b'
|
||||
.*:28: Error: unrecognized extended version of MIPS16 opcode `blt\.e \$6,\$7,1b'
|
||||
.*:29: Error: unrecognized extended version of MIPS16 opcode `bltu\.e \$16,\$17,1b'
|
||||
.*:30: Error: unrecognized extended version of MIPS16 opcode `ble\.e \$4,\$7,1b'
|
||||
.*:31: Error: unrecognized extended version of MIPS16 opcode `bleu\.e \$5,\$6,1b'
|
||||
.*:32: Error: unrecognized extended version of MIPS16 opcode `bge\.e \$4,\$16,1b'
|
||||
.*:33: Error: unrecognized extended version of MIPS16 opcode `bgeu\.e \$5,\$17,1b'
|
||||
.*:34: Error: unrecognized extended version of MIPS16 opcode `bgt\.e \$4,\$6,1b'
|
||||
.*:35: Error: unrecognized extended version of MIPS16 opcode `bgtu\.e \$5,\$7,1b'
|
||||
.*:36: Error: unrecognized extended version of MIPS16 opcode `beq\.e \$2,1,1b'
|
||||
.*:37: Error: unrecognized extended version of MIPS16 opcode `beq\.e \$3,65535,1b'
|
||||
.*:38: Error: unrecognized extended version of MIPS16 opcode `bne\.e \$4,1,1b'
|
||||
.*:39: Error: unrecognized extended version of MIPS16 opcode `bne\.e \$5,65535,1b'
|
||||
.*:40: Error: unrecognized extended version of MIPS16 opcode `blt\.e \$6,-32768,1b'
|
||||
.*:41: Error: unrecognized extended version of MIPS16 opcode `blt\.e \$7,32767,1b'
|
||||
.*:42: Error: unrecognized extended version of MIPS16 opcode `bltu\.e \$16,-32768,1b'
|
||||
.*:43: Error: unrecognized extended version of MIPS16 opcode `bltu\.e \$17,32767,1b'
|
||||
.*:44: Error: unrecognized extended version of MIPS16 opcode `ble\.e \$2,-32769,1b'
|
||||
.*:45: Error: unrecognized extended version of MIPS16 opcode `ble\.e \$3,32766,1b'
|
||||
.*:46: Error: unrecognized extended version of MIPS16 opcode `bleu\.e \$4,-32769,1b'
|
||||
.*:47: Error: unrecognized extended version of MIPS16 opcode `bleu\.e \$5,32766,1b'
|
||||
.*:48: Error: unrecognized extended version of MIPS16 opcode `bge\.e \$6,-32768,1b'
|
||||
.*:49: Error: unrecognized extended version of MIPS16 opcode `bge\.e \$7,32766,1b'
|
||||
.*:50: Error: unrecognized extended version of MIPS16 opcode `bgeu\.e \$16,-32768,1b'
|
||||
.*:51: Error: unrecognized extended version of MIPS16 opcode `bgeu\.e \$17,32767,1b'
|
||||
.*:52: Error: unrecognized extended version of MIPS16 opcode `bgt\.e \$2,-32769,1b'
|
||||
.*:53: Error: unrecognized extended version of MIPS16 opcode `bgt\.e \$3,32766,1b'
|
||||
.*:54: Error: unrecognized extended version of MIPS16 opcode `bgtu\.e \$4,-32769,1b'
|
||||
.*:55: Error: unrecognized extended version of MIPS16 opcode `bgtu\.e \$5,32766,1b'
|
||||
.*:56: Error: unrecognized extended version of MIPS16 opcode `abs\.e \$2'
|
||||
.*:57: Error: unrecognized extended version of MIPS16 opcode `abs\.e \$3,\$3'
|
||||
.*:58: Error: unrecognized extended version of MIPS16 opcode `abs\.e \$4,\$5'
|
||||
|
|
@ -0,0 +1,4 @@
|
|||
#as: -32
|
||||
#name: MIPS16 explicit unextended macros
|
||||
#source: mips16-macro-t.s
|
||||
#error-output: mips16e2-32@mips16-macro-t.l
|
||||
|
|
@ -0,0 +1,56 @@
|
|||
.*: Assembler messages:
|
||||
.*:4: Error: invalid operands `div\.t \$2,\$3,\$4'
|
||||
.*:5: Error: invalid operands `divu\.t \$3,\$4,\$5'
|
||||
.*:6: Error: opcode not supported on this processor: mips32r2 \(mips32r2\) `ddiv\.t \$4,\$5,\$6'
|
||||
.*:7: Error: opcode not supported on this processor: mips32r2 \(mips32r2\) `ddivu\.t \$5,\$6,\$7'
|
||||
.*:8: Error: invalid operands `rem\.t \$6,\$7,\$16'
|
||||
.*:9: Error: invalid operands `remu\.t \$6,\$7,\$17'
|
||||
.*:10: Error: opcode not supported on this processor: mips32r2 \(mips32r2\) `drem\.t \$2,\$3,\$4'
|
||||
.*:11: Error: opcode not supported on this processor: mips32r2 \(mips32r2\) `dremu\.t \$3,\$4,\$5'
|
||||
.*:12: Error: unrecognized unextended version of MIPS16 opcode `mul\.t \$4,\$5,\$6'
|
||||
.*:13: Error: opcode not supported on this processor: mips32r2 \(mips32r2\) `dmul\.t \$5,\$6,\$7'
|
||||
.*:14: Error: invalid operands `subu\.t \$2,-32767'
|
||||
.*:15: Error: invalid operands `subu\.t \$3,16'
|
||||
.*:16: Error: invalid operands `subu\.t \$4,32768'
|
||||
.*:17: Error: invalid operands `subu\.t \$3,\$7,-16383'
|
||||
.*:18: Error: invalid operands `subu\.t \$4,\$16,4'
|
||||
.*:19: Error: invalid operands `subu\.t \$5,\$17,16384'
|
||||
.*:20: Error: opcode not supported on this processor: mips32r2 \(mips32r2\) `dsubu\.t \$4,-32767'
|
||||
.*:21: Error: opcode not supported on this processor: mips32r2 \(mips32r2\) `dsubu\.t \$6,6'
|
||||
.*:22: Error: opcode not supported on this processor: mips32r2 \(mips32r2\) `dsubu\.t \$7,32768'
|
||||
.*:23: Error: opcode not supported on this processor: mips32r2 \(mips32r2\) `dsubu\.t \$2,\$4,-16383'
|
||||
.*:24: Error: opcode not supported on this processor: mips32r2 \(mips32r2\) `dsubu\.t \$3,\$7,8'
|
||||
.*:25: Error: opcode not supported on this processor: mips32r2 \(mips32r2\) `dsubu\.t \$4,\$5,16384'
|
||||
.*:26: Error: unrecognized unextended version of MIPS16 opcode `beq\.t \$2,\$3,1b'
|
||||
.*:27: Error: unrecognized unextended version of MIPS16 opcode `bne\.t \$4,\$5,1b'
|
||||
.*:28: Error: unrecognized unextended version of MIPS16 opcode `blt\.t \$6,\$7,1b'
|
||||
.*:29: Error: unrecognized unextended version of MIPS16 opcode `bltu\.t \$16,\$17,1b'
|
||||
.*:30: Error: unrecognized unextended version of MIPS16 opcode `ble\.t \$4,\$7,1b'
|
||||
.*:31: Error: unrecognized unextended version of MIPS16 opcode `bleu\.t \$5,\$6,1b'
|
||||
.*:32: Error: unrecognized unextended version of MIPS16 opcode `bge\.t \$4,\$16,1b'
|
||||
.*:33: Error: unrecognized unextended version of MIPS16 opcode `bgeu\.t \$5,\$17,1b'
|
||||
.*:34: Error: unrecognized unextended version of MIPS16 opcode `bgt\.t \$4,\$6,1b'
|
||||
.*:35: Error: unrecognized unextended version of MIPS16 opcode `bgtu\.t \$5,\$7,1b'
|
||||
.*:36: Error: unrecognized unextended version of MIPS16 opcode `beq\.t \$2,1,1b'
|
||||
.*:37: Error: unrecognized unextended version of MIPS16 opcode `beq\.t \$3,65535,1b'
|
||||
.*:38: Error: unrecognized unextended version of MIPS16 opcode `bne\.t \$4,1,1b'
|
||||
.*:39: Error: unrecognized unextended version of MIPS16 opcode `bne\.t \$5,65535,1b'
|
||||
.*:40: Error: unrecognized unextended version of MIPS16 opcode `blt\.t \$6,-32768,1b'
|
||||
.*:41: Error: unrecognized unextended version of MIPS16 opcode `blt\.t \$7,32767,1b'
|
||||
.*:42: Error: unrecognized unextended version of MIPS16 opcode `bltu\.t \$16,-32768,1b'
|
||||
.*:43: Error: unrecognized unextended version of MIPS16 opcode `bltu\.t \$17,32767,1b'
|
||||
.*:44: Error: unrecognized unextended version of MIPS16 opcode `ble\.t \$2,-32769,1b'
|
||||
.*:45: Error: unrecognized unextended version of MIPS16 opcode `ble\.t \$3,32766,1b'
|
||||
.*:46: Error: unrecognized unextended version of MIPS16 opcode `bleu\.t \$4,-32769,1b'
|
||||
.*:47: Error: unrecognized unextended version of MIPS16 opcode `bleu\.t \$5,32766,1b'
|
||||
.*:48: Error: unrecognized unextended version of MIPS16 opcode `bge\.t \$6,-32768,1b'
|
||||
.*:49: Error: unrecognized unextended version of MIPS16 opcode `bge\.t \$7,32766,1b'
|
||||
.*:50: Error: unrecognized unextended version of MIPS16 opcode `bgeu\.t \$16,-32768,1b'
|
||||
.*:51: Error: unrecognized unextended version of MIPS16 opcode `bgeu\.t \$17,32767,1b'
|
||||
.*:52: Error: unrecognized unextended version of MIPS16 opcode `bgt\.t \$2,-32769,1b'
|
||||
.*:53: Error: unrecognized unextended version of MIPS16 opcode `bgt\.t \$3,32766,1b'
|
||||
.*:54: Error: unrecognized unextended version of MIPS16 opcode `bgtu\.t \$4,-32769,1b'
|
||||
.*:55: Error: unrecognized unextended version of MIPS16 opcode `bgtu\.t \$5,32766,1b'
|
||||
.*:56: Error: unrecognized unextended version of MIPS16 opcode `abs\.t \$2'
|
||||
.*:57: Error: unrecognized unextended version of MIPS16 opcode `abs\.t \$3,\$3'
|
||||
.*:58: Error: unrecognized unextended version of MIPS16 opcode `abs\.t \$4,\$5'
|
||||
|
|
@ -0,0 +1,5 @@
|
|||
#objdump: -dr -Mgpr-names=numeric
|
||||
#as: -32
|
||||
#name: MIPS16 macros
|
||||
#source: mips16-macro.s
|
||||
#error-output: mips16e2-32@mips16-macro.l
|
||||
|
|
@ -0,0 +1,12 @@
|
|||
.*: Assembler messages:
|
||||
.*:6: Error: opcode not supported on this processor: mips32r2 \(mips32r2\) `ddiv \$4,\$5,\$6'
|
||||
.*:7: Error: opcode not supported on this processor: mips32r2 \(mips32r2\) `ddivu \$5,\$6,\$7'
|
||||
.*:10: Error: opcode not supported on this processor: mips32r2 \(mips32r2\) `drem \$2,\$3,\$4'
|
||||
.*:11: Error: opcode not supported on this processor: mips32r2 \(mips32r2\) `dremu \$3,\$4,\$5'
|
||||
.*:13: Error: opcode not supported on this processor: mips32r2 \(mips32r2\) `dmul \$5,\$6,\$7'
|
||||
.*:20: Error: opcode not supported on this processor: mips32r2 \(mips32r2\) `dsubu \$4,-32767'
|
||||
.*:21: Error: opcode not supported on this processor: mips32r2 \(mips32r2\) `dsubu \$6,6'
|
||||
.*:22: Error: opcode not supported on this processor: mips32r2 \(mips32r2\) `dsubu \$7,32768'
|
||||
.*:23: Error: opcode not supported on this processor: mips32r2 \(mips32r2\) `dsubu \$2,\$4,-16383'
|
||||
.*:24: Error: opcode not supported on this processor: mips32r2 \(mips32r2\) `dsubu \$3,\$7,8'
|
||||
.*:25: Error: opcode not supported on this processor: mips32r2 \(mips32r2\) `dsubu \$4,\$5,16384'
|
||||
|
|
@ -0,0 +1,5 @@
|
|||
#objdump: -dr --prefix-address --show-raw-insn
|
||||
#as: -32 -I$srcdir/$subdir
|
||||
#name: MIPS16 ISA subset disassembly
|
||||
#source: mips16-sub.s
|
||||
#dump: mips16-32@mips16-sub.d
|
||||
|
|
@ -0,0 +1,5 @@
|
|||
#objdump: -dr --prefix-address --show-raw-insn
|
||||
#as: -32 -I$srcdir/$subdir
|
||||
#name: MIPS16e 64-bit ISA subset disassembly
|
||||
#source: mips16e-64-sub.s
|
||||
#dump: mips16-32@mips16e-64-sub.d
|
||||
|
|
@ -0,0 +1,4 @@
|
|||
#as: -32
|
||||
#name: MIPS16e-64
|
||||
#source: mips16e-64.s
|
||||
#error-output: mips16e-32@mips16e-64.l
|
||||
|
|
@ -0,0 +1,19 @@
|
|||
#objdump: -dr --prefix-addresses --show-raw-insn
|
||||
#name: MIPS relaxed macro with branch swapping
|
||||
#as: -32
|
||||
#source: relax-swap3.s
|
||||
|
||||
.*: +file format .*mips.*
|
||||
|
||||
Disassembly of section \.text:
|
||||
[0-9a-f]+ <[^>]*> f000 6a20 lui v0,0x0
|
||||
[ ]*[0-9a-f]+: R_MIPS16_HI16 bar
|
||||
[0-9a-f]+ <[^>]*> f000 4a00 addiu v0,0
|
||||
[ ]*[0-9a-f]+: R_MIPS16_LO16 bar
|
||||
[0-9a-f]+ <[^>]*> eb80 jrc v1
|
||||
[0-9a-f]+ <[^>]*> f000 6a20 lui v0,0x0
|
||||
[ ]*[0-9a-f]+: R_MIPS16_HI16 bar
|
||||
[0-9a-f]+ <[^>]*> f000 4a00 addiu v0,0
|
||||
[ ]*[0-9a-f]+: R_MIPS16_LO16 bar
|
||||
[0-9a-f]+ <[^>]*> 2300 beqz v1,[0-9a-f]+ <[^>]*>
|
||||
\.\.\.
|
||||
Loading…
Reference in New Issue