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X86: Rename REG_82 to REG_83 

The REG_82 entry in x86 disassembler is for opcode 0x83, not opcode
0x82.

	* i386-dis.c (REG_82): Renamed to ...
	(REG_83): This.
	(dis386): Updated.
	(reg_table): Likewise.
This commit is contained in:
H.J. Lu 2016-11-03 08:38:13 -07:00
parent 04180708ef
commit 7148c36989
2 changed files with 10 additions and 3 deletions
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7
opcodes/ChangeLog
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@ -1,3 +1,10 @@
2016-11-03 H.J. Lu <hongjiu.lu@intel.com>
* i386-dis.c (REG_82): Renamed to ...
(REG_83): This.
(dis386): Updated.
(reg_table): Likewise.
2016-11-02 Igor Tsimbalist <igor.v.tsimbalist@intel.com>
* i386-dis.c (enum): Add PREFIX_EVEX_0F3852, PREFIX_EVEX_0F3853.

6
opcodes/i386-dis.c
View File

@ -706,7 +706,7 @@ enum
{
REG_80 = 0,
REG_81,
REG_82,
REG_83,
REG_8F,
REG_C0,
REG_C1,
@ -2663,7 +2663,7 @@ static const struct dis386 dis386[] = {
{ REG_TABLE (REG_80) },
{ REG_TABLE (REG_81) },
{ Bad_Opcode },
{ REG_TABLE (REG_82) },
{ REG_TABLE (REG_83) },
{ "testB", { Eb, Gb }, 0 },
{ "testS", { Ev, Gv }, 0 },
{ "xchgB", { Ebh2, Gb }, 0 },
@ -3400,7 +3400,7 @@ static const struct dis386 reg_table[][8] = {
{ "xorQ", { Evh1, Iv }, 0 },
{ "cmpQ", { Ev, Iv }, 0 },
},
/* REG_82 */
/* REG_83 */
{
{ "addQ", { Evh1, sIb }, 0 },
{ "orQ", { Evh1, sIb }, 0 },