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Implement "dbt" and "rtd" instructions. 

Import fixes to dmap_addr() from mitsu branch.
This commit is contained in:
Andrew Cagney 1998-02-16 00:35:57 +00:00
parent b104806fd3
commit 729295b597
2 changed files with 40 additions and 15 deletions
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15
sim/d10v/ChangeLog
View File

@ -1,3 +1,18 @@
Mon Oct 27 14:43:33 1997 Fred Fish <fnf@cygnus.com>
* (dmem_addr): If address is illegal or in I/O space, signal a bus
error. Allocate unified memory on demand. Fix DMEM address
calculations.
Mon Feb 16 10:27:53 1998 Andrew Cagney <cagney@b1.cygnus.com>
* simops.c (OP_5F20): Implement "dbt".
(OP_5F60): Implement "rtd".
* d10v_sim.h (DPC_CR): Define enum.
(DBT_VECTOR_START): Define
(DPSW, DPC): Define.
Fri Feb 13 15:15:58 1998 Andrew Cagney <cagney@b1.cygnus.com> Fri Feb 13 15:15:58 1998 Andrew Cagney <cagney@b1.cygnus.com>
* simops.c (move_to_cr): Sync regs[SP_IDX] with State.sp according * simops.c (move_to_cr): Sync regs[SP_IDX] with State.sp according

26
sim/d10v/interp.c
View File

@ -627,21 +627,31 @@ dmem_addr( addr )
if (DMAP & 0x1000) if (DMAP & 0x1000)
{ {
/* instruction memory */ /* instruction memory */
return (DMAP & 0xf) * 0x4000 + State.imem; return (DMAP & 0xf) * 0x4000 + State.imem + (addr - 0x8000);
} }
else
{
/* unified memory */ /* unified memory */
/* this is ugly because we allocate unified memory in 128K segments and */ /* this is ugly because we allocate unified memory in 128K segments and */
/* dmap addresses 16k segments */ /* dmap addresses 16k segments */
seg = (DMAP & 0x3ff) >> 3; seg = (DMAP & 0x3ff) >> 3;
if (State.umem[seg] == NULL) if (State.umem[seg] == NULL)
{ {
(*d10v_callback->printf_filtered) (d10v_callback, "ERROR: unified memory region %d unmapped, pc = 0x%lx\n", #ifdef DEBUG
(*d10v_callback->printf_filtered) (d10v_callback,"Allocating %d bytes unified memory to region %d\n", 1<<UMEM_SIZE, seg);
#endif
State.umem[seg] = (uint8 *)calloc(1,1<<UMEM_SIZE);
if (!State.umem[seg])
{
(*d10v_callback->printf_filtered) (d10v_callback,
"ERROR: alloc failed. unified memory region %d unmapped, pc = 0x%lx\n",
seg, (long)decode_pc ()); seg, (long)decode_pc ());
State.exception = SIGBUS; State.exception = SIGBUS;
} }
return State.umem[seg] + (DMAP & 7) * 0x4000;
} }
return State.umem[seg] + (DMAP & 7) * 0x4000 + (addr - 0x8000);
}
}
return State.dmem + addr; return State.dmem + addr;
} }
@ -903,13 +913,13 @@ sim_create_inferior (sd, abfd, argv, env)
{ {
/* a hack to set r0/r1 with argc/argv */ /* a hack to set r0/r1 with argc/argv */
/* some high memory that won't be overwritten by the stack soon */ /* some high memory that won't be overwritten by the stack soon */
addr = State.regs[0] = 0x7C00; bfd_vma addr = State.regs[0] = 0x7C00;
p = 20; int p = 20;
i = 0; int i = 0;
while (argv[i]) while (argv[i])
{ {
int size = strlen (argv[i]) + 1;
SW (addr + 2*i, addr + p); SW (addr + 2*i, addr + p);
size = strlen (argv[i]) + 1;
sim_write (sd, addr + 0, argv[i], size); sim_write (sd, addr + 0, argv[i], size);
p += size; p += size;
i++; i++;