[ARM] Add support for thumb1 pcrop relocations.
To support thumb1 execute-only code we need to support four new relocations (R_ARM_THM_ALU_ABS_G0_NC, R_ARM_THM_ALU_ABS_G1_NC, R_ARM_THM_ALU_ABS_G2_NC and R_ARM_THM_ALU_ABS_G3_NC). These relocations allow the static linker to finalize construction of symbol address. Typical sequence of code to get address of the symbol foo is then the following : movs r3, #:upper8_15:#foo lsls r3, #8 adds r3, #:upper0_7:#foo lsls r3, #8 adds r3, #:lower8_15:#foo lsls r3, #8 adds r3, #:lower0_7:#foo This will give following sequence of text and relocations after assembly : 4: 2300 movs r3, #0 4: R_ARM_THM_ALU_ABS_G3_NC foo 6: 021b lsls r3, r3, #8 8: 3300 adds r3, #0 8: R_ARM_THM_ALU_ABS_G2_NC foo a: 021b lsls r3, r3, #8 c: 3300 adds r3, #0 c: R_ARM_THM_ALU_ABS_G1_NC foo e: 021b lsls r3, r3, #8 10: 3300 adds r3, #0 10: R_ARM_THM_ALU_ABS_G0_NC foo
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9c35a52902
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@ -3516,6 +3516,12 @@ pc-relative or some form of GOT-indirect relocation. */
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/* ARM support for STT_GNU_IFUNC. */
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BFD_RELOC_ARM_IRELATIVE,
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/* Thumb1 relocations to support execute-only code. */
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BFD_RELOC_ARM_THUMB_ALU_ABS_G0_NC,
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BFD_RELOC_ARM_THUMB_ALU_ABS_G1_NC,
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BFD_RELOC_ARM_THUMB_ALU_ABS_G2_NC,
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BFD_RELOC_ARM_THUMB_ALU_ABS_G3_NC,
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/* These relocs are only used within the ARM assembler. They are not
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(at present) written to any object files. */
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BFD_RELOC_ARM_IMMEDIATE,
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@ -1689,6 +1689,60 @@ static reloc_howto_type elf32_arm_howto_table_1[] =
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0x00000000, /* src_mask */
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0x00000000, /* dst_mask */
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FALSE), /* pcrel_offset */
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EMPTY_HOWTO (130),
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EMPTY_HOWTO (131),
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HOWTO (R_ARM_THM_ALU_ABS_G0_NC,/* type. */
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0, /* rightshift. */
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1, /* size (0 = byte, 1 = short, 2 = long). */
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16, /* bitsize. */
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FALSE, /* pc_relative. */
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0, /* bitpos. */
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complain_overflow_bitfield,/* complain_on_overflow. */
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bfd_elf_generic_reloc, /* special_function. */
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"R_ARM_THM_ALU_ABS_G0_NC",/* name. */
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FALSE, /* partial_inplace. */
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0x00000000, /* src_mask. */
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0x00000000, /* dst_mask. */
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FALSE), /* pcrel_offset. */
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HOWTO (R_ARM_THM_ALU_ABS_G1_NC,/* type. */
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0, /* rightshift. */
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1, /* size (0 = byte, 1 = short, 2 = long). */
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16, /* bitsize. */
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FALSE, /* pc_relative. */
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0, /* bitpos. */
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complain_overflow_bitfield,/* complain_on_overflow. */
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bfd_elf_generic_reloc, /* special_function. */
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"R_ARM_THM_ALU_ABS_G1_NC",/* name. */
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FALSE, /* partial_inplace. */
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0x00000000, /* src_mask. */
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0x00000000, /* dst_mask. */
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FALSE), /* pcrel_offset. */
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HOWTO (R_ARM_THM_ALU_ABS_G2_NC,/* type. */
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0, /* rightshift. */
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1, /* size (0 = byte, 1 = short, 2 = long). */
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16, /* bitsize. */
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FALSE, /* pc_relative. */
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0, /* bitpos. */
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complain_overflow_bitfield,/* complain_on_overflow. */
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bfd_elf_generic_reloc, /* special_function. */
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"R_ARM_THM_ALU_ABS_G2_NC",/* name. */
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FALSE, /* partial_inplace. */
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0x00000000, /* src_mask. */
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0x00000000, /* dst_mask. */
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FALSE), /* pcrel_offset. */
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HOWTO (R_ARM_THM_ALU_ABS_G3_NC,/* type. */
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0, /* rightshift. */
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1, /* size (0 = byte, 1 = short, 2 = long). */
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16, /* bitsize. */
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FALSE, /* pc_relative. */
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0, /* bitpos. */
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complain_overflow_bitfield,/* complain_on_overflow. */
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bfd_elf_generic_reloc, /* special_function. */
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"R_ARM_THM_ALU_ABS_G3_NC",/* name. */
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FALSE, /* partial_inplace. */
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0x00000000, /* src_mask. */
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0x00000000, /* dst_mask. */
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FALSE), /* pcrel_offset. */
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};
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/* 160 onwards: */
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@ -1889,7 +1943,11 @@ static const struct elf32_arm_reloc_map elf32_arm_reloc_map[] =
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{BFD_RELOC_ARM_LDC_SB_G0, R_ARM_LDC_SB_G0},
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{BFD_RELOC_ARM_LDC_SB_G1, R_ARM_LDC_SB_G1},
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{BFD_RELOC_ARM_LDC_SB_G2, R_ARM_LDC_SB_G2},
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{BFD_RELOC_ARM_V4BX, R_ARM_V4BX}
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{BFD_RELOC_ARM_V4BX, R_ARM_V4BX},
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{BFD_RELOC_ARM_THUMB_ALU_ABS_G3_NC, R_ARM_THM_ALU_ABS_G3_NC},
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{BFD_RELOC_ARM_THUMB_ALU_ABS_G2_NC, R_ARM_THM_ALU_ABS_G2_NC},
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{BFD_RELOC_ARM_THUMB_ALU_ABS_G1_NC, R_ARM_THM_ALU_ABS_G1_NC},
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{BFD_RELOC_ARM_THUMB_ALU_ABS_G0_NC, R_ARM_THM_ALU_ABS_G0_NC}
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};
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static reloc_howto_type *
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@ -11023,6 +11081,33 @@ elf32_arm_final_link_relocate (reloc_howto_type * howto,
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}
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return bfd_reloc_ok;
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case R_ARM_THM_ALU_ABS_G0_NC:
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case R_ARM_THM_ALU_ABS_G1_NC:
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case R_ARM_THM_ALU_ABS_G2_NC:
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case R_ARM_THM_ALU_ABS_G3_NC:
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{
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const int shift_array[4] = {0, 8, 16, 24};
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bfd_vma insn = bfd_get_16 (input_bfd, hit_data);
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bfd_vma addr = value;
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int shift = shift_array[r_type - R_ARM_THM_ALU_ABS_G0_NC];
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/* Compute address. */
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if (globals->use_rel)
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signed_addend = insn & 0xff;
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addr += signed_addend;
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if (branch_type == ST_BRANCH_TO_THUMB)
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addr |= 1;
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/* Clean imm8 insn. */
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insn &= 0xff00;
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/* And update with correct part of address. */
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insn |= (addr >> shift) & 0xff;
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/* Update insn. */
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bfd_put_16 (input_bfd, insn, hit_data);
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}
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*unresolved_reloc_p = FALSE;
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return bfd_reloc_ok;
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default:
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return bfd_reloc_notsupported;
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}
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@ -1545,6 +1545,10 @@ static const char *const bfd_reloc_code_real_names[] = { "@@uninitialized@@",
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"BFD_RELOC_ARM_LDC_SB_G2",
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"BFD_RELOC_ARM_V4BX",
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"BFD_RELOC_ARM_IRELATIVE",
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"BFD_RELOC_ARM_THUMB_ALU_ABS_G0_NC",
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"BFD_RELOC_ARM_THUMB_ALU_ABS_G1_NC",
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"BFD_RELOC_ARM_THUMB_ALU_ABS_G2_NC",
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"BFD_RELOC_ARM_THUMB_ALU_ABS_G3_NC",
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"BFD_RELOC_ARM_IMMEDIATE",
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"BFD_RELOC_ARM_ADRL_IMMEDIATE",
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"BFD_RELOC_ARM_T32_IMMEDIATE",
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11
bfd/reloc.c
11
bfd/reloc.c
@ -3271,6 +3271,17 @@ ENUM
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ENUMDOC
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ARM support for STT_GNU_IFUNC.
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ENUM
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BFD_RELOC_ARM_THUMB_ALU_ABS_G0_NC
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ENUMX
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BFD_RELOC_ARM_THUMB_ALU_ABS_G1_NC
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ENUMX
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BFD_RELOC_ARM_THUMB_ALU_ABS_G2_NC
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ENUMX
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BFD_RELOC_ARM_THUMB_ALU_ABS_G3_NC
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ENUMDOC
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Thumb1 relocations to support execute-only code.
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ENUM
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BFD_RELOC_ARM_IMMEDIATE
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ENUMX
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@ -5273,7 +5273,28 @@ static struct group_reloc_table_entry group_reloc_table[] =
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BFD_RELOC_ARM_ALU_SB_G2, /* ALU */
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BFD_RELOC_ARM_LDR_SB_G2, /* LDR */
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BFD_RELOC_ARM_LDRS_SB_G2, /* LDRS */
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BFD_RELOC_ARM_LDC_SB_G2 } }; /* LDC */
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BFD_RELOC_ARM_LDC_SB_G2 }, /* LDC */
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/* Absolute thumb alu relocations. */
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{ "lower0_7",
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BFD_RELOC_ARM_THUMB_ALU_ABS_G0_NC,/* ALU. */
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0, /* LDR. */
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0, /* LDRS. */
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0 }, /* LDC. */
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{ "lower8_15",
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BFD_RELOC_ARM_THUMB_ALU_ABS_G1_NC,/* ALU. */
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0, /* LDR. */
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0, /* LDRS. */
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0 }, /* LDC. */
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{ "upper0_7",
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BFD_RELOC_ARM_THUMB_ALU_ABS_G2_NC,/* ALU. */
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0, /* LDR. */
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0, /* LDRS. */
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0 }, /* LDC. */
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{ "upper8_15",
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BFD_RELOC_ARM_THUMB_ALU_ABS_G3_NC,/* ALU. */
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0, /* LDR. */
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0, /* LDRS. */
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0 } }; /* LDC. */
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/* Given the address of a pointer pointing to the textual name of a group
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relocation as may appear in assembler source, attempt to find its details
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@ -10394,6 +10415,8 @@ do_t_add_sub (void)
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{
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inst.instruction = THUMB_OP16(opcode);
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inst.instruction |= (Rd << 4) | Rs;
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if (inst.reloc.type < BFD_RELOC_ARM_THUMB_ALU_ABS_G0_NC
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|| inst.reloc.type > BFD_RELOC_ARM_THUMB_ALU_ABS_G3_NC)
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inst.reloc.type = BFD_RELOC_ARM_THUMB_ADD;
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if (inst.size_req != 2)
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inst.relax = opcode;
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@ -11745,7 +11768,11 @@ do_t_mov_cmp (void)
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inst.instruction = THUMB_OP16 (opcode);
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inst.instruction |= Rn << 8;
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if (inst.size_req == 2)
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{
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if (inst.reloc.type < BFD_RELOC_ARM_THUMB_ALU_ABS_G0_NC
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|| inst.reloc.type > BFD_RELOC_ARM_THUMB_ALU_ABS_G3_NC)
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inst.reloc.type = BFD_RELOC_ARM_THUMB_IMM;
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}
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else
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inst.relax = opcode;
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}
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@ -18608,7 +18635,7 @@ static const struct asm_opcode insns[] =
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CL("cmnp", 170f000, 2, (RR, SH), cmp),
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tCE("mov", 1a00000, _mov, 2, (RR, SH), mov, t_mov_cmp),
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tC3("movs", 1b00000, _movs, 2, (RR, SH), mov, t_mov_cmp),
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tC3("movs", 1b00000, _movs, 2, (RR, SHG), mov, t_mov_cmp),
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tCE("mvn", 1e00000, _mvn, 2, (RR, SH), mov, t_mvn_tst),
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tC3("mvns", 1f00000, _mvns, 2, (RR, SH), mov, t_mvn_tst),
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@ -23242,6 +23269,68 @@ md_apply_fix (fixS * fixP,
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}
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return;
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case BFD_RELOC_ARM_THUMB_ALU_ABS_G0_NC:
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case BFD_RELOC_ARM_THUMB_ALU_ABS_G1_NC:
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case BFD_RELOC_ARM_THUMB_ALU_ABS_G2_NC:
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case BFD_RELOC_ARM_THUMB_ALU_ABS_G3_NC:
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gas_assert (!fixP->fx_done);
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{
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bfd_vma insn;
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bfd_boolean is_mov;
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bfd_vma encoded_addend = value;
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/* Check that addend can be encoded in instruction. */
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if (!seg->use_rela_p && (value < 0 || value > 255))
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as_bad_where (fixP->fx_file, fixP->fx_line,
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_("the offset 0x%08lX is not representable"),
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(unsigned long) encoded_addend);
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/* Extract the instruction. */
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insn = md_chars_to_number (buf, THUMB_SIZE);
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is_mov = (insn & 0xf800) == 0x2000;
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/* Encode insn. */
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if (is_mov)
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{
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if (!seg->use_rela_p)
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insn |= encoded_addend;
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}
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else
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{
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int rd, rs;
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/* Extract the instruction. */
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/* Encoding is the following
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0x8000 SUB
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0x00F0 Rd
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0x000F Rs
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*/
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/* The following conditions must be true :
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- ADD
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- Rd == Rs
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- Rd <= 7
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*/
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rd = (insn >> 4) & 0xf;
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rs = insn & 0xf;
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if ((insn & 0x8000) || (rd != rs) || rd > 7)
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as_bad_where (fixP->fx_file, fixP->fx_line,
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_("Unable to process relocation for thumb opcode: %lx"),
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(unsigned long) insn);
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/* Encode as ADD immediate8 thumb 1 code. */
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insn = 0x3000 | (rd << 8);
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/* Place the encoded addend into the first 8 bits of the
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instruction. */
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if (!seg->use_rela_p)
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insn |= encoded_addend;
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}
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/* Update the instruction. */
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md_number_to_chars (buf, insn, THUMB_SIZE);
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}
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break;
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case BFD_RELOC_ARM_ALU_PC_G0_NC:
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case BFD_RELOC_ARM_ALU_PC_G0:
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case BFD_RELOC_ARM_ALU_PC_G1_NC:
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@ -23579,6 +23668,10 @@ tc_gen_reloc (asection *section, fixS *fixp)
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case BFD_RELOC_ARM_LDC_SB_G1:
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case BFD_RELOC_ARM_LDC_SB_G2:
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case BFD_RELOC_ARM_V4BX:
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case BFD_RELOC_ARM_THUMB_ALU_ABS_G0_NC:
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case BFD_RELOC_ARM_THUMB_ALU_ABS_G1_NC:
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case BFD_RELOC_ARM_THUMB_ALU_ABS_G2_NC:
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case BFD_RELOC_ARM_THUMB_ALU_ABS_G3_NC:
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code = fixp->fx_r_type;
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break;
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@ -23881,6 +23974,12 @@ arm_fix_adjustable (fixS * fixP)
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|| fixP->fx_r_type == BFD_RELOC_ARM_THUMB_MOVT_PCREL)
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return FALSE;
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/* BFD_RELOC_ARM_THUMB_ALU_ABS_Gx_NC relocations have VERY limited
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offsets, so keep these symbols. */
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if (fixP->fx_r_type >= BFD_RELOC_ARM_THUMB_ALU_ABS_G0_NC
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&& fixP->fx_r_type <= BFD_RELOC_ARM_THUMB_ALU_ABS_G3_NC)
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return FALSE;
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return TRUE;
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}
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#endif /* defined (OBJ_ELF) || defined (OBJ_COFF) */
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@ -537,6 +537,22 @@ respectively. For example to load the 32-bit address of foo into r0:
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MOVT r0, #:upper16:foo
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@end smallexample
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Relocations @samp{R_ARM_THM_ALU_ABS_G0_NC}, @samp{R_ARM_THM_ALU_ABS_G1_NC},
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@samp{R_ARM_THM_ALU_ABS_G2_NC} and @samp{R_ARM_THM_ALU_ABS_G3_NC} can be
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generated by prefixing the value with @samp{#:lower0_7:#},
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@samp{#:lower8_15:#}, @samp{#:upper0_7:#} and @samp{#:upper8_15:#}
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respectively. For example to load the 32-bit address of foo into r0:
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@smallexample
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MOVS r0, #:upper8_15:#foo
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LSLS r0, r0, #8
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ADDS r0, #:upper0_7:#foo
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LSLS r0, r0, #8
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ADDS r0, #:lower8_15:#foo
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LSLS r0, r0, #8
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ADDS r0, #:lower0_7:#foo
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@end smallexample
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@node ARM-Neon-Alignment
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@subsection NEON Alignment Specifiers
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16
gas/testsuite/gas/arm/adds-thumb1-reloc-local.d
Normal file
16
gas/testsuite/gas/arm/adds-thumb1-reloc-local.d
Normal file
@ -0,0 +1,16 @@
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#objdump: -dr --prefix-addresses --show-raw-insn
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#skip: *-*-*coff *-*-pe *-*-wince *-*-*aout* *-*-netbsd *-*-riscix*
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#name: ADDS relocations against local symbols for armv6s-m
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.*: +file format .*arm.*
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Disassembly of section .text:
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0[0-9a-f]+ <[^>]+> 3000 adds r0, #0
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0: R_ARM_THM_ALU_ABS_G3_NC bar
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0[0-9a-f]+ <[^>]+> 3000 adds r0, #0
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2: R_ARM_THM_ALU_ABS_G2_NC bar
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0[0-9a-f]+ <[^>]+> 3000 adds r0, #0
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4: R_ARM_THM_ALU_ABS_G1_NC bar
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0[0-9a-f]+ <[^>]+> 3000 adds r0, #0
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6: R_ARM_THM_ALU_ABS_G0_NC bar
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#...
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13
gas/testsuite/gas/arm/adds-thumb1-reloc-local.s
Normal file
13
gas/testsuite/gas/arm/adds-thumb1-reloc-local.s
Normal file
@ -0,0 +1,13 @@
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.arch armv6s-m
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.text
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.syntax unified
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.thumb
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foo:
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adds r0, #:upper8_15:#bar
|
||||
adds r0, #:upper0_7:#bar
|
||||
adds r0, #:lower8_15:#bar
|
||||
adds r0, #:lower0_7:#bar
|
||||
|
||||
.space 0x10000
|
||||
|
||||
bar:
|
16
gas/testsuite/gas/arm/movs-thumb1-reloc-local.d
Normal file
16
gas/testsuite/gas/arm/movs-thumb1-reloc-local.d
Normal file
@ -0,0 +1,16 @@
|
||||
#objdump: -dr --prefix-addresses --show-raw-insn
|
||||
#skip: *-*-*coff *-*-pe *-*-wince *-*-*aout* *-*-netbsd *-*-riscix*
|
||||
#name: MOVS relocations against local symbols for armv6s-m
|
||||
|
||||
.*: +file format .*arm.*
|
||||
|
||||
Disassembly of section .text:
|
||||
0[0-9a-f]+ <[^>]+> 2000 movs r0, #0
|
||||
0: R_ARM_THM_ALU_ABS_G3_NC bar
|
||||
0[0-9a-f]+ <[^>]+> 2000 movs r0, #0
|
||||
2: R_ARM_THM_ALU_ABS_G2_NC bar
|
||||
0[0-9a-f]+ <[^>]+> 2000 movs r0, #0
|
||||
4: R_ARM_THM_ALU_ABS_G1_NC bar
|
||||
0[0-9a-f]+ <[^>]+> 2000 movs r0, #0
|
||||
6: R_ARM_THM_ALU_ABS_G0_NC bar
|
||||
#...
|
13
gas/testsuite/gas/arm/movs-thumb1-reloc-local.s
Normal file
13
gas/testsuite/gas/arm/movs-thumb1-reloc-local.s
Normal file
@ -0,0 +1,13 @@
|
||||
.arch armv6s-m
|
||||
.text
|
||||
.syntax unified
|
||||
.thumb
|
||||
foo:
|
||||
movs r0, #:upper8_15:#bar
|
||||
movs r0, #:upper0_7:#bar
|
||||
movs r0, #:lower8_15:#bar
|
||||
movs r0, #:lower0_7:#bar
|
||||
|
||||
.space 0x10000
|
||||
|
||||
bar:
|
@ -230,6 +230,11 @@ START_RELOC_NUMBERS (elf_arm_reloc_type)
|
||||
RELOC_NUMBER (R_ARM_ME_TOO, 128) /* obsolete */
|
||||
RELOC_NUMBER (R_ARM_THM_TLS_DESCSEQ ,129)
|
||||
|
||||
RELOC_NUMBER (R_ARM_THM_ALU_ABS_G0_NC,132)
|
||||
RELOC_NUMBER (R_ARM_THM_ALU_ABS_G1_NC,133)
|
||||
RELOC_NUMBER (R_ARM_THM_ALU_ABS_G2_NC,134)
|
||||
RELOC_NUMBER (R_ARM_THM_ALU_ABS_G3_NC,135)
|
||||
|
||||
RELOC_NUMBER (R_ARM_IRELATIVE, 160)
|
||||
|
||||
/* Extensions? R=read-only? */
|
||||
|
@ -223,6 +223,12 @@ set armelftests_common {
|
||||
"" {pcrel-shared.s}
|
||||
{{readelf -dr pcrel-shared.rd}}
|
||||
"pcrel-shared.so"}
|
||||
{"MOVS thumb1 relocations" "-static -T arm.ld" "" "" {thumb1-movs.s}
|
||||
{{objdump -dw thumb1-movs.d}}
|
||||
"thumb1-movs"}
|
||||
{"ADDS thumb1 relocations" "-static -T arm.ld" "" "" {thumb1-adds.s}
|
||||
{{objdump -dw thumb1-adds.d}}
|
||||
"thumb1-adds"}
|
||||
}
|
||||
|
||||
set armelftests_nonacl {
|
||||
|
38
ld/testsuite/ld-arm/thumb1-adds.d
Normal file
38
ld/testsuite/ld-arm/thumb1-adds.d
Normal file
@ -0,0 +1,38 @@
|
||||
|
||||
.*: file format.*
|
||||
|
||||
Disassembly of section .text:
|
||||
|
||||
00008000 <[^>]*>:
|
||||
8000: 3012 adds r0, #18
|
||||
8002: 3134 adds r1, #52 ; 0x34
|
||||
8004: 3280 adds r2, #128 ; 0x80
|
||||
8006: 3301 adds r3, #1
|
||||
8008: 3401 adds r4, #1
|
||||
800a: 3500 adds r5, #0
|
||||
800c: 3600 adds r6, #0
|
||||
800e: 3700 adds r7, #0
|
||||
|
||||
00008010 <[^>]*>:
|
||||
8010: 3012 adds r0, #18
|
||||
8012: 3100 adds r1, #0
|
||||
8014: 3200 adds r2, #0
|
||||
8016: 33ca adds r3, #202 ; 0xca
|
||||
8018: 3700 adds r7, #0
|
||||
801a: 3634 adds r6, #52 ; 0x34
|
||||
801c: 3581 adds r5, #129 ; 0x81
|
||||
801e: 3423 adds r4, #35 ; 0x23
|
||||
|
||||
00008020 <[^>]*>:
|
||||
8020: 01 .byte 0x01
|
||||
|
||||
00008021 <[^>]*>:
|
||||
8021: 02 .byte 0x02
|
||||
|
||||
Disassembly of section .far:
|
||||
|
||||
12340000 <[^>]*>:
|
||||
12340000: 3000 adds r0, #0
|
||||
12340002: 3100 adds r1, #0
|
||||
12340004: 3200 adds r2, #0
|
||||
12340006: 3301 adds r3, #1
|
43
ld/testsuite/ld-arm/thumb1-adds.s
Normal file
43
ld/testsuite/ld-arm/thumb1-adds.s
Normal file
@ -0,0 +1,43 @@
|
||||
.text
|
||||
.arch armv6s-m
|
||||
.syntax unified
|
||||
.global _start
|
||||
.thumb_func
|
||||
.type _start, %function
|
||||
_start:
|
||||
.thumb_func
|
||||
.type thumb1, %function
|
||||
thumb1:
|
||||
adds r0, #:upper8_15:#thumb3
|
||||
adds r1, #:upper0_7:#thumb3
|
||||
adds r2, #:lower8_15:#thumb1
|
||||
adds r3, #:lower0_7:#thumb1
|
||||
adds r4, #:lower0_7:#thumb3
|
||||
adds r5, #:lower8_15:#thumb3
|
||||
adds r6, #:upper0_7:#thumb1
|
||||
adds r7, #:upper8_15:#thumb1
|
||||
.thumb_func
|
||||
.type thumb2, %function
|
||||
thumb2:
|
||||
adds r0, #:upper8_15:#thumb3
|
||||
adds r1, #:upper0_7:#(var2 + 1)
|
||||
adds r2, #:lower8_15:#(thumb3 + 255)
|
||||
adds r3, #:lower0_7:#(var1 + 0xaa)
|
||||
adds r7, #:upper8_15:#var1 + 4
|
||||
adds r6, #:upper0_7:#thumb3
|
||||
adds r5, #:lower8_15:#var2 + 0xff
|
||||
adds r4, #:lower0_7:#var2 - (-2)
|
||||
var1:
|
||||
.byte 1
|
||||
var2:
|
||||
.byte 2
|
||||
|
||||
.section .far, "ax", %progbits
|
||||
.thumb_func
|
||||
.type thumb3, %function
|
||||
thumb3:
|
||||
adds r0, #:upper8_15:#thumb1
|
||||
adds r1, #:upper0_7:#thumb2
|
||||
adds r2, #:lower8_15:#thumb3
|
||||
adds r3, #:lower0_7:#thumb1
|
||||
|
38
ld/testsuite/ld-arm/thumb1-movs.d
Normal file
38
ld/testsuite/ld-arm/thumb1-movs.d
Normal file
@ -0,0 +1,38 @@
|
||||
|
||||
.*: file format.*
|
||||
|
||||
Disassembly of section .text:
|
||||
|
||||
00008000 <[^>]*>:
|
||||
8000: 2012 movs r0, #18
|
||||
8002: 2134 movs r1, #52 ; 0x34
|
||||
8004: 2280 movs r2, #128 ; 0x80
|
||||
8006: 2301 movs r3, #1
|
||||
8008: 2401 movs r4, #1
|
||||
800a: 2500 movs r5, #0
|
||||
800c: 2600 movs r6, #0
|
||||
800e: 2700 movs r7, #0
|
||||
|
||||
00008010 <[^>]*>:
|
||||
8010: 2012 movs r0, #18
|
||||
8012: 2100 movs r1, #0
|
||||
8014: 2281 movs r2, #129 ; 0x81
|
||||
8016: 2320 movs r3, #32
|
||||
8018: 2700 movs r7, #0
|
||||
801a: 2600 movs r6, #0
|
||||
801c: 2581 movs r5, #129 ; 0x81
|
||||
801e: 2422 movs r4, #34 ; 0x22
|
||||
|
||||
00008020 <[^>]*>:
|
||||
8020: 01 .byte 0x01
|
||||
|
||||
00008021 <[^>]*>:
|
||||
8021: 02 .byte 0x02
|
||||
|
||||
Disassembly of section .far:
|
||||
|
||||
12340000 <[^>]*>:
|
||||
12340000: 2000 movs r0, #0
|
||||
12340002: 2100 movs r1, #0
|
||||
12340004: 2200 movs r2, #0
|
||||
12340006: 2301 movs r3, #1
|
43
ld/testsuite/ld-arm/thumb1-movs.s
Normal file
43
ld/testsuite/ld-arm/thumb1-movs.s
Normal file
@ -0,0 +1,43 @@
|
||||
.text
|
||||
.arch armv6s-m
|
||||
.syntax unified
|
||||
.global _start
|
||||
.thumb_func
|
||||
.type _start, %function
|
||||
_start:
|
||||
.thumb_func
|
||||
.type thumb1, %function
|
||||
thumb1:
|
||||
movs r0, #:upper8_15:#thumb3
|
||||
movs r1, #:upper0_7:#thumb3
|
||||
movs r2, #:lower8_15:#thumb1
|
||||
movs r3, #:lower0_7:#thumb1
|
||||
movs r4, #:lower0_7:#thumb3
|
||||
movs r5, #:lower8_15:#thumb3
|
||||
movs r6, #:upper0_7:#thumb1
|
||||
movs r7, #:upper8_15:#thumb1
|
||||
.thumb_func
|
||||
.type thumb2, %function
|
||||
thumb2:
|
||||
movs r0, #:upper8_15:#(thumb3 + 0)
|
||||
movs r1, #:upper0_7:#(thumb2 + 1)
|
||||
movs r2, #:lower8_15:#(var1 + 255)
|
||||
movs r3, #:lower0_7:#var1
|
||||
movs r7, #:upper8_15:#var1 + 4
|
||||
movs r6, #:upper0_7:#var2
|
||||
movs r5, #:lower8_15:#var2 + 0xff
|
||||
movs r4, #:lower0_7:#var2 - (-1)
|
||||
var1:
|
||||
.byte 1
|
||||
var2:
|
||||
.byte 2
|
||||
|
||||
.section .far, "ax", %progbits
|
||||
.thumb_func
|
||||
.type thumb3, %function
|
||||
thumb3:
|
||||
movs r0, #:upper8_15:#thumb1
|
||||
movs r1, #:upper0_7:#thumb2
|
||||
movs r2, #:lower8_15:#thumb3
|
||||
movs r3, #:lower0_7:#thumb1
|
||||
|
Loading…
Reference in New Issue
Block a user