Require another match for AVX512VL
The AVX512VL bit alone isn't sufficient to select a 128-bit or 256-bit AVX512 instruction. We must match another AVX512 bit. PR gas/20140 * config/tc-i386.c (cpu_flags_match): Require another match for AVX512VL. * testsuite/gas/i386/i386.exp: Run avx512vl-1, avx512vl-2, x86-64-avx512vl-1 and x86-64-avx512vl-2. * testsuite/gas/i386/avx512vl-1.l: New file. * testsuite/gas/i386/avx512vl-1.s: Likewise. * testsuite/gas/i386/avx512vl-2.l: Likewise. * testsuite/gas/i386/avx512vl-2.s: Likewise. * testsuite/gas/i386/x86-64-avx512vl-1.l: Likewise. * testsuite/gas/i386/x86-64-avx512vl-1.s: Likewise. * testsuite/gas/i386/x86-64-avx512vl-2.l: Likewise. * testsuite/gas/i386/x86-64-avx512vl-2.s: Likewise.
This commit is contained in:
parent
de341542a6
commit
73b090a922
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@ -1,3 +1,19 @@
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2016-05-25 H.J. Lu <hongjiu.lu@intel.com>
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PR gas/20140
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* config/tc-i386.c (cpu_flags_match): Require another match
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for AVX512VL.
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* testsuite/gas/i386/i386.exp: Run avx512vl-1, avx512vl-2,
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x86-64-avx512vl-1 and x86-64-avx512vl-2.
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* testsuite/gas/i386/avx512vl-1.l: New file.
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* testsuite/gas/i386/avx512vl-1.s: Likewise.
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* testsuite/gas/i386/avx512vl-2.l: Likewise.
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* testsuite/gas/i386/avx512vl-2.s: Likewise.
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* testsuite/gas/i386/x86-64-avx512vl-1.l: Likewise.
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* testsuite/gas/i386/x86-64-avx512vl-1.s: Likewise.
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* testsuite/gas/i386/x86-64-avx512vl-2.l: Likewise.
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* testsuite/gas/i386/x86-64-avx512vl-2.s: Likewise.
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2016-05-25 H.J. Lu <hongjiu.lu@intel.com>
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PR gas/20141
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@ -1564,6 +1564,21 @@ cpu_flags_match (const insn_template *t)
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else
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match |= CPU_FLAGS_ARCH_MATCH;
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}
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else if (x.bitfield.cpuavx512vl)
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{
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/* Match AVX512VL. */
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if (cpu.bitfield.cpuavx512vl)
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{
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/* Need another match. */
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cpu.bitfield.cpuavx512vl = 0;
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if (!cpu_flags_all_zero (&cpu))
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match |= CPU_FLAGS_32BIT_MATCH;
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else
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match |= CPU_FLAGS_ARCH_MATCH;
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}
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else
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match |= CPU_FLAGS_ARCH_MATCH;
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}
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else
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match |= CPU_FLAGS_32BIT_MATCH;
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}
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@ -0,0 +1,39 @@
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.*: Assembler messages:
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.*:7: Error: .*bad register name.*
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.*:8: Error: .*corei7\.avx.*
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.*:9: Error: .*corei7\.avx.*
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.*:10: Error: .*corei7\.avx.*
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.*:15: Error: .*unsupported.*
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.*:16: Error: .*unsupported.*
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GAS LISTING .*
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#...
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[ ]*1[ ]+\.text
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[ ]*2[ ]+\.arch corei7
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[ ]*3[ ]+_start:
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[ ]*4[ ]+\.arch \.avx
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[ ]*5[ ]+\?\?\?\? C5F9E711 vmovntdq %xmm2, \(%ecx\)
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[ ]*6[ ]+\?\?\?\? C5FDE711 vmovntdq %ymm2, \(%ecx\)
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[ ]*7[ ]+vmovntdq %zmm2, \(%ecx\)
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[ ]*8[ ]+vpternlogq \$0xab, %xmm6, %xmm2, %xmm0
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[ ]*9[ ]+vpternlogq \$0xab, %ymm6, %ymm2, %ymm0
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[ ]*10[ ]+vpternlogq \$0xab, %zmm6, %zmm2, %zmm0
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[ ]*11[ ]+\.arch \.avx512f
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[ ]*12[ ]+\?\?\?\? C5F9E701 vmovntdq %xmm0, \(%ecx\)
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[ ]*13[ ]+\?\?\?\? C5FDE701 vmovntdq %ymm0, \(%ecx\)
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[ ]*14[ ]+\?\?\?\? 62F17D48 vmovntdq %zmm0, \(%ecx\)
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[ ]*14[ ]+E701
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[ ]*15[ ]+vpternlogq \$0xab, %xmm6, %xmm2, %xmm0
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[ ]*16[ ]+vpternlogq \$0xab, %ymm6, %ymm2, %ymm0
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[ ]*17[ ]+\?\?\?\? 62F3ED48 vpternlogq \$0xab, %zmm6, %zmm2, %zmm0
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[ ]*17[ ]+25C6AB
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[ ]*18[ ]+\.arch \.avx512vl
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[ ]*19[ ]+\?\?\?\? C5F9E701 vmovntdq %xmm0, \(%ecx\)
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[ ]*20[ ]+\?\?\?\? C5FDE701 vmovntdq %ymm0, \(%ecx\)
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[ ]*21[ ]+\?\?\?\? 62F17D48 vmovntdq %zmm0, \(%ecx\)
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[ ]*21[ ]+E701
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[ ]*22[ ]+\?\?\?\? 62F3ED08 vpternlogq \$0xab, %xmm6, %xmm2, %xmm0
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[ ]*22[ ]+25C6AB
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[ ]*23[ ]+\?\?\?\? 62F3ED28 vpternlogq \$0xab, %ymm6, %ymm2, %ymm0
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[ ]*23[ ]+25C6AB
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[ ]*24[ ]+\?\?\?\? 62F3ED48 vpternlogq \$0xab, %zmm6, %zmm2, %zmm0
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[ ]*24[ ]+25C6AB
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@ -0,0 +1,24 @@
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.text
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.arch corei7
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_start:
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.arch .avx
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vmovntdq %xmm2, (%ecx)
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vmovntdq %ymm2, (%ecx)
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vmovntdq %zmm2, (%ecx)
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vpternlogq $0xab, %xmm6, %xmm2, %xmm0
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vpternlogq $0xab, %ymm6, %ymm2, %ymm0
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vpternlogq $0xab, %zmm6, %zmm2, %zmm0
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.arch .avx512f
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vmovntdq %xmm0, (%ecx)
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vmovntdq %ymm0, (%ecx)
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vmovntdq %zmm0, (%ecx)
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vpternlogq $0xab, %xmm6, %xmm2, %xmm0
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vpternlogq $0xab, %ymm6, %ymm2, %ymm0
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vpternlogq $0xab, %zmm6, %zmm2, %zmm0
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.arch .avx512vl
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vmovntdq %xmm0, (%ecx)
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vmovntdq %ymm0, (%ecx)
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vmovntdq %zmm0, (%ecx)
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vpternlogq $0xab, %xmm6, %xmm2, %xmm0
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vpternlogq $0xab, %ymm6, %ymm2, %ymm0
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vpternlogq $0xab, %zmm6, %zmm2, %zmm0
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@ -0,0 +1,27 @@
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.*: Assembler messages:
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.*:5: Error: .*corei7.*
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.*:6: Error: .*corei7.*
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.*:7: Error: .*corei7.*
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.*:9: Error: .*corei7\.avx\.avx512vl.*
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.*:10: Error: .*corei7\.avx\.avx512vl.*
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.*:11: Error: .*corei7\.avx\.avx512vl.*
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GAS LISTING .*
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#...
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[ ]*1[ ]+\.text
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[ ]*2[ ]+\.arch corei7
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[ ]*3[ ]+_start:
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[ ]*4[ ]+\.arch \.avx
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[ ]*5[ ]+vpconflictd %xmm0, %xmm5
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[ ]*6[ ]+vpconflictd %ymm0, %ymm5
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[ ]*7[ ]+vpconflictd %ymm0, %zmm5
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[ ]*8[ ]+\.arch \.avx512vl
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[ ]*9[ ]+vpconflictd %xmm0, %xmm5
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[ ]*10[ ]+vpconflictd %ymm0, %ymm5
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[ ]*11[ ]+vpconflictd %zmm0, %zmm5
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[ ]*12[ ]+\.arch \.avx512cd
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[ ]*13[ ]+\?\?\?\? 62F27D08 vpconflictd %xmm0, %xmm5
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[ ]*13[ ]+C4E8
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[ ]*14[ ]+\?\?\?\? 62F27D28 vpconflictd %ymm0, %ymm5
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[ ]*14[ ]+C4E8
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[ ]*15[ ]+\?\?\?\? 62F27D48 vpconflictd %zmm0, %zmm5
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[ ]*15[ ]+C4E8
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@ -0,0 +1,15 @@
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.text
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.arch corei7
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_start:
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.arch .avx
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vpconflictd %xmm0, %xmm5
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vpconflictd %ymm0, %ymm5
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vpconflictd %ymm0, %zmm5
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.arch .avx512vl
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vpconflictd %xmm0, %xmm5
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vpconflictd %ymm0, %ymm5
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vpconflictd %zmm0, %zmm5
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.arch .avx512cd
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vpconflictd %xmm0, %xmm5
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vpconflictd %ymm0, %ymm5
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vpconflictd %zmm0, %zmm5
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@ -356,6 +356,8 @@ if [expr ([istarget "i*86-*-*"] || [istarget "x86_64-*-*"]) && [gas_32_check]]
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run_dump_test "ospke"
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run_dump_test "rdpid"
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run_dump_test "rdpid-intel"
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run_list_test "avx512vl-1" "-al"
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run_list_test "avx512vl-2" "-al"
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# These tests require support for 8 and 16 bit relocs,
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# so we only run them for ELF and COFF targets.
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@ -754,6 +756,8 @@ if [expr ([istarget "i*86-*-*"] || [istarget "x86_64-*-*"]) && [gas_64_check]] t
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run_dump_test "x86-64-fence-as-lock-add-yes"
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run_dump_test "x86-64-fence-as-lock-add-no"
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run_dump_test "x86-64-pr20141"
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run_list_test "x86-64-avx512vl-1" "-al"
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run_list_test "x86-64-avx512vl-2" "-al"
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if { ![istarget "*-*-aix*"]
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&& ![istarget "*-*-beos*"]
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@ -0,0 +1,39 @@
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.*: Assembler messages:
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.*:7: Error: .*bad register name.*
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.*:8: Error: .*corei7\.avx.*
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.*:9: Error: .*corei7\.avx.*
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.*:10: Error: .*corei7\.avx.*
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.*:15: Error: .*unsupported.*
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.*:16: Error: .*unsupported.*
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GAS LISTING .*
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#...
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[ ]*1[ ]+\.text
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[ ]*2[ ]+\.arch corei7
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[ ]*3[ ]+_start:
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[ ]*4[ ]+\.arch \.avx
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[ ]*5[ ]+\?\?\?\? C5F9E711 vmovntdq %xmm2, \(%rcx\)
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[ ]*6[ ]+\?\?\?\? C5FDE711 vmovntdq %ymm2, \(%rcx\)
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[ ]*7[ ]+vmovntdq %zmm2, \(%rcx\)
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[ ]*8[ ]+vpternlogq \$0xab, %xmm16, %xmm2, %xmm0
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[ ]*9[ ]+vpternlogq \$0xab, %ymm16, %ymm2, %ymm0
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[ ]*10[ ]+vpternlogq \$0xab, %zmm16, %zmm2, %zmm0
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[ ]*11[ ]+\.arch \.avx512f
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[ ]*12[ ]+\?\?\?\? C5F9E701 vmovntdq %xmm0, \(%rcx\)
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[ ]*13[ ]+\?\?\?\? C5FDE701 vmovntdq %ymm0, \(%rcx\)
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[ ]*14[ ]+\?\?\?\? 62F17D48 vmovntdq %zmm0, \(%rcx\)
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[ ]*14[ ]+E701
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[ ]*15[ ]+vpternlogq \$0xab, %xmm16, %xmm2, %xmm0
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[ ]*16[ ]+vpternlogq \$0xab, %ymm16, %ymm2, %ymm0
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[ ]*17[ ]+\?\?\?\? 62B3ED48 vpternlogq \$0xab, %zmm16, %zmm2, %zmm0
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[ ]*17[ ]+25C0AB
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[ ]*18[ ]+\.arch \.avx512vl
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[ ]*19[ ]+\?\?\?\? C5F9E701 vmovntdq %xmm0, \(%rcx\)
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[ ]*20[ ]+\?\?\?\? C5FDE701 vmovntdq %ymm0, \(%rcx\)
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[ ]*21[ ]+\?\?\?\? 62F17D48 vmovntdq %zmm0, \(%rcx\)
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[ ]*21[ ]+E701
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[ ]*22[ ]+\?\?\?\? 62B3ED08 vpternlogq \$0xab, %xmm16, %xmm2, %xmm0
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[ ]*22[ ]+25C0AB
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[ ]*23[ ]+\?\?\?\? 62B3ED28 vpternlogq \$0xab, %ymm16, %ymm2, %ymm0
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[ ]*23[ ]+25C0AB
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[ ]*24[ ]+\?\?\?\? 62B3ED48 vpternlogq \$0xab, %zmm16, %zmm2, %zmm0
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[ ]*24[ ]+25C0AB
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@ -0,0 +1,24 @@
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.text
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.arch corei7
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_start:
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.arch .avx
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vmovntdq %xmm2, (%rcx)
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vmovntdq %ymm2, (%rcx)
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vmovntdq %zmm2, (%rcx)
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vpternlogq $0xab, %xmm16, %xmm2, %xmm0
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vpternlogq $0xab, %ymm16, %ymm2, %ymm0
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vpternlogq $0xab, %zmm16, %zmm2, %zmm0
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.arch .avx512f
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vmovntdq %xmm0, (%rcx)
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vmovntdq %ymm0, (%rcx)
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vmovntdq %zmm0, (%rcx)
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vpternlogq $0xab, %xmm16, %xmm2, %xmm0
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vpternlogq $0xab, %ymm16, %ymm2, %ymm0
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vpternlogq $0xab, %zmm16, %zmm2, %zmm0
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.arch .avx512vl
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vmovntdq %xmm0, (%rcx)
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vmovntdq %ymm0, (%rcx)
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vmovntdq %zmm0, (%rcx)
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vpternlogq $0xab, %xmm16, %xmm2, %xmm0
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vpternlogq $0xab, %ymm16, %ymm2, %ymm0
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vpternlogq $0xab, %zmm16, %zmm2, %zmm0
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@ -0,0 +1,27 @@
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.*: Assembler messages:
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.*:5: Error: .*corei7.*
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.*:6: Error: .*corei7.*
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.*:7: Error: .*corei7.*
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.*:9: Error: .*corei7\.avx\.avx512vl.*
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.*:10: Error: .*corei7\.avx\.avx512vl.*
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.*:11: Error: .*corei7\.avx\.avx512vl.*
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GAS LISTING .*
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#...
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[ ]*1[ ]+\.text
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[ ]*2[ ]+\.arch corei7
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[ ]*3[ ]+_start:
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[ ]*4[ ]+\.arch \.avx
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[ ]*5[ ]+vpconflictd %xmm0, %xmm25
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[ ]*6[ ]+vpconflictd %ymm0, %ymm25
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[ ]*7[ ]+vpconflictd %ymm0, %zmm25
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[ ]*8[ ]+\.arch \.avx512vl
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[ ]*9[ ]+vpconflictd %xmm0, %xmm25
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[ ]*10[ ]+vpconflictd %ymm0, %ymm25
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[ ]*11[ ]+vpconflictd %zmm0, %zmm25
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[ ]*12[ ]+\.arch \.avx512cd
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[ ]*13[ ]+\?\?\?\? 62627D08 vpconflictd %xmm0, %xmm25
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[ ]*13[ ]+C4C8
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[ ]*14[ ]+\?\?\?\? 62627D28 vpconflictd %ymm0, %ymm25
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[ ]*14[ ]+C4C8
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[ ]*15[ ]+\?\?\?\? 62627D48 vpconflictd %zmm0, %zmm25
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[ ]*15[ ]+C4C8
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@ -0,0 +1,15 @@
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.text
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.arch corei7
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_start:
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.arch .avx
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vpconflictd %xmm0, %xmm25
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vpconflictd %ymm0, %ymm25
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vpconflictd %ymm0, %zmm25
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.arch .avx512vl
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vpconflictd %xmm0, %xmm25
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vpconflictd %ymm0, %ymm25
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vpconflictd %zmm0, %zmm25
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.arch .avx512cd
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vpconflictd %xmm0, %xmm25
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vpconflictd %ymm0, %ymm25
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vpconflictd %zmm0, %zmm25
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Loading…
Reference in New Issue