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* cpu.h,extract.c: Regenerate. pc-rel calcs done on f_dispNN now. 

* cpux.h,readx.c,semx.c: Ditto.
This commit is contained in:
Doug Evans 1998-07-21 23:54:10 +00:00
parent b817384cca
commit 7422fa0cc8
5 changed files with 584 additions and 437 deletions
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36
sim/m32r/ChangeLog
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@ -1,3 +1,39 @@
Tue Jul 21 16:53:10 1998 Doug Evans <devans@seba.cygnus.com>
* cpu.h,extract.c: Regenerate. pc-rel calcs done on f_dispNN now.
start-sanitize-m32rx
* cpux.h,readx.c,semx.c: Ditto.
end-sanitize-m32rx
Wed Jul 1 16:51:15 1998 Doug Evans <devans@seba.cygnus.com>
* Makefile.in: cgen_maint -> CGEN_MAINT.
* configure.in: AC_SUBST cgen,cgendir. No longer look for guile.
* configure: Regenerate.
* arch.c,arch.h,cpuall.h: Regenerate.
* cpu.c,cpu.h,decode.c,decode.h,extract.c,model.c: Regenerate.
* sem-switch.c,sem.c: Regenerate.
start-sanitize-m32rx
* cpux.c,cpux.h,decodex.c,decodex.h,modelx.c,readx.c: Regenerate.
* semx.c: Regenerate.
* mloopx.in (icount): Moved here from genmloop.sh.
end-sanitize-m32rx
Sat Jun 13 07:49:23 1998 Doug Evans <devans@fallis.cygnus.com>
* m32r-sim.h (M32R_MISC_PROFILE): New members insn_cycles, cti_stall,
load_stall,biggest_cycles.
* m32r.c (m32r_model_mark_get_h_gr): Update.
(m32r_model_init_insn_cycles,m32r_model_update_insn_cycles): New fns.
(m32r_model_record_cti,m32r_model_record_cycles): New functions.
* mloop.in: Call cycle init/update fns.
* model.c: Regenerate.
start-sanitize-m32rx
* m32rx.c (m32rx_model_mark_get_h_gr): Update.
* mloopx.in: Call cycle init/update fns.
* modelx.c: Regenerate.
end-sanitize-m32rx
Thu Jun 11 23:39:53 1998 Doug Evans <devans@seba.cygnus.com>
* Makefile.in (stamp-{arch,cpu,decode}): Pass CGEN_FLAGS_TO_PASS

829
sim/m32r/cpux.h
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File diff suppressed because it is too large Load Diff

17
sim/m32r/extract.c
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@ -26,6 +26,7 @@ with this program; if not, write to the Free Software Foundation, Inc.,
#define WANT_CPU_M32R
#include "sim-main.h"
#include "cgen-ops.h"
#include "cpu-sim.h"
void
@ -257,7 +258,7 @@ EX_FN_NAME (m32r,fmt_bc8) (SIM_CPU *current_cpu, PCADDR pc, insn_t insn, ARGBUF
EXTRACT_FMT_BC8_CODE
/* Record the fields for the semantic handler. */
FLD (f_disp8) = (pc & -4L) + f_disp8;
FLD (f_disp8) = f_disp8;
TRACE_EXTRACT (current_cpu, (current_cpu, pc, "fmt_bc8", "disp8 0x%x", 'x', f_disp8, (char *) 0));
abuf->length = length;
@ -274,7 +275,7 @@ EX_FN_NAME (m32r,fmt_bc24) (SIM_CPU *current_cpu, PCADDR pc, insn_t insn, ARGBUF
EXTRACT_FMT_BC24_CODE
/* Record the fields for the semantic handler. */
FLD (f_disp24) = pc + f_disp24;
FLD (f_disp24) = f_disp24;
TRACE_EXTRACT (current_cpu, (current_cpu, pc, "fmt_bc24", "disp24 0x%x", 'x', f_disp24, (char *) 0));
abuf->length = length;
@ -293,7 +294,7 @@ EX_FN_NAME (m32r,fmt_beq) (SIM_CPU *current_cpu, PCADDR pc, insn_t insn, ARGBUF
/* Record the fields for the semantic handler. */
FLD (f_r1) = & CPU (h_gr)[f_r1];
FLD (f_r2) = & CPU (h_gr)[f_r2];
FLD (f_disp16) = pc + f_disp16;
FLD (f_disp16) = f_disp16;
TRACE_EXTRACT (current_cpu, (current_cpu, pc, "fmt_beq", "src1 0x%x", 'x', f_r1, "src2 0x%x", 'x', f_r2, "disp16 0x%x", 'x', f_disp16, (char *) 0));
abuf->length = length;
@ -319,7 +320,7 @@ EX_FN_NAME (m32r,fmt_beqz) (SIM_CPU *current_cpu, PCADDR pc, insn_t insn, ARGBUF
/* Record the fields for the semantic handler. */
FLD (f_r2) = & CPU (h_gr)[f_r2];
FLD (f_disp16) = pc + f_disp16;
FLD (f_disp16) = f_disp16;
TRACE_EXTRACT (current_cpu, (current_cpu, pc, "fmt_beqz", "src2 0x%x", 'x', f_r2, "disp16 0x%x", 'x', f_disp16, (char *) 0));
abuf->length = length;
@ -344,7 +345,7 @@ EX_FN_NAME (m32r,fmt_bl8) (SIM_CPU *current_cpu, PCADDR pc, insn_t insn, ARGBUF
EXTRACT_FMT_BL8_CODE
/* Record the fields for the semantic handler. */
FLD (f_disp8) = (pc & -4L) + f_disp8;
FLD (f_disp8) = f_disp8;
TRACE_EXTRACT (current_cpu, (current_cpu, pc, "fmt_bl8", "disp8 0x%x", 'x', f_disp8, (char *) 0));
abuf->length = length;
@ -369,7 +370,7 @@ EX_FN_NAME (m32r,fmt_bl24) (SIM_CPU *current_cpu, PCADDR pc, insn_t insn, ARGBUF
EXTRACT_FMT_BL24_CODE
/* Record the fields for the semantic handler. */
FLD (f_disp24) = pc + f_disp24;
FLD (f_disp24) = f_disp24;
TRACE_EXTRACT (current_cpu, (current_cpu, pc, "fmt_bl24", "disp24 0x%x", 'x', f_disp24, (char *) 0));
abuf->length = length;
@ -394,7 +395,7 @@ EX_FN_NAME (m32r,fmt_bra8) (SIM_CPU *current_cpu, PCADDR pc, insn_t insn, ARGBUF
EXTRACT_FMT_BRA8_CODE
/* Record the fields for the semantic handler. */
FLD (f_disp8) = (pc & -4L) + f_disp8;
FLD (f_disp8) = f_disp8;
TRACE_EXTRACT (current_cpu, (current_cpu, pc, "fmt_bra8", "disp8 0x%x", 'x', f_disp8, (char *) 0));
abuf->length = length;
@ -411,7 +412,7 @@ EX_FN_NAME (m32r,fmt_bra24) (SIM_CPU *current_cpu, PCADDR pc, insn_t insn, ARGBU
EXTRACT_FMT_BRA24_CODE
/* Record the fields for the semantic handler. */
FLD (f_disp24) = pc + f_disp24;
FLD (f_disp24) = f_disp24;
TRACE_EXTRACT (current_cpu, (current_cpu, pc, "fmt_bra24", "disp24 0x%x", 'x', f_disp24, (char *) 0));
abuf->length = length;

20
sim/m32r/readx.c
View File

@ -279,7 +279,7 @@ with this program; if not, write to the Free Software Foundation, Inc.,
EXTRACT_FMT_BC8_CODE
/* Fetch the input operands for the semantic handler. */
OPRND (condbit) = CPU (h_cond);
OPRND (disp8) = (pc & -4L) + f_disp8;
OPRND (disp8) = f_disp8;
#undef OPRND
}
BREAK (read);
@ -291,7 +291,7 @@ with this program; if not, write to the Free Software Foundation, Inc.,
EXTRACT_FMT_BC24_CODE
/* Fetch the input operands for the semantic handler. */
OPRND (condbit) = CPU (h_cond);
OPRND (disp24) = pc + f_disp24;
OPRND (disp24) = f_disp24;
#undef OPRND
}
BREAK (read);
@ -304,7 +304,7 @@ with this program; if not, write to the Free Software Foundation, Inc.,
/* Fetch the input operands for the semantic handler. */
OPRND (src1) = CPU (h_gr[f_r1]);
OPRND (src2) = CPU (h_gr[f_r2]);
OPRND (disp16) = pc + f_disp16;
OPRND (disp16) = f_disp16;
#undef OPRND
}
BREAK (read);
@ -316,7 +316,7 @@ with this program; if not, write to the Free Software Foundation, Inc.,
EXTRACT_FMT_BEQZ_CODE
/* Fetch the input operands for the semantic handler. */
OPRND (src2) = CPU (h_gr[f_r2]);
OPRND (disp16) = pc + f_disp16;
OPRND (disp16) = f_disp16;
#undef OPRND
}
BREAK (read);
@ -328,7 +328,7 @@ with this program; if not, write to the Free Software Foundation, Inc.,
EXTRACT_FMT_BL8_CODE
/* Fetch the input operands for the semantic handler. */
OPRND (pc) = CPU (h_pc);
OPRND (disp8) = (pc & -4L) + f_disp8;
OPRND (disp8) = f_disp8;
#undef OPRND
}
BREAK (read);
@ -340,7 +340,7 @@ with this program; if not, write to the Free Software Foundation, Inc.,
EXTRACT_FMT_BL24_CODE
/* Fetch the input operands for the semantic handler. */
OPRND (pc) = CPU (h_pc);
OPRND (disp24) = pc + f_disp24;
OPRND (disp24) = f_disp24;
#undef OPRND
}
BREAK (read);
@ -353,7 +353,7 @@ with this program; if not, write to the Free Software Foundation, Inc.,
/* Fetch the input operands for the semantic handler. */
OPRND (condbit) = CPU (h_cond);
OPRND (pc) = CPU (h_pc);
OPRND (disp8) = (pc & -4L) + f_disp8;
OPRND (disp8) = f_disp8;
#undef OPRND
}
BREAK (read);
@ -366,7 +366,7 @@ with this program; if not, write to the Free Software Foundation, Inc.,
/* Fetch the input operands for the semantic handler. */
OPRND (condbit) = CPU (h_cond);
OPRND (pc) = CPU (h_pc);
OPRND (disp24) = pc + f_disp24;
OPRND (disp24) = f_disp24;
#undef OPRND
}
BREAK (read);
@ -377,7 +377,7 @@ with this program; if not, write to the Free Software Foundation, Inc.,
EXTRACT_FMT_BRA8_VARS /* f-op1 f-r1 f-disp8 */
EXTRACT_FMT_BRA8_CODE
/* Fetch the input operands for the semantic handler. */
OPRND (disp8) = (pc & -4L) + f_disp8;
OPRND (disp8) = f_disp8;
#undef OPRND
}
BREAK (read);
@ -388,7 +388,7 @@ with this program; if not, write to the Free Software Foundation, Inc.,
EXTRACT_FMT_BRA24_VARS /* f-op1 f-r1 f-disp24 */
EXTRACT_FMT_BRA24_CODE
/* Fetch the input operands for the semantic handler. */
OPRND (disp24) = pc + f_disp24;
OPRND (disp24) = f_disp24;
#undef OPRND
}
BREAK (read);

119
sim/m32r/semx.c
View File

@ -44,6 +44,7 @@ SEM_FN_NAME (m32rx,add) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exe
#define OPRND(f) par_exec->operands.fmt_add.f
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
CIA new_pc = SEM_NEXT_PC (sem_arg, 2);
CIA pc = PC;
EXTRACT_FMT_ADD_VARS /* f-op1 f-r1 f-op2 f-r2 */
EXTRACT_FMT_ADD_CODE
@ -77,6 +78,7 @@ SEM_FN_NAME (m32rx,add3) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_ex
#define OPRND(f) par_exec->operands.fmt_add3.f
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
CIA new_pc = SEM_NEXT_PC (sem_arg, 4);
CIA pc = PC;
EXTRACT_FMT_ADD3_VARS /* f-op1 f-r1 f-op2 f-r2 f-simm16 */
EXTRACT_FMT_ADD3_CODE
@ -110,6 +112,7 @@ SEM_FN_NAME (m32rx,and) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exe
#define OPRND(f) par_exec->operands.fmt_add.f
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
CIA new_pc = SEM_NEXT_PC (sem_arg, 2);
CIA pc = PC;
EXTRACT_FMT_ADD_VARS /* f-op1 f-r1 f-op2 f-r2 */
EXTRACT_FMT_ADD_CODE
@ -143,6 +146,7 @@ SEM_FN_NAME (m32rx,and3) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_ex
#define OPRND(f) par_exec->operands.fmt_and3.f
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
CIA new_pc = SEM_NEXT_PC (sem_arg, 4);
CIA pc = PC;
EXTRACT_FMT_AND3_VARS /* f-op1 f-r1 f-op2 f-r2 f-uimm16 */
EXTRACT_FMT_AND3_CODE
@ -176,6 +180,7 @@ SEM_FN_NAME (m32rx,or) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec
#define OPRND(f) par_exec->operands.fmt_add.f
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
CIA new_pc = SEM_NEXT_PC (sem_arg, 2);
CIA pc = PC;
EXTRACT_FMT_ADD_VARS /* f-op1 f-r1 f-op2 f-r2 */
EXTRACT_FMT_ADD_CODE
@ -209,6 +214,7 @@ SEM_FN_NAME (m32rx,or3) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exe
#define OPRND(f) par_exec->operands.fmt_or3.f
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
CIA new_pc = SEM_NEXT_PC (sem_arg, 4);
CIA pc = PC;
EXTRACT_FMT_OR3_VARS /* f-op1 f-r1 f-op2 f-r2 f-uimm16 */
EXTRACT_FMT_OR3_CODE
@ -242,6 +248,7 @@ SEM_FN_NAME (m32rx,xor) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exe
#define OPRND(f) par_exec->operands.fmt_add.f
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
CIA new_pc = SEM_NEXT_PC (sem_arg, 2);
CIA pc = PC;
EXTRACT_FMT_ADD_VARS /* f-op1 f-r1 f-op2 f-r2 */
EXTRACT_FMT_ADD_CODE
@ -275,6 +282,7 @@ SEM_FN_NAME (m32rx,xor3) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_ex
#define OPRND(f) par_exec->operands.fmt_and3.f
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
CIA new_pc = SEM_NEXT_PC (sem_arg, 4);
CIA pc = PC;
EXTRACT_FMT_AND3_VARS /* f-op1 f-r1 f-op2 f-r2 f-uimm16 */
EXTRACT_FMT_AND3_CODE
@ -308,6 +316,7 @@ SEM_FN_NAME (m32rx,addi) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_ex
#define OPRND(f) par_exec->operands.fmt_addi.f
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
CIA new_pc = SEM_NEXT_PC (sem_arg, 2);
CIA pc = PC;
EXTRACT_FMT_ADDI_VARS /* f-op1 f-r1 f-simm8 */
EXTRACT_FMT_ADDI_CODE
@ -341,6 +350,7 @@ SEM_FN_NAME (m32rx,addv) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_ex
#define OPRND(f) par_exec->operands.fmt_addv.f
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
CIA new_pc = SEM_NEXT_PC (sem_arg, 2);
CIA pc = PC;
EXTRACT_FMT_ADDV_VARS /* f-op1 f-r1 f-op2 f-r2 */
EXTRACT_FMT_ADDV_CODE
@ -384,6 +394,7 @@ SEM_FN_NAME (m32rx,addv3) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_e
#define OPRND(f) par_exec->operands.fmt_addv3.f
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
CIA new_pc = SEM_NEXT_PC (sem_arg, 4);
CIA pc = PC;
EXTRACT_FMT_ADDV3_VARS /* f-op1 f-r1 f-op2 f-r2 f-simm16 */
EXTRACT_FMT_ADDV3_CODE
@ -427,6 +438,7 @@ SEM_FN_NAME (m32rx,addx) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_ex
#define OPRND(f) par_exec->operands.fmt_addx.f
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
CIA new_pc = SEM_NEXT_PC (sem_arg, 2);
CIA pc = PC;
EXTRACT_FMT_ADDX_VARS /* f-op1 f-r1 f-op2 f-r2 */
EXTRACT_FMT_ADDX_CODE
@ -471,6 +483,7 @@ SEM_FN_NAME (m32rx,bc8) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exe
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
CIA new_pc = SEM_NEXT_PC (sem_arg, 2);
int taken_p = 0;
CIA pc = PC;
EXTRACT_FMT_BC8_VARS /* f-op1 f-r1 f-disp8 */
EXTRACT_FMT_BC8_CODE
@ -506,6 +519,7 @@ SEM_FN_NAME (m32rx,bc24) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_ex
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
CIA new_pc = SEM_NEXT_PC (sem_arg, 4);
int taken_p = 0;
CIA pc = PC;
EXTRACT_FMT_BC24_VARS /* f-op1 f-r1 f-disp24 */
EXTRACT_FMT_BC24_CODE
@ -541,6 +555,7 @@ SEM_FN_NAME (m32rx,beq) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exe
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
CIA new_pc = SEM_NEXT_PC (sem_arg, 4);
int taken_p = 0;
CIA pc = PC;
EXTRACT_FMT_BEQ_VARS /* f-op1 f-r1 f-op2 f-r2 f-disp16 */
EXTRACT_FMT_BEQ_CODE
@ -577,6 +592,7 @@ SEM_FN_NAME (m32rx,beqz) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_ex
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
CIA new_pc = SEM_NEXT_PC (sem_arg, 4);
int taken_p = 0;
CIA pc = PC;
EXTRACT_FMT_BEQZ_VARS /* f-op1 f-r1 f-op2 f-r2 f-disp16 */
EXTRACT_FMT_BEQZ_CODE
@ -613,6 +629,7 @@ SEM_FN_NAME (m32rx,bgez) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_ex
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
CIA new_pc = SEM_NEXT_PC (sem_arg, 4);
int taken_p = 0;
CIA pc = PC;
EXTRACT_FMT_BEQZ_VARS /* f-op1 f-r1 f-op2 f-r2 f-disp16 */
EXTRACT_FMT_BEQZ_CODE
@ -649,6 +666,7 @@ SEM_FN_NAME (m32rx,bgtz) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_ex
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
CIA new_pc = SEM_NEXT_PC (sem_arg, 4);
int taken_p = 0;
CIA pc = PC;
EXTRACT_FMT_BEQZ_VARS /* f-op1 f-r1 f-op2 f-r2 f-disp16 */
EXTRACT_FMT_BEQZ_CODE
@ -685,6 +703,7 @@ SEM_FN_NAME (m32rx,blez) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_ex
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
CIA new_pc = SEM_NEXT_PC (sem_arg, 4);
int taken_p = 0;
CIA pc = PC;
EXTRACT_FMT_BEQZ_VARS /* f-op1 f-r1 f-op2 f-r2 f-disp16 */
EXTRACT_FMT_BEQZ_CODE
@ -721,6 +740,7 @@ SEM_FN_NAME (m32rx,bltz) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_ex
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
CIA new_pc = SEM_NEXT_PC (sem_arg, 4);
int taken_p = 0;
CIA pc = PC;
EXTRACT_FMT_BEQZ_VARS /* f-op1 f-r1 f-op2 f-r2 f-disp16 */
EXTRACT_FMT_BEQZ_CODE
@ -757,6 +777,7 @@ SEM_FN_NAME (m32rx,bnez) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_ex
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
CIA new_pc = SEM_NEXT_PC (sem_arg, 4);
int taken_p = 0;
CIA pc = PC;
EXTRACT_FMT_BEQZ_VARS /* f-op1 f-r1 f-op2 f-r2 f-disp16 */
EXTRACT_FMT_BEQZ_CODE
@ -793,6 +814,7 @@ SEM_FN_NAME (m32rx,bl8) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exe
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
CIA new_pc = SEM_NEXT_PC (sem_arg, 2);
int taken_p = 0;
CIA pc = PC;
EXTRACT_FMT_BL8_VARS /* f-op1 f-r1 f-disp8 */
EXTRACT_FMT_BL8_CODE
@ -834,6 +856,7 @@ SEM_FN_NAME (m32rx,bl24) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_ex
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
CIA new_pc = SEM_NEXT_PC (sem_arg, 4);
int taken_p = 0;
CIA pc = PC;
EXTRACT_FMT_BL24_VARS /* f-op1 f-r1 f-disp24 */
EXTRACT_FMT_BL24_CODE
@ -875,6 +898,7 @@ SEM_FN_NAME (m32rx,bcl8) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_ex
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
CIA new_pc = SEM_NEXT_PC (sem_arg, 2);
int taken_p = 0;
CIA pc = PC;
EXTRACT_FMT_BCL8_VARS /* f-op1 f-r1 f-disp8 */
EXTRACT_FMT_BCL8_CODE
@ -918,6 +942,7 @@ SEM_FN_NAME (m32rx,bcl24) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_e
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
CIA new_pc = SEM_NEXT_PC (sem_arg, 4);
int taken_p = 0;
CIA pc = PC;
EXTRACT_FMT_BCL24_VARS /* f-op1 f-r1 f-disp24 */
EXTRACT_FMT_BCL24_CODE
@ -961,6 +986,7 @@ SEM_FN_NAME (m32rx,bnc8) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_ex
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
CIA new_pc = SEM_NEXT_PC (sem_arg, 2);
int taken_p = 0;
CIA pc = PC;
EXTRACT_FMT_BC8_VARS /* f-op1 f-r1 f-disp8 */
EXTRACT_FMT_BC8_CODE
@ -996,6 +1022,7 @@ SEM_FN_NAME (m32rx,bnc24) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_e
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
CIA new_pc = SEM_NEXT_PC (sem_arg, 4);
int taken_p = 0;
CIA pc = PC;
EXTRACT_FMT_BC24_VARS /* f-op1 f-r1 f-disp24 */
EXTRACT_FMT_BC24_CODE
@ -1031,6 +1058,7 @@ SEM_FN_NAME (m32rx,bne) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exe
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
CIA new_pc = SEM_NEXT_PC (sem_arg, 4);
int taken_p = 0;
CIA pc = PC;
EXTRACT_FMT_BEQ_VARS /* f-op1 f-r1 f-op2 f-r2 f-disp16 */
EXTRACT_FMT_BEQ_CODE
@ -1067,6 +1095,7 @@ SEM_FN_NAME (m32rx,bra8) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_ex
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
CIA new_pc = SEM_NEXT_PC (sem_arg, 2);
int taken_p = 0;
CIA pc = PC;
EXTRACT_FMT_BRA8_VARS /* f-op1 f-r1 f-disp8 */
EXTRACT_FMT_BRA8_CODE
@ -1100,6 +1129,7 @@ SEM_FN_NAME (m32rx,bra24) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_e
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
CIA new_pc = SEM_NEXT_PC (sem_arg, 4);
int taken_p = 0;
CIA pc = PC;
EXTRACT_FMT_BRA24_VARS /* f-op1 f-r1 f-disp24 */
EXTRACT_FMT_BRA24_CODE
@ -1133,6 +1163,7 @@ SEM_FN_NAME (m32rx,bncl8) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_e
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
CIA new_pc = SEM_NEXT_PC (sem_arg, 2);
int taken_p = 0;
CIA pc = PC;
EXTRACT_FMT_BCL8_VARS /* f-op1 f-r1 f-disp8 */
EXTRACT_FMT_BCL8_CODE
@ -1176,6 +1207,7 @@ SEM_FN_NAME (m32rx,bncl24) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
CIA new_pc = SEM_NEXT_PC (sem_arg, 4);
int taken_p = 0;
CIA pc = PC;
EXTRACT_FMT_BCL24_VARS /* f-op1 f-r1 f-disp24 */
EXTRACT_FMT_BCL24_CODE
@ -1218,6 +1250,7 @@ SEM_FN_NAME (m32rx,cmp) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exe
#define OPRND(f) par_exec->operands.fmt_cmp.f
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
CIA new_pc = SEM_NEXT_PC (sem_arg, 2);
CIA pc = PC;
EXTRACT_FMT_CMP_VARS /* f-op1 f-r1 f-op2 f-r2 */
EXTRACT_FMT_CMP_CODE
@ -1250,6 +1283,7 @@ SEM_FN_NAME (m32rx,cmpi) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_ex
#define OPRND(f) par_exec->operands.fmt_cmpi.f
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
CIA new_pc = SEM_NEXT_PC (sem_arg, 4);
CIA pc = PC;
EXTRACT_FMT_CMPI_VARS /* f-op1 f-r1 f-op2 f-r2 f-simm16 */
EXTRACT_FMT_CMPI_CODE
@ -1282,6 +1316,7 @@ SEM_FN_NAME (m32rx,cmpu) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_ex
#define OPRND(f) par_exec->operands.fmt_cmp.f
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
CIA new_pc = SEM_NEXT_PC (sem_arg, 2);
CIA pc = PC;
EXTRACT_FMT_CMP_VARS /* f-op1 f-r1 f-op2 f-r2 */
EXTRACT_FMT_CMP_CODE
@ -1314,6 +1349,7 @@ SEM_FN_NAME (m32rx,cmpui) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_e
#define OPRND(f) par_exec->operands.fmt_cmpi.f
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
CIA new_pc = SEM_NEXT_PC (sem_arg, 4);
CIA pc = PC;
EXTRACT_FMT_CMPI_VARS /* f-op1 f-r1 f-op2 f-r2 f-simm16 */
EXTRACT_FMT_CMPI_CODE
@ -1346,6 +1382,7 @@ SEM_FN_NAME (m32rx,cmpeq) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_e
#define OPRND(f) par_exec->operands.fmt_cmp.f
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
CIA new_pc = SEM_NEXT_PC (sem_arg, 2);
CIA pc = PC;
EXTRACT_FMT_CMP_VARS /* f-op1 f-r1 f-op2 f-r2 */
EXTRACT_FMT_CMP_CODE
@ -1378,6 +1415,7 @@ SEM_FN_NAME (m32rx,cmpz) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_ex
#define OPRND(f) par_exec->operands.fmt_cmpz.f
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
CIA new_pc = SEM_NEXT_PC (sem_arg, 2);
CIA pc = PC;
EXTRACT_FMT_CMPZ_VARS /* f-op1 f-r1 f-op2 f-r2 */
EXTRACT_FMT_CMPZ_CODE
@ -1410,6 +1448,7 @@ SEM_FN_NAME (m32rx,div) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exe
#define OPRND(f) par_exec->operands.fmt_div.f
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
CIA new_pc = SEM_NEXT_PC (sem_arg, 4);
CIA pc = PC;
EXTRACT_FMT_DIV_VARS /* f-op1 f-r1 f-op2 f-r2 f-simm16 */
EXTRACT_FMT_DIV_CODE
@ -1445,6 +1484,7 @@ SEM_FN_NAME (m32rx,divu) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_ex
#define OPRND(f) par_exec->operands.fmt_div.f
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
CIA new_pc = SEM_NEXT_PC (sem_arg, 4);
CIA pc = PC;
EXTRACT_FMT_DIV_VARS /* f-op1 f-r1 f-op2 f-r2 f-simm16 */
EXTRACT_FMT_DIV_CODE
@ -1480,6 +1520,7 @@ SEM_FN_NAME (m32rx,rem) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exe
#define OPRND(f) par_exec->operands.fmt_div.f
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
CIA new_pc = SEM_NEXT_PC (sem_arg, 4);
CIA pc = PC;
EXTRACT_FMT_DIV_VARS /* f-op1 f-r1 f-op2 f-r2 f-simm16 */
EXTRACT_FMT_DIV_CODE
@ -1515,6 +1556,7 @@ SEM_FN_NAME (m32rx,remu) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_ex
#define OPRND(f) par_exec->operands.fmt_div.f
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
CIA new_pc = SEM_NEXT_PC (sem_arg, 4);
CIA pc = PC;
EXTRACT_FMT_DIV_VARS /* f-op1 f-r1 f-op2 f-r2 f-simm16 */
EXTRACT_FMT_DIV_CODE
@ -1550,6 +1592,7 @@ SEM_FN_NAME (m32rx,divh) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_ex
#define OPRND(f) par_exec->operands.fmt_div.f
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
CIA new_pc = SEM_NEXT_PC (sem_arg, 4);
CIA pc = PC;
EXTRACT_FMT_DIV_VARS /* f-op1 f-r1 f-op2 f-r2 f-simm16 */
EXTRACT_FMT_DIV_CODE
@ -1586,6 +1629,7 @@ SEM_FN_NAME (m32rx,jc) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
CIA new_pc = SEM_NEXT_PC (sem_arg, 2);
int taken_p = 0;
CIA pc = PC;
EXTRACT_FMT_JC_VARS /* f-op1 f-r1 f-op2 f-r2 */
EXTRACT_FMT_JC_CODE
@ -1622,6 +1666,7 @@ SEM_FN_NAME (m32rx,jnc) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exe
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
CIA new_pc = SEM_NEXT_PC (sem_arg, 2);
int taken_p = 0;
CIA pc = PC;
EXTRACT_FMT_JC_VARS /* f-op1 f-r1 f-op2 f-r2 */
EXTRACT_FMT_JC_CODE
@ -1658,6 +1703,7 @@ SEM_FN_NAME (m32rx,jl) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
CIA new_pc = SEM_NEXT_PC (sem_arg, 2);
int taken_p = 0;
CIA pc = PC;
EXTRACT_FMT_JL_VARS /* f-op1 f-r1 f-op2 f-r2 */
EXTRACT_FMT_JL_CODE
@ -1703,6 +1749,7 @@ SEM_FN_NAME (m32rx,jmp) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exe
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
CIA new_pc = SEM_NEXT_PC (sem_arg, 2);
int taken_p = 0;
CIA pc = PC;
EXTRACT_FMT_JMP_VARS /* f-op1 f-r1 f-op2 f-r2 */
EXTRACT_FMT_JMP_CODE
@ -1736,6 +1783,7 @@ SEM_FN_NAME (m32rx,ld) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec
#define OPRND(f) par_exec->operands.fmt_ld.f
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
CIA new_pc = SEM_NEXT_PC (sem_arg, 2);
CIA pc = PC;
EXTRACT_FMT_LD_VARS /* f-op1 f-r1 f-op2 f-r2 */
EXTRACT_FMT_LD_CODE
@ -1769,6 +1817,7 @@ SEM_FN_NAME (m32rx,ld_d) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_ex
#define OPRND(f) par_exec->operands.fmt_ld_d.f
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
CIA new_pc = SEM_NEXT_PC (sem_arg, 4);
CIA pc = PC;
EXTRACT_FMT_LD_D_VARS /* f-op1 f-r1 f-op2 f-r2 f-simm16 */
EXTRACT_FMT_LD_D_CODE
@ -1802,6 +1851,7 @@ SEM_FN_NAME (m32rx,ldb) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exe
#define OPRND(f) par_exec->operands.fmt_ldb.f
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
CIA new_pc = SEM_NEXT_PC (sem_arg, 2);
CIA pc = PC;
EXTRACT_FMT_LDB_VARS /* f-op1 f-r1 f-op2 f-r2 */
EXTRACT_FMT_LDB_CODE
@ -1835,6 +1885,7 @@ SEM_FN_NAME (m32rx,ldb_d) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_e
#define OPRND(f) par_exec->operands.fmt_ldb_d.f
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
CIA new_pc = SEM_NEXT_PC (sem_arg, 4);
CIA pc = PC;
EXTRACT_FMT_LDB_D_VARS /* f-op1 f-r1 f-op2 f-r2 f-simm16 */
EXTRACT_FMT_LDB_D_CODE
@ -1868,6 +1919,7 @@ SEM_FN_NAME (m32rx,ldh) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exe
#define OPRND(f) par_exec->operands.fmt_ldh.f
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
CIA new_pc = SEM_NEXT_PC (sem_arg, 2);
CIA pc = PC;
EXTRACT_FMT_LDH_VARS /* f-op1 f-r1 f-op2 f-r2 */
EXTRACT_FMT_LDH_CODE
@ -1901,6 +1953,7 @@ SEM_FN_NAME (m32rx,ldh_d) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_e
#define OPRND(f) par_exec->operands.fmt_ldh_d.f
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
CIA new_pc = SEM_NEXT_PC (sem_arg, 4);
CIA pc = PC;
EXTRACT_FMT_LDH_D_VARS /* f-op1 f-r1 f-op2 f-r2 f-simm16 */
EXTRACT_FMT_LDH_D_CODE
@ -1934,6 +1987,7 @@ SEM_FN_NAME (m32rx,ldub) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_ex
#define OPRND(f) par_exec->operands.fmt_ldb.f
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
CIA new_pc = SEM_NEXT_PC (sem_arg, 2);
CIA pc = PC;
EXTRACT_FMT_LDB_VARS /* f-op1 f-r1 f-op2 f-r2 */
EXTRACT_FMT_LDB_CODE
@ -1967,6 +2021,7 @@ SEM_FN_NAME (m32rx,ldub_d) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_
#define OPRND(f) par_exec->operands.fmt_ldb_d.f
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
CIA new_pc = SEM_NEXT_PC (sem_arg, 4);
CIA pc = PC;
EXTRACT_FMT_LDB_D_VARS /* f-op1 f-r1 f-op2 f-r2 f-simm16 */
EXTRACT_FMT_LDB_D_CODE
@ -2000,6 +2055,7 @@ SEM_FN_NAME (m32rx,lduh) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_ex
#define OPRND(f) par_exec->operands.fmt_ldh.f
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
CIA new_pc = SEM_NEXT_PC (sem_arg, 2);
CIA pc = PC;
EXTRACT_FMT_LDH_VARS /* f-op1 f-r1 f-op2 f-r2 */
EXTRACT_FMT_LDH_CODE
@ -2033,6 +2089,7 @@ SEM_FN_NAME (m32rx,lduh_d) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_
#define OPRND(f) par_exec->operands.fmt_ldh_d.f
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
CIA new_pc = SEM_NEXT_PC (sem_arg, 4);
CIA pc = PC;
EXTRACT_FMT_LDH_D_VARS /* f-op1 f-r1 f-op2 f-r2 f-simm16 */
EXTRACT_FMT_LDH_D_CODE
@ -2066,6 +2123,7 @@ SEM_FN_NAME (m32rx,ld_plus) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par
#define OPRND(f) par_exec->operands.fmt_ld_plus.f
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
CIA new_pc = SEM_NEXT_PC (sem_arg, 2);
CIA pc = PC;
EXTRACT_FMT_LD_PLUS_VARS /* f-op1 f-r1 f-op2 f-r2 */
EXTRACT_FMT_LD_PLUS_CODE
@ -2109,6 +2167,7 @@ SEM_FN_NAME (m32rx,ld24) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_ex
#define OPRND(f) par_exec->operands.fmt_ld24.f
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
CIA new_pc = SEM_NEXT_PC (sem_arg, 4);
CIA pc = PC;
EXTRACT_FMT_LD24_VARS /* f-op1 f-r1 f-uimm24 */
EXTRACT_FMT_LD24_CODE
@ -2141,6 +2200,7 @@ SEM_FN_NAME (m32rx,ldi8) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_ex
#define OPRND(f) par_exec->operands.fmt_ldi8.f
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
CIA new_pc = SEM_NEXT_PC (sem_arg, 2);
CIA pc = PC;
EXTRACT_FMT_LDI8_VARS /* f-op1 f-r1 f-simm8 */
EXTRACT_FMT_LDI8_CODE
@ -2173,6 +2233,7 @@ SEM_FN_NAME (m32rx,ldi16) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_e
#define OPRND(f) par_exec->operands.fmt_ldi16.f
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
CIA new_pc = SEM_NEXT_PC (sem_arg, 4);
CIA pc = PC;
EXTRACT_FMT_LDI16_VARS /* f-op1 f-r1 f-op2 f-r2 f-simm16 */
EXTRACT_FMT_LDI16_CODE
@ -2205,6 +2266,7 @@ SEM_FN_NAME (m32rx,lock) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_ex
#define OPRND(f) par_exec->operands.fmt_lock.f
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
CIA new_pc = SEM_NEXT_PC (sem_arg, 2);
CIA pc = PC;
EXTRACT_FMT_LOCK_VARS /* f-op1 f-r1 f-op2 f-r2 */
EXTRACT_FMT_LOCK_CODE
@ -2245,6 +2307,7 @@ SEM_FN_NAME (m32rx,machi_a) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par
#define OPRND(f) par_exec->operands.fmt_machi_a.f
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
CIA new_pc = SEM_NEXT_PC (sem_arg, 2);
CIA pc = PC;
EXTRACT_FMT_MACHI_A_VARS /* f-op1 f-r1 f-acc f-op23 f-r2 */
EXTRACT_FMT_MACHI_A_CODE
@ -2277,6 +2340,7 @@ SEM_FN_NAME (m32rx,maclo_a) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par
#define OPRND(f) par_exec->operands.fmt_machi_a.f
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
CIA new_pc = SEM_NEXT_PC (sem_arg, 2);
CIA pc = PC;
EXTRACT_FMT_MACHI_A_VARS /* f-op1 f-r1 f-acc f-op23 f-r2 */
EXTRACT_FMT_MACHI_A_CODE
@ -2309,6 +2373,7 @@ SEM_FN_NAME (m32rx,macwhi) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_
#define OPRND(f) par_exec->operands.fmt_macwhi.f
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
CIA new_pc = SEM_NEXT_PC (sem_arg, 2);
CIA pc = PC;
EXTRACT_FMT_MACWHI_VARS /* f-op1 f-r1 f-op2 f-r2 */
EXTRACT_FMT_MACWHI_CODE
@ -2341,6 +2406,7 @@ SEM_FN_NAME (m32rx,macwlo) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_
#define OPRND(f) par_exec->operands.fmt_macwhi.f
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
CIA new_pc = SEM_NEXT_PC (sem_arg, 2);
CIA pc = PC;
EXTRACT_FMT_MACWHI_VARS /* f-op1 f-r1 f-op2 f-r2 */
EXTRACT_FMT_MACWHI_CODE
@ -2373,6 +2439,7 @@ SEM_FN_NAME (m32rx,mul) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exe
#define OPRND(f) par_exec->operands.fmt_add.f
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
CIA new_pc = SEM_NEXT_PC (sem_arg, 2);
CIA pc = PC;
EXTRACT_FMT_ADD_VARS /* f-op1 f-r1 f-op2 f-r2 */
EXTRACT_FMT_ADD_CODE
@ -2406,6 +2473,7 @@ SEM_FN_NAME (m32rx,mulhi_a) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par
#define OPRND(f) par_exec->operands.fmt_mulhi_a.f
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
CIA new_pc = SEM_NEXT_PC (sem_arg, 2);
CIA pc = PC;
EXTRACT_FMT_MULHI_A_VARS /* f-op1 f-r1 f-acc f-op23 f-r2 */
EXTRACT_FMT_MULHI_A_CODE
@ -2438,6 +2506,7 @@ SEM_FN_NAME (m32rx,mullo_a) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par
#define OPRND(f) par_exec->operands.fmt_mulhi_a.f
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
CIA new_pc = SEM_NEXT_PC (sem_arg, 2);
CIA pc = PC;
EXTRACT_FMT_MULHI_A_VARS /* f-op1 f-r1 f-acc f-op23 f-r2 */
EXTRACT_FMT_MULHI_A_CODE
@ -2470,6 +2539,7 @@ SEM_FN_NAME (m32rx,mulwhi) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_
#define OPRND(f) par_exec->operands.fmt_mulwhi.f
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
CIA new_pc = SEM_NEXT_PC (sem_arg, 2);
CIA pc = PC;
EXTRACT_FMT_MULWHI_VARS /* f-op1 f-r1 f-op2 f-r2 */
EXTRACT_FMT_MULWHI_CODE
@ -2502,6 +2572,7 @@ SEM_FN_NAME (m32rx,mulwlo) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_
#define OPRND(f) par_exec->operands.fmt_mulwhi.f
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
CIA new_pc = SEM_NEXT_PC (sem_arg, 2);
CIA pc = PC;
EXTRACT_FMT_MULWHI_VARS /* f-op1 f-r1 f-op2 f-r2 */
EXTRACT_FMT_MULWHI_CODE
@ -2534,6 +2605,7 @@ SEM_FN_NAME (m32rx,mv) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec
#define OPRND(f) par_exec->operands.fmt_mv.f
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
CIA new_pc = SEM_NEXT_PC (sem_arg, 2);
CIA pc = PC;
EXTRACT_FMT_MV_VARS /* f-op1 f-r1 f-op2 f-r2 */
EXTRACT_FMT_MV_CODE
@ -2567,6 +2639,7 @@ SEM_FN_NAME (m32rx,mvfachi_a) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *p
#define OPRND(f) par_exec->operands.fmt_mvfachi_a.f
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
CIA new_pc = SEM_NEXT_PC (sem_arg, 2);
CIA pc = PC;
EXTRACT_FMT_MVFACHI_A_VARS /* f-op1 f-r1 f-op2 f-accs f-op3 */
EXTRACT_FMT_MVFACHI_A_CODE
@ -2599,6 +2672,7 @@ SEM_FN_NAME (m32rx,mvfaclo_a) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *p
#define OPRND(f) par_exec->operands.fmt_mvfachi_a.f
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
CIA new_pc = SEM_NEXT_PC (sem_arg, 2);
CIA pc = PC;
EXTRACT_FMT_MVFACHI_A_VARS /* f-op1 f-r1 f-op2 f-accs f-op3 */
EXTRACT_FMT_MVFACHI_A_CODE
@ -2631,6 +2705,7 @@ SEM_FN_NAME (m32rx,mvfacmi_a) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *p
#define OPRND(f) par_exec->operands.fmt_mvfachi_a.f
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
CIA new_pc = SEM_NEXT_PC (sem_arg, 2);
CIA pc = PC;
EXTRACT_FMT_MVFACHI_A_VARS /* f-op1 f-r1 f-op2 f-accs f-op3 */
EXTRACT_FMT_MVFACHI_A_CODE
@ -2663,6 +2738,7 @@ SEM_FN_NAME (m32rx,mvfc) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_ex
#define OPRND(f) par_exec->operands.fmt_mvfc.f
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
CIA new_pc = SEM_NEXT_PC (sem_arg, 2);
CIA pc = PC;
EXTRACT_FMT_MVFC_VARS /* f-op1 f-r1 f-op2 f-r2 */
EXTRACT_FMT_MVFC_CODE
@ -2695,6 +2771,7 @@ SEM_FN_NAME (m32rx,mvtachi_a) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *p
#define OPRND(f) par_exec->operands.fmt_mvtachi_a.f
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
CIA new_pc = SEM_NEXT_PC (sem_arg, 2);
CIA pc = PC;
EXTRACT_FMT_MVTACHI_A_VARS /* f-op1 f-r1 f-op2 f-accs f-op3 */
EXTRACT_FMT_MVTACHI_A_CODE
@ -2727,6 +2804,7 @@ SEM_FN_NAME (m32rx,mvtaclo_a) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *p
#define OPRND(f) par_exec->operands.fmt_mvtachi_a.f
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
CIA new_pc = SEM_NEXT_PC (sem_arg, 2);
CIA pc = PC;
EXTRACT_FMT_MVTACHI_A_VARS /* f-op1 f-r1 f-op2 f-accs f-op3 */
EXTRACT_FMT_MVTACHI_A_CODE
@ -2759,6 +2837,7 @@ SEM_FN_NAME (m32rx,mvtc) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_ex
#define OPRND(f) par_exec->operands.fmt_mvtc.f
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
CIA new_pc = SEM_NEXT_PC (sem_arg, 2);
CIA pc = PC;
EXTRACT_FMT_MVTC_VARS /* f-op1 f-r1 f-op2 f-r2 */
EXTRACT_FMT_MVTC_CODE
@ -2791,6 +2870,7 @@ SEM_FN_NAME (m32rx,neg) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exe
#define OPRND(f) par_exec->operands.fmt_mv.f
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
CIA new_pc = SEM_NEXT_PC (sem_arg, 2);
CIA pc = PC;
EXTRACT_FMT_MV_VARS /* f-op1 f-r1 f-op2 f-r2 */
EXTRACT_FMT_MV_CODE
@ -2824,6 +2904,7 @@ SEM_FN_NAME (m32rx,nop) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exe
#define OPRND(f) par_exec->operands.fmt_nop.f
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
CIA new_pc = SEM_NEXT_PC (sem_arg, 2);
CIA pc = PC;
EXTRACT_FMT_NOP_VARS /* f-op1 f-r1 f-op2 f-r2 */
EXTRACT_FMT_NOP_CODE
@ -2851,6 +2932,7 @@ SEM_FN_NAME (m32rx,not) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exe
#define OPRND(f) par_exec->operands.fmt_mv.f
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
CIA new_pc = SEM_NEXT_PC (sem_arg, 2);
CIA pc = PC;
EXTRACT_FMT_MV_VARS /* f-op1 f-r1 f-op2 f-r2 */
EXTRACT_FMT_MV_CODE
@ -2884,6 +2966,7 @@ SEM_FN_NAME (m32rx,rac_dsi) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par
#define OPRND(f) par_exec->operands.fmt_rac_dsi.f
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
CIA new_pc = SEM_NEXT_PC (sem_arg, 2);
CIA pc = PC;
EXTRACT_FMT_RAC_DSI_VARS /* f-op1 f-accd f-bits67 f-op2 f-accs f-bit14 f-imm1 */
EXTRACT_FMT_RAC_DSI_CODE
@ -2920,6 +3003,7 @@ SEM_FN_NAME (m32rx,rach_dsi) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *pa
#define OPRND(f) par_exec->operands.fmt_rac_dsi.f
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
CIA new_pc = SEM_NEXT_PC (sem_arg, 2);
CIA pc = PC;
EXTRACT_FMT_RAC_DSI_VARS /* f-op1 f-accd f-bits67 f-op2 f-accs f-bit14 f-imm1 */
EXTRACT_FMT_RAC_DSI_CODE
@ -2957,6 +3041,7 @@ SEM_FN_NAME (m32rx,rte) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exe
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
CIA new_pc = SEM_NEXT_PC (sem_arg, 2);
int taken_p = 0;
CIA pc = PC;
EXTRACT_FMT_RTE_VARS /* f-op1 f-r1 f-op2 f-r2 */
EXTRACT_FMT_RTE_CODE
@ -3006,6 +3091,7 @@ SEM_FN_NAME (m32rx,seth) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_ex
#define OPRND(f) par_exec->operands.fmt_seth.f
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
CIA new_pc = SEM_NEXT_PC (sem_arg, 4);
CIA pc = PC;
EXTRACT_FMT_SETH_VARS /* f-op1 f-r1 f-op2 f-r2 f-hi16 */
EXTRACT_FMT_SETH_CODE
@ -3038,6 +3124,7 @@ SEM_FN_NAME (m32rx,sll) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exe
#define OPRND(f) par_exec->operands.fmt_add.f
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
CIA new_pc = SEM_NEXT_PC (sem_arg, 2);
CIA pc = PC;
EXTRACT_FMT_ADD_VARS /* f-op1 f-r1 f-op2 f-r2 */
EXTRACT_FMT_ADD_CODE
@ -3071,6 +3158,7 @@ SEM_FN_NAME (m32rx,sll3) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_ex
#define OPRND(f) par_exec->operands.fmt_sll3.f
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
CIA new_pc = SEM_NEXT_PC (sem_arg, 4);
CIA pc = PC;
EXTRACT_FMT_SLL3_VARS /* f-op1 f-r1 f-op2 f-r2 f-simm16 */
EXTRACT_FMT_SLL3_CODE
@ -3104,6 +3192,7 @@ SEM_FN_NAME (m32rx,slli) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_ex
#define OPRND(f) par_exec->operands.fmt_slli.f
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
CIA new_pc = SEM_NEXT_PC (sem_arg, 2);
CIA pc = PC;
EXTRACT_FMT_SLLI_VARS /* f-op1 f-r1 f-shift-op2 f-uimm5 */
EXTRACT_FMT_SLLI_CODE
@ -3137,6 +3226,7 @@ SEM_FN_NAME (m32rx,sra) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exe
#define OPRND(f) par_exec->operands.fmt_add.f
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
CIA new_pc = SEM_NEXT_PC (sem_arg, 2);
CIA pc = PC;
EXTRACT_FMT_ADD_VARS /* f-op1 f-r1 f-op2 f-r2 */
EXTRACT_FMT_ADD_CODE
@ -3170,6 +3260,7 @@ SEM_FN_NAME (m32rx,sra3) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_ex
#define OPRND(f) par_exec->operands.fmt_sll3.f
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
CIA new_pc = SEM_NEXT_PC (sem_arg, 4);
CIA pc = PC;
EXTRACT_FMT_SLL3_VARS /* f-op1 f-r1 f-op2 f-r2 f-simm16 */
EXTRACT_FMT_SLL3_CODE
@ -3203,6 +3294,7 @@ SEM_FN_NAME (m32rx,srai) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_ex
#define OPRND(f) par_exec->operands.fmt_slli.f
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
CIA new_pc = SEM_NEXT_PC (sem_arg, 2);
CIA pc = PC;
EXTRACT_FMT_SLLI_VARS /* f-op1 f-r1 f-shift-op2 f-uimm5 */
EXTRACT_FMT_SLLI_CODE
@ -3236,6 +3328,7 @@ SEM_FN_NAME (m32rx,srl) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exe
#define OPRND(f) par_exec->operands.fmt_add.f
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
CIA new_pc = SEM_NEXT_PC (sem_arg, 2);
CIA pc = PC;
EXTRACT_FMT_ADD_VARS /* f-op1 f-r1 f-op2 f-r2 */
EXTRACT_FMT_ADD_CODE
@ -3269,6 +3362,7 @@ SEM_FN_NAME (m32rx,srl3) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_ex
#define OPRND(f) par_exec->operands.fmt_sll3.f
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
CIA new_pc = SEM_NEXT_PC (sem_arg, 4);
CIA pc = PC;
EXTRACT_FMT_SLL3_VARS /* f-op1 f-r1 f-op2 f-r2 f-simm16 */
EXTRACT_FMT_SLL3_CODE
@ -3302,6 +3396,7 @@ SEM_FN_NAME (m32rx,srli) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_ex
#define OPRND(f) par_exec->operands.fmt_slli.f
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
CIA new_pc = SEM_NEXT_PC (sem_arg, 2);
CIA pc = PC;
EXTRACT_FMT_SLLI_VARS /* f-op1 f-r1 f-shift-op2 f-uimm5 */
EXTRACT_FMT_SLLI_CODE
@ -3335,6 +3430,7 @@ SEM_FN_NAME (m32rx,st) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec
#define OPRND(f) par_exec->operands.fmt_st.f
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
CIA new_pc = SEM_NEXT_PC (sem_arg, 2);
CIA pc = PC;
EXTRACT_FMT_ST_VARS /* f-op1 f-r1 f-op2 f-r2 */
EXTRACT_FMT_ST_CODE
@ -3367,6 +3463,7 @@ SEM_FN_NAME (m32rx,st_d) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_ex
#define OPRND(f) par_exec->operands.fmt_st_d.f
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
CIA new_pc = SEM_NEXT_PC (sem_arg, 4);
CIA pc = PC;
EXTRACT_FMT_ST_D_VARS /* f-op1 f-r1 f-op2 f-r2 f-simm16 */
EXTRACT_FMT_ST_D_CODE
@ -3399,6 +3496,7 @@ SEM_FN_NAME (m32rx,stb) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exe
#define OPRND(f) par_exec->operands.fmt_stb.f
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
CIA new_pc = SEM_NEXT_PC (sem_arg, 2);
CIA pc = PC;
EXTRACT_FMT_STB_VARS /* f-op1 f-r1 f-op2 f-r2 */
EXTRACT_FMT_STB_CODE
@ -3431,6 +3529,7 @@ SEM_FN_NAME (m32rx,stb_d) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_e
#define OPRND(f) par_exec->operands.fmt_stb_d.f
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
CIA new_pc = SEM_NEXT_PC (sem_arg, 4);
CIA pc = PC;
EXTRACT_FMT_STB_D_VARS /* f-op1 f-r1 f-op2 f-r2 f-simm16 */
EXTRACT_FMT_STB_D_CODE
@ -3463,6 +3562,7 @@ SEM_FN_NAME (m32rx,sth) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exe
#define OPRND(f) par_exec->operands.fmt_sth.f
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
CIA new_pc = SEM_NEXT_PC (sem_arg, 2);
CIA pc = PC;
EXTRACT_FMT_STH_VARS /* f-op1 f-r1 f-op2 f-r2 */
EXTRACT_FMT_STH_CODE
@ -3495,6 +3595,7 @@ SEM_FN_NAME (m32rx,sth_d) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_e
#define OPRND(f) par_exec->operands.fmt_sth_d.f
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
CIA new_pc = SEM_NEXT_PC (sem_arg, 4);
CIA pc = PC;
EXTRACT_FMT_STH_D_VARS /* f-op1 f-r1 f-op2 f-r2 f-simm16 */
EXTRACT_FMT_STH_D_CODE
@ -3527,6 +3628,7 @@ SEM_FN_NAME (m32rx,st_plus) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par
#define OPRND(f) par_exec->operands.fmt_st_plus.f
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
CIA new_pc = SEM_NEXT_PC (sem_arg, 2);
CIA pc = PC;
EXTRACT_FMT_ST_PLUS_VARS /* f-op1 f-r1 f-op2 f-r2 */
EXTRACT_FMT_ST_PLUS_CODE
@ -3569,6 +3671,7 @@ SEM_FN_NAME (m32rx,st_minus) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *pa
#define OPRND(f) par_exec->operands.fmt_st_plus.f
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
CIA new_pc = SEM_NEXT_PC (sem_arg, 2);
CIA pc = PC;
EXTRACT_FMT_ST_PLUS_VARS /* f-op1 f-r1 f-op2 f-r2 */
EXTRACT_FMT_ST_PLUS_CODE
@ -3611,6 +3714,7 @@ SEM_FN_NAME (m32rx,sub) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exe
#define OPRND(f) par_exec->operands.fmt_add.f
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
CIA new_pc = SEM_NEXT_PC (sem_arg, 2);
CIA pc = PC;
EXTRACT_FMT_ADD_VARS /* f-op1 f-r1 f-op2 f-r2 */
EXTRACT_FMT_ADD_CODE
@ -3644,6 +3748,7 @@ SEM_FN_NAME (m32rx,subv) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_ex
#define OPRND(f) par_exec->operands.fmt_addv.f
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
CIA new_pc = SEM_NEXT_PC (sem_arg, 2);
CIA pc = PC;
EXTRACT_FMT_ADDV_VARS /* f-op1 f-r1 f-op2 f-r2 */
EXTRACT_FMT_ADDV_CODE
@ -3687,6 +3792,7 @@ SEM_FN_NAME (m32rx,subx) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_ex
#define OPRND(f) par_exec->operands.fmt_addx.f
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
CIA new_pc = SEM_NEXT_PC (sem_arg, 2);
CIA pc = PC;
EXTRACT_FMT_ADDX_VARS /* f-op1 f-r1 f-op2 f-r2 */
EXTRACT_FMT_ADDX_CODE
@ -3731,6 +3837,7 @@ SEM_FN_NAME (m32rx,trap) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_ex
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
CIA new_pc = SEM_NEXT_PC (sem_arg, 2);
int taken_p = 0;
CIA pc = PC;
EXTRACT_FMT_TRAP_VARS /* f-op1 f-r1 f-op2 f-uimm4 */
EXTRACT_FMT_TRAP_CODE
@ -3775,6 +3882,7 @@ SEM_FN_NAME (m32rx,unlock) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_
#define OPRND(f) par_exec->operands.fmt_unlock.f
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
CIA new_pc = SEM_NEXT_PC (sem_arg, 2);
CIA pc = PC;
EXTRACT_FMT_UNLOCK_VARS /* f-op1 f-r1 f-op2 f-r2 */
EXTRACT_FMT_UNLOCK_CODE
@ -3816,6 +3924,7 @@ SEM_FN_NAME (m32rx,satb) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_ex
#define OPRND(f) par_exec->operands.fmt_satb.f
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
CIA new_pc = SEM_NEXT_PC (sem_arg, 4);
CIA pc = PC;
EXTRACT_FMT_SATB_VARS /* f-op1 f-r1 f-op2 f-r2 f-uimm16 */
EXTRACT_FMT_SATB_CODE
@ -3849,6 +3958,7 @@ SEM_FN_NAME (m32rx,sath) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_ex
#define OPRND(f) par_exec->operands.fmt_satb.f
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
CIA new_pc = SEM_NEXT_PC (sem_arg, 4);
CIA pc = PC;
EXTRACT_FMT_SATB_VARS /* f-op1 f-r1 f-op2 f-r2 f-uimm16 */
EXTRACT_FMT_SATB_CODE
@ -3882,6 +3992,7 @@ SEM_FN_NAME (m32rx,sat) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exe
#define OPRND(f) par_exec->operands.fmt_sat.f
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
CIA new_pc = SEM_NEXT_PC (sem_arg, 4);
CIA pc = PC;
EXTRACT_FMT_SAT_VARS /* f-op1 f-r1 f-op2 f-r2 f-uimm16 */
EXTRACT_FMT_SAT_CODE
@ -3915,6 +4026,7 @@ SEM_FN_NAME (m32rx,pcmpbz) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_
#define OPRND(f) par_exec->operands.fmt_cmpz.f
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
CIA new_pc = SEM_NEXT_PC (sem_arg, 2);
CIA pc = PC;
EXTRACT_FMT_CMPZ_VARS /* f-op1 f-r1 f-op2 f-r2 */
EXTRACT_FMT_CMPZ_CODE
@ -3947,6 +4059,7 @@ SEM_FN_NAME (m32rx,sadd) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_ex
#define OPRND(f) par_exec->operands.fmt_sadd.f
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
CIA new_pc = SEM_NEXT_PC (sem_arg, 2);
CIA pc = PC;
EXTRACT_FMT_SADD_VARS /* f-op1 f-r1 f-op2 f-r2 */
EXTRACT_FMT_SADD_CODE
@ -3978,6 +4091,7 @@ SEM_FN_NAME (m32rx,macwu1) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_
#define OPRND(f) par_exec->operands.fmt_macwu1.f
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
CIA new_pc = SEM_NEXT_PC (sem_arg, 2);
CIA pc = PC;
EXTRACT_FMT_MACWU1_VARS /* f-op1 f-r1 f-op2 f-r2 */
EXTRACT_FMT_MACWU1_CODE
@ -4010,6 +4124,7 @@ SEM_FN_NAME (m32rx,msblo) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_e
#define OPRND(f) par_exec->operands.fmt_macwhi.f
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
CIA new_pc = SEM_NEXT_PC (sem_arg, 2);
CIA pc = PC;
EXTRACT_FMT_MACWHI_VARS /* f-op1 f-r1 f-op2 f-r2 */
EXTRACT_FMT_MACWHI_CODE
@ -4042,6 +4157,7 @@ SEM_FN_NAME (m32rx,mulwu1) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_
#define OPRND(f) par_exec->operands.fmt_mulwu1.f
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
CIA new_pc = SEM_NEXT_PC (sem_arg, 2);
CIA pc = PC;
EXTRACT_FMT_MULWU1_VARS /* f-op1 f-r1 f-op2 f-r2 */
EXTRACT_FMT_MULWU1_CODE
@ -4074,6 +4190,7 @@ SEM_FN_NAME (m32rx,maclh1) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_
#define OPRND(f) par_exec->operands.fmt_macwu1.f
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
CIA new_pc = SEM_NEXT_PC (sem_arg, 2);
CIA pc = PC;
EXTRACT_FMT_MACWU1_VARS /* f-op1 f-r1 f-op2 f-r2 */
EXTRACT_FMT_MACWU1_CODE
@ -4106,6 +4223,7 @@ SEM_FN_NAME (m32rx,sc) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec
#define OPRND(f) par_exec->operands.fmt_sc.f
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
CIA new_pc = SEM_NEXT_PC (sem_arg, 2);
CIA pc = PC;
EXTRACT_FMT_SC_VARS /* f-op1 f-r1 f-op2 f-r2 */
EXTRACT_FMT_SC_CODE
@ -4135,6 +4253,7 @@ SEM_FN_NAME (m32rx,snc) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exe
#define OPRND(f) par_exec->operands.fmt_sc.f
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
CIA new_pc = SEM_NEXT_PC (sem_arg, 2);
CIA pc = PC;
EXTRACT_FMT_SC_VARS /* f-op1 f-r1 f-op2 f-r2 */
EXTRACT_FMT_SC_CODE