* mips-tdep.c (fp_register_arg_p): Add gdbarch as paramter.
(mips_n32n64_push_dummy_call, mips_o64_return_value) (mips_eabi_push_dummy_call): Update call to fp_register_arg_p. (MIPS_FPU_TYPE): Add gdbarch as parameter and replace current_gdbarch. (fp_register_arg_p, mips_dump_tdep, show_mipsfpu_command) (mips_n32n64_fp_arg_chunk_p): Update caller. (mips_n32n64_fp_arg_chunk_p): Add gdbarch as paramter. (mips_n32n64_push_dummy_call): Update caller. (MIPS_LAST_ARG_REGNUM): Add gdbarch as parameter and replace current_gdbarch. (mips_eabi_push_dummy_call, mips_n32n64_push_dummy_call) (mips_o32_push_dummy_call, mips_o64_push_dummy_call): Update caller. (MIPS_LAST_FP_ARG_REGNUM): Add gdbarch as parameter and replace current_gdbarch. (mips_eabi_push_dummy_call, mips_o32_push_dummy_call) (mips_o64_push_dummy_call): Update caller. (MIPS_EABI): Add gdbarch as parameter and replace current_gdbarch. (fp_register_arg_p, mips_dump_tdep): Update caller. (set_reg_offset): Add gdbarch as parameter and replace current_gdbarch. (mips16_scan_prologue, mips32_scan_prologue): Update caller. (reset_saved_regs): Make static. Add gdbarch as parameter. Replace current_gdbarch. (mips32_scan_prologue): Update caller. (heuristic_proc_start): Add gdbarch as parameter. Replace current_gdbarch. (mips_insn16_frame_cache, mips_insn32_frame_cache): Update caller. * mipsnbsd-nat.c (mipsnbsd_fetch_inferior_registers) (mipsnbsd_store_inferior_registers): Use get_regcache_arch to get at the current architecture. Update call to getregs_supplies. (getregs_supplies): Add gdbarch as parameter and replace current_gdbarch. * mipsnbsd-tdep.c (mipsnbsd_get_longjmp_target): Use get_frame_arch to get at the current architecture. Update call to NBSD_MIPS_JB_OFFSET and NBSD_MIPS_JB_ELEMENT_SIZE. (NBSD_MIPS_JB_ELEMENT_SIZE, NBSD_MIPS_JB_OFFSET): Add gdbarch and replace current_gdbarch. * remote-mips.c (mips_map_regno): Add gdbarch as parameter and replace current_gdbarch. (mips_fetch_registers, mips_store_registers): Update call to mips_map_regno. (mips_load): Use get_regcache_arch to get at the current_architecture and replace current_gdbarch.
This commit is contained in:
Markus Deuling
parent
a929810277
commit
74ed0bb414
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@ -1,3 +1,60 @@
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2008-07-14 Markus Deuling <deuling@de.ibm.com>
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* mips-tdep.c (fp_register_arg_p): Add gdbarch as paramter.
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(mips_n32n64_push_dummy_call, mips_o64_return_value)
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(mips_eabi_push_dummy_call): Update call to fp_register_arg_p.
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(MIPS_FPU_TYPE): Add gdbarch as parameter and replace current_gdbarch.
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(fp_register_arg_p, mips_dump_tdep, show_mipsfpu_command)
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(mips_n32n64_fp_arg_chunk_p): Update caller.
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(mips_n32n64_fp_arg_chunk_p): Add gdbarch as paramter.
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(mips_n32n64_push_dummy_call): Update caller.
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(MIPS_LAST_ARG_REGNUM): Add gdbarch as parameter and replace
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current_gdbarch.
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(mips_eabi_push_dummy_call, mips_n32n64_push_dummy_call)
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(mips_o32_push_dummy_call, mips_o64_push_dummy_call): Update caller.
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(MIPS_LAST_FP_ARG_REGNUM): Add gdbarch as parameter and replace
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current_gdbarch.
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(mips_eabi_push_dummy_call, mips_o32_push_dummy_call)
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(mips_o64_push_dummy_call): Update caller.
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(MIPS_EABI): Add gdbarch as parameter and replace current_gdbarch.
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(fp_register_arg_p, mips_dump_tdep): Update caller.
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(set_reg_offset): Add gdbarch as parameter and replace current_gdbarch.
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(mips16_scan_prologue, mips32_scan_prologue): Update caller.
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(reset_saved_regs): Make static. Add gdbarch as parameter. Replace
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current_gdbarch.
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(mips32_scan_prologue): Update caller.
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(heuristic_proc_start): Add gdbarch as parameter. Replace
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current_gdbarch.
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(mips_insn16_frame_cache, mips_insn32_frame_cache): Update caller.
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* mipsnbsd-nat.c (mipsnbsd_fetch_inferior_registers)
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(mipsnbsd_store_inferior_registers): Use get_regcache_arch to get at
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the current architecture. Update call to getregs_supplies.
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(getregs_supplies): Add gdbarch as parameter and replace
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current_gdbarch.
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* mipsnbsd-tdep.c (mipsnbsd_get_longjmp_target): Use get_frame_arch to
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get at the current architecture. Update call to NBSD_MIPS_JB_OFFSET and
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NBSD_MIPS_JB_ELEMENT_SIZE.
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(NBSD_MIPS_JB_ELEMENT_SIZE, NBSD_MIPS_JB_OFFSET): Add gdbarch and
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replace current_gdbarch.
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* remote-mips.c (mips_map_regno): Add gdbarch as parameter and replace
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current_gdbarch.
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(mips_fetch_registers, mips_store_registers): Update call
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to mips_map_regno.
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(mips_load): Use get_regcache_arch to get at the current_architecture
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and replace current_gdbarch.
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2008-07-13 Pedro Alves <pedro@codesourcery.com>
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* thread.c (restore_selected_frame): On fail to restore, select
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162
gdb/mips-tdep.c
162
gdb/mips-tdep.c
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@ -211,14 +211,15 @@ mips_fpa0_regnum (struct gdbarch *gdbarch)
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return mips_regnum (gdbarch)->fp0 + 12;
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}
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#define MIPS_EABI (gdbarch_tdep (current_gdbarch)->mips_abi == MIPS_ABI_EABI32 \
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|| gdbarch_tdep (current_gdbarch)->mips_abi == MIPS_ABI_EABI64)
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#define MIPS_EABI(gdbarch) (gdbarch_tdep (gdbarch)->mips_abi \
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== MIPS_ABI_EABI32 \
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|| gdbarch_tdep (gdbarch)->mips_abi == MIPS_ABI_EABI64)
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#define MIPS_LAST_FP_ARG_REGNUM (gdbarch_tdep (current_gdbarch)->mips_last_fp_arg_regnum)
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#define MIPS_LAST_FP_ARG_REGNUM(gdbarch) (gdbarch_tdep (gdbarch)->mips_last_fp_arg_regnum)
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#define MIPS_LAST_ARG_REGNUM (gdbarch_tdep (current_gdbarch)->mips_last_arg_regnum)
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#define MIPS_LAST_ARG_REGNUM(gdbarch) (gdbarch_tdep (gdbarch)->mips_last_arg_regnum)
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#define MIPS_FPU_TYPE (gdbarch_tdep (current_gdbarch)->mips_fpu_type)
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#define MIPS_FPU_TYPE(gdbarch) (gdbarch_tdep (gdbarch)->mips_fpu_type)
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/* MIPS16 function addresses are odd (bit 0 is set). Here are some
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functions to test, set, or clear bit 0 of addresses. */
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@ -391,7 +392,7 @@ mips2_fp_compat (struct frame_info *frame)
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#define VM_MIN_ADDRESS (CORE_ADDR)0x400000
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static CORE_ADDR heuristic_proc_start (CORE_ADDR);
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static CORE_ADDR heuristic_proc_start (struct gdbarch *, CORE_ADDR);
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static void reinit_frame_cache_sfunc (char *, int, struct cmd_list_element *);
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@ -1431,18 +1432,16 @@ struct mips_frame_cache
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saved registers in a frame. */
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static void
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set_reg_offset (struct mips_frame_cache *this_cache, int regnum,
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CORE_ADDR offset)
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set_reg_offset (struct gdbarch *gdbarch, struct mips_frame_cache *this_cache,
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int regnum, CORE_ADDR offset)
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{
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if (this_cache != NULL
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&& this_cache->saved_regs[regnum].addr == -1)
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{
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this_cache->saved_regs[regnum
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+ 0 * gdbarch_num_regs (current_gdbarch)].addr
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= offset;
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this_cache->saved_regs[regnum
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+ 1 * gdbarch_num_regs (current_gdbarch)].addr
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= offset;
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this_cache->saved_regs[regnum + 0 * gdbarch_num_regs (gdbarch)].addr
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= offset;
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this_cache->saved_regs[regnum + 1 * gdbarch_num_regs (gdbarch)].addr
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= offset;
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}
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}
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@ -1559,23 +1558,23 @@ mips16_scan_prologue (CORE_ADDR start_pc, CORE_ADDR limit_pc,
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{
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offset = mips16_get_imm (prev_inst, inst, 8, 4, 0);
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reg = mips16_to_32_reg[(inst & 0x700) >> 8];
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set_reg_offset (this_cache, reg, sp + offset);
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set_reg_offset (gdbarch, this_cache, reg, sp + offset);
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}
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else if ((inst & 0xff00) == 0xf900) /* sd reg,n($sp) */
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{
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offset = mips16_get_imm (prev_inst, inst, 5, 8, 0);
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reg = mips16_to_32_reg[(inst & 0xe0) >> 5];
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set_reg_offset (this_cache, reg, sp + offset);
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set_reg_offset (gdbarch, this_cache, reg, sp + offset);
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}
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else if ((inst & 0xff00) == 0x6200) /* sw $ra,n($sp) */
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{
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offset = mips16_get_imm (prev_inst, inst, 8, 4, 0);
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set_reg_offset (this_cache, MIPS_RA_REGNUM, sp + offset);
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set_reg_offset (gdbarch, this_cache, MIPS_RA_REGNUM, sp + offset);
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}
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else if ((inst & 0xff00) == 0xfa00) /* sd $ra,n($sp) */
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{
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offset = mips16_get_imm (prev_inst, inst, 8, 8, 0);
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set_reg_offset (this_cache, MIPS_RA_REGNUM, sp + offset);
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set_reg_offset (gdbarch, this_cache, MIPS_RA_REGNUM, sp + offset);
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}
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else if (inst == 0x673d) /* move $s1, $sp */
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{
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@ -1593,13 +1592,13 @@ mips16_scan_prologue (CORE_ADDR start_pc, CORE_ADDR limit_pc,
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{
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offset = mips16_get_imm (prev_inst, inst, 5, 4, 0);
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reg = mips16_to_32_reg[(inst & 0xe0) >> 5];
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set_reg_offset (this_cache, reg, frame_addr + offset);
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set_reg_offset (gdbarch, this_cache, reg, frame_addr + offset);
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}
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else if ((inst & 0xFF00) == 0x7900) /* sd reg,offset($s1) */
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{
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offset = mips16_get_imm (prev_inst, inst, 5, 8, 0);
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reg = mips16_to_32_reg[(inst & 0xe0) >> 5];
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set_reg_offset (this_cache, reg, frame_addr + offset);
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set_reg_offset (gdbarch, this_cache, reg, frame_addr + offset);
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}
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else if ((inst & 0xf81f) == 0xe809
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&& (inst & 0x700) != 0x700) /* entry */
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@ -1648,7 +1647,7 @@ mips16_scan_prologue (CORE_ADDR start_pc, CORE_ADDR limit_pc,
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/* Check if a0-a3 were saved in the caller's argument save area. */
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for (reg = 4, offset = 0; reg < areg_count + 4; reg++)
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{
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set_reg_offset (this_cache, reg, sp + offset);
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set_reg_offset (gdbarch, this_cache, reg, sp + offset);
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offset += mips_abi_regsize (gdbarch);
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}
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@ -1656,14 +1655,14 @@ mips16_scan_prologue (CORE_ADDR start_pc, CORE_ADDR limit_pc,
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offset = -4;
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if (entry_inst & 0x20)
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{
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set_reg_offset (this_cache, MIPS_RA_REGNUM, sp + offset);
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set_reg_offset (gdbarch, this_cache, MIPS_RA_REGNUM, sp + offset);
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offset -= mips_abi_regsize (gdbarch);
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}
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/* Check if the s0 and s1 registers were pushed on the stack. */
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for (reg = 16; reg < sreg_count + 16; reg++)
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{
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set_reg_offset (this_cache, reg, sp + offset);
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set_reg_offset (gdbarch, this_cache, reg, sp + offset);
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offset -= mips_abi_regsize (gdbarch);
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}
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}
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@ -1715,7 +1714,7 @@ mips16_scan_prologue (CORE_ADDR start_pc, CORE_ADDR limit_pc,
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/* Check if A0-A3 were saved in the caller's argument save area. */
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for (reg = MIPS_A0_REGNUM, offset = 0; reg < args + 4; reg++)
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{
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set_reg_offset (this_cache, reg, sp + offset);
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set_reg_offset (gdbarch, this_cache, reg, sp + offset);
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offset += mips_abi_regsize (gdbarch);
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}
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@ -1724,41 +1723,41 @@ mips16_scan_prologue (CORE_ADDR start_pc, CORE_ADDR limit_pc,
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/* Check if the RA register was pushed on the stack. */
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if (save_inst & 0x40)
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{
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set_reg_offset (this_cache, MIPS_RA_REGNUM, sp + offset);
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set_reg_offset (gdbarch, this_cache, MIPS_RA_REGNUM, sp + offset);
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offset -= mips_abi_regsize (gdbarch);
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}
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/* Check if the S8 register was pushed on the stack. */
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if (xsregs > 6)
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{
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set_reg_offset (this_cache, 30, sp + offset);
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set_reg_offset (gdbarch, this_cache, 30, sp + offset);
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offset -= mips_abi_regsize (gdbarch);
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xsregs--;
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}
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/* Check if S2-S7 were pushed on the stack. */
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for (reg = 18 + xsregs - 1; reg > 18 - 1; reg--)
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{
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set_reg_offset (this_cache, reg, sp + offset);
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set_reg_offset (gdbarch, this_cache, reg, sp + offset);
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offset -= mips_abi_regsize (gdbarch);
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}
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/* Check if the S1 register was pushed on the stack. */
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if (save_inst & 0x10)
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{
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set_reg_offset (this_cache, 17, sp + offset);
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set_reg_offset (gdbarch, this_cache, 17, sp + offset);
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offset -= mips_abi_regsize (gdbarch);
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}
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/* Check if the S0 register was pushed on the stack. */
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if (save_inst & 0x20)
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{
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set_reg_offset (this_cache, 16, sp + offset);
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set_reg_offset (gdbarch, this_cache, 16, sp + offset);
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offset -= mips_abi_regsize (gdbarch);
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}
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/* Check if A0-A3 were pushed on the stack. */
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for (reg = MIPS_A0_REGNUM + 3; reg > MIPS_A0_REGNUM + 3 - astatic; reg--)
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{
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set_reg_offset (this_cache, reg, sp + offset);
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set_reg_offset (gdbarch, this_cache, reg, sp + offset);
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offset -= mips_abi_regsize (gdbarch);
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}
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}
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@ -1808,7 +1807,7 @@ mips_insn16_frame_cache (struct frame_info *this_frame, void **this_cache)
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find_pc_partial_function (pc, NULL, &start_addr, NULL);
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if (start_addr == 0)
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start_addr = heuristic_proc_start (pc);
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start_addr = heuristic_proc_start (get_frame_arch (this_frame), pc);
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/* We can't analyze the prologue if we couldn't find the begining
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of the function. */
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if (start_addr == 0)
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@ -1893,14 +1892,14 @@ mips_insn16_frame_base_sniffer (struct frame_info *this_frame)
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/* Mark all the registers as unset in the saved_regs array
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of THIS_CACHE. Do nothing if THIS_CACHE is null. */
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void
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reset_saved_regs (struct mips_frame_cache *this_cache)
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static void
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reset_saved_regs (struct gdbarch *gdbarch, struct mips_frame_cache *this_cache)
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{
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if (this_cache == NULL || this_cache->saved_regs == NULL)
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return;
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{
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const int num_regs = gdbarch_num_regs (current_gdbarch);
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const int num_regs = gdbarch_num_regs (gdbarch);
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int i;
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for (i = 0; i < num_regs; i++)
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|
@ -1975,13 +1974,13 @@ restart:
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else if (((high_word & 0xFFE0) == 0xafa0) /* sw reg,offset($sp) */
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&& !regsize_is_64_bits)
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{
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set_reg_offset (this_cache, reg, sp + low_word);
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set_reg_offset (gdbarch, this_cache, reg, sp + low_word);
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}
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else if (((high_word & 0xFFE0) == 0xffa0) /* sd reg,offset($sp) */
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&& regsize_is_64_bits)
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{
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/* Irix 6.2 N32 ABI uses sd instructions for saving $gp and $ra. */
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set_reg_offset (this_cache, reg, sp + low_word);
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set_reg_offset (gdbarch, this_cache, reg, sp + low_word);
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}
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else if (high_word == 0x27be) /* addiu $30,$sp,size */
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{
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|
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@ -2007,7 +2006,7 @@ restart:
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we will hit a guard that prevents the new address
|
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for each register to be recomputed during the second
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pass. */
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reset_saved_regs (this_cache);
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reset_saved_regs (gdbarch, this_cache);
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goto restart;
|
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}
|
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}
|
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|
|
@ -2037,7 +2036,7 @@ restart:
|
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we will hit a guard that prevents the new address
|
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for each register to be recomputed during the second
|
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pass. */
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reset_saved_regs (this_cache);
|
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reset_saved_regs (gdbarch, this_cache);
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goto restart;
|
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}
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}
|
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|
|
@ -2045,7 +2044,7 @@ restart:
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else if ((high_word & 0xFFE0) == 0xafc0 /* sw reg,offset($30) */
|
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&& !regsize_is_64_bits)
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{
|
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set_reg_offset (this_cache, reg, frame_addr + low_word);
|
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set_reg_offset (gdbarch, this_cache, reg, frame_addr + low_word);
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}
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else if ((high_word & 0xFFE0) == 0xE7A0 /* swc1 freg,n($sp) */
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|| (high_word & 0xF3E0) == 0xA3C0 /* sx reg,n($s8) */
|
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|
|
@ -2145,7 +2144,7 @@ mips_insn32_frame_cache (struct frame_info *this_frame, void **this_cache)
|
|||
|
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find_pc_partial_function (pc, NULL, &start_addr, NULL);
|
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if (start_addr == 0)
|
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start_addr = heuristic_proc_start (pc);
|
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start_addr = heuristic_proc_start (get_frame_arch (this_frame), pc);
|
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/* We can't analyze the prologue if we couldn't find the begining
|
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of the function. */
|
||||
if (start_addr == 0)
|
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|
|
@ -2517,14 +2516,14 @@ mips_about_to_return (CORE_ADDR pc)
|
|||
lines. */
|
||||
|
||||
static CORE_ADDR
|
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heuristic_proc_start (CORE_ADDR pc)
|
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heuristic_proc_start (struct gdbarch *gdbarch, CORE_ADDR pc)
|
||||
{
|
||||
CORE_ADDR start_pc;
|
||||
CORE_ADDR fence;
|
||||
int instlen;
|
||||
int seen_adjsp = 0;
|
||||
|
||||
pc = gdbarch_addr_bits_remove (current_gdbarch, pc);
|
||||
pc = gdbarch_addr_bits_remove (gdbarch, pc);
|
||||
start_pc = pc;
|
||||
fence = start_pc - heuristic_fence_post;
|
||||
if (start_pc == 0)
|
||||
|
|
@ -2633,16 +2632,17 @@ struct mips_objfile_private
|
|||
arguments into integer registers. */
|
||||
|
||||
static int
|
||||
fp_register_arg_p (enum type_code typecode, struct type *arg_type)
|
||||
fp_register_arg_p (struct gdbarch *gdbarch, enum type_code typecode,
|
||||
struct type *arg_type)
|
||||
{
|
||||
return ((typecode == TYPE_CODE_FLT
|
||||
|| (MIPS_EABI
|
||||
|| (MIPS_EABI (gdbarch)
|
||||
&& (typecode == TYPE_CODE_STRUCT
|
||||
|| typecode == TYPE_CODE_UNION)
|
||||
&& TYPE_NFIELDS (arg_type) == 1
|
||||
&& TYPE_CODE (check_typedef (TYPE_FIELD_TYPE (arg_type, 0)))
|
||||
== TYPE_CODE_FLT))
|
||||
&& MIPS_FPU_TYPE != MIPS_FPU_NONE);
|
||||
&& MIPS_FPU_TYPE(gdbarch) != MIPS_FPU_NONE);
|
||||
}
|
||||
|
||||
/* On o32, argument passing in GPRs depends on the alignment of the type being
|
||||
|
|
@ -2777,7 +2777,7 @@ mips_eabi_push_dummy_call (struct gdbarch *gdbarch, struct value *function,
|
|||
up before the check to see if there are any FP registers
|
||||
left. Non MIPS_EABI targets also pass the FP in the integer
|
||||
registers so also round up normal registers. */
|
||||
if (regsize < 8 && fp_register_arg_p (typecode, arg_type))
|
||||
if (regsize < 8 && fp_register_arg_p (gdbarch, typecode, arg_type))
|
||||
{
|
||||
if ((float_argreg & 1))
|
||||
float_argreg++;
|
||||
|
|
@ -2795,8 +2795,8 @@ mips_eabi_push_dummy_call (struct gdbarch *gdbarch, struct value *function,
|
|||
/* MIPS_EABI squeezes a struct that contains a single floating
|
||||
point value into an FP register instead of pushing it onto the
|
||||
stack. */
|
||||
if (fp_register_arg_p (typecode, arg_type)
|
||||
&& float_argreg <= MIPS_LAST_FP_ARG_REGNUM)
|
||||
if (fp_register_arg_p (gdbarch, typecode, arg_type)
|
||||
&& float_argreg <= MIPS_LAST_FP_ARG_REGNUM (gdbarch))
|
||||
{
|
||||
/* EABI32 will pass doubles in consecutive registers, even on
|
||||
64-bit cores. At one time, we used to check the size of
|
||||
|
|
@ -2861,9 +2861,9 @@ mips_eabi_push_dummy_call (struct gdbarch *gdbarch, struct value *function,
|
|||
partial_len);
|
||||
|
||||
/* Write this portion of the argument to the stack. */
|
||||
if (argreg > MIPS_LAST_ARG_REGNUM
|
||||
if (argreg > MIPS_LAST_ARG_REGNUM (gdbarch)
|
||||
|| odd_sized_struct
|
||||
|| fp_register_arg_p (typecode, arg_type))
|
||||
|| fp_register_arg_p (gdbarch, typecode, arg_type))
|
||||
{
|
||||
/* Should shorter than int integer values be
|
||||
promoted to int before being stored? */
|
||||
|
|
@ -2912,8 +2912,8 @@ mips_eabi_push_dummy_call (struct gdbarch *gdbarch, struct value *function,
|
|||
arguments will not. */
|
||||
/* Write this portion of the argument to a general
|
||||
purpose register. */
|
||||
if (argreg <= MIPS_LAST_ARG_REGNUM
|
||||
&& !fp_register_arg_p (typecode, arg_type))
|
||||
if (argreg <= MIPS_LAST_ARG_REGNUM (gdbarch)
|
||||
&& !fp_register_arg_p (gdbarch, typecode, arg_type))
|
||||
{
|
||||
LONGEST regval =
|
||||
extract_unsigned_integer (val, partial_len);
|
||||
|
|
@ -3020,14 +3020,15 @@ mips_eabi_return_value (struct gdbarch *gdbarch, struct type *func_type,
|
|||
registers. */
|
||||
|
||||
static int
|
||||
mips_n32n64_fp_arg_chunk_p (struct type *arg_type, int offset)
|
||||
mips_n32n64_fp_arg_chunk_p (struct gdbarch *gdbarch, struct type *arg_type,
|
||||
int offset)
|
||||
{
|
||||
int i;
|
||||
|
||||
if (TYPE_CODE (arg_type) != TYPE_CODE_STRUCT)
|
||||
return 0;
|
||||
|
||||
if (MIPS_FPU_TYPE != MIPS_FPU_DOUBLE)
|
||||
if (MIPS_FPU_TYPE (gdbarch) != MIPS_FPU_DOUBLE)
|
||||
return 0;
|
||||
|
||||
if (TYPE_LENGTH (arg_type) < offset + MIPS64_REGSIZE)
|
||||
|
|
@ -3062,7 +3063,7 @@ mips_n32n64_fp_arg_chunk_p (struct type *arg_type, int offset)
|
|||
|
||||
/* This field starts at or before the requested offset, and
|
||||
overlaps it. If it is a structure, recurse inwards. */
|
||||
return mips_n32n64_fp_arg_chunk_p (field_type, offset - pos);
|
||||
return mips_n32n64_fp_arg_chunk_p (gdbarch, field_type, offset - pos);
|
||||
}
|
||||
|
||||
return 0;
|
||||
|
|
@ -3141,8 +3142,8 @@ mips_n32n64_push_dummy_call (struct gdbarch *gdbarch, struct value *function,
|
|||
|
||||
val = value_contents (arg);
|
||||
|
||||
if (fp_register_arg_p (typecode, arg_type)
|
||||
&& argreg <= MIPS_LAST_ARG_REGNUM)
|
||||
if (fp_register_arg_p (gdbarch, typecode, arg_type)
|
||||
&& argreg <= MIPS_LAST_ARG_REGNUM (gdbarch))
|
||||
{
|
||||
/* This is a floating point value that fits entirely
|
||||
in a single register. */
|
||||
|
|
@ -3184,11 +3185,11 @@ mips_n32n64_push_dummy_call (struct gdbarch *gdbarch, struct value *function,
|
|||
fprintf_unfiltered (gdb_stdlog, " -- partial=%d",
|
||||
partial_len);
|
||||
|
||||
if (fp_register_arg_p (typecode, arg_type))
|
||||
gdb_assert (argreg > MIPS_LAST_ARG_REGNUM);
|
||||
if (fp_register_arg_p (gdbarch, typecode, arg_type))
|
||||
gdb_assert (argreg > MIPS_LAST_ARG_REGNUM (gdbarch));
|
||||
|
||||
/* Write this portion of the argument to the stack. */
|
||||
if (argreg > MIPS_LAST_ARG_REGNUM)
|
||||
if (argreg > MIPS_LAST_ARG_REGNUM (gdbarch))
|
||||
{
|
||||
/* Should shorter than int integer values be
|
||||
promoted to int before being stored? */
|
||||
|
|
@ -3232,7 +3233,7 @@ mips_n32n64_push_dummy_call (struct gdbarch *gdbarch, struct value *function,
|
|||
structs may go thru BOTH paths. */
|
||||
/* Write this portion of the argument to a general
|
||||
purpose register. */
|
||||
if (argreg <= MIPS_LAST_ARG_REGNUM)
|
||||
if (argreg <= MIPS_LAST_ARG_REGNUM (gdbarch))
|
||||
{
|
||||
LONGEST regval;
|
||||
|
||||
|
|
@ -3272,7 +3273,7 @@ mips_n32n64_push_dummy_call (struct gdbarch *gdbarch, struct value *function,
|
|||
phex (regval, MIPS64_REGSIZE));
|
||||
regcache_cooked_write_unsigned (regcache, argreg, regval);
|
||||
|
||||
if (mips_n32n64_fp_arg_chunk_p (arg_type,
|
||||
if (mips_n32n64_fp_arg_chunk_p (gdbarch, arg_type,
|
||||
TYPE_LENGTH (arg_type) - len))
|
||||
{
|
||||
if (mips_debug)
|
||||
|
|
@ -3552,7 +3553,7 @@ mips_o32_push_dummy_call (struct gdbarch *gdbarch, struct value *function,
|
|||
up before the check to see if there are any FP registers
|
||||
left. O32/O64 targets also pass the FP in the integer
|
||||
registers so also round up normal registers. */
|
||||
if (fp_register_arg_p (typecode, arg_type))
|
||||
if (fp_register_arg_p (gdbarch, typecode, arg_type))
|
||||
{
|
||||
if ((float_argreg & 1))
|
||||
float_argreg++;
|
||||
|
|
@ -3568,8 +3569,8 @@ mips_o32_push_dummy_call (struct gdbarch *gdbarch, struct value *function,
|
|||
arguments in general registers can't hurt non-MIPS16 functions
|
||||
because those registers are normally skipped. */
|
||||
|
||||
if (fp_register_arg_p (typecode, arg_type)
|
||||
&& float_argreg <= MIPS_LAST_FP_ARG_REGNUM)
|
||||
if (fp_register_arg_p (gdbarch, typecode, arg_type)
|
||||
&& float_argreg <= MIPS_LAST_FP_ARG_REGNUM (gdbarch))
|
||||
{
|
||||
if (register_size (gdbarch, float_argreg) < 8 && len == 8)
|
||||
{
|
||||
|
|
@ -3657,7 +3658,7 @@ mips_o32_push_dummy_call (struct gdbarch *gdbarch, struct value *function,
|
|||
partial_len);
|
||||
|
||||
/* Write this portion of the argument to the stack. */
|
||||
if (argreg > MIPS_LAST_ARG_REGNUM
|
||||
if (argreg > MIPS_LAST_ARG_REGNUM (gdbarch)
|
||||
|| odd_sized_struct)
|
||||
{
|
||||
/* Should shorter than int integer values be
|
||||
|
|
@ -3694,7 +3695,7 @@ mips_o32_push_dummy_call (struct gdbarch *gdbarch, struct value *function,
|
|||
structs may go thru BOTH paths. */
|
||||
/* Write this portion of the argument to a general
|
||||
purpose register. */
|
||||
if (argreg <= MIPS_LAST_ARG_REGNUM)
|
||||
if (argreg <= MIPS_LAST_ARG_REGNUM (gdbarch))
|
||||
{
|
||||
LONGEST regval = extract_signed_integer (val, partial_len);
|
||||
/* Value may need to be sign extended, because
|
||||
|
|
@ -3741,7 +3742,7 @@ mips_o32_push_dummy_call (struct gdbarch *gdbarch, struct value *function,
|
|||
|
||||
/* Prevent subsequent floating point arguments from
|
||||
being passed in floating point registers. */
|
||||
float_argreg = MIPS_LAST_FP_ARG_REGNUM + 1;
|
||||
float_argreg = MIPS_LAST_FP_ARG_REGNUM (gdbarch) + 1;
|
||||
}
|
||||
|
||||
len -= partial_len;
|
||||
|
|
@ -4016,8 +4017,8 @@ mips_o64_push_dummy_call (struct gdbarch *gdbarch, struct value *function,
|
|||
arguments in general registers can't hurt non-MIPS16 functions
|
||||
because those registers are normally skipped. */
|
||||
|
||||
if (fp_register_arg_p (typecode, arg_type)
|
||||
&& float_argreg <= MIPS_LAST_FP_ARG_REGNUM)
|
||||
if (fp_register_arg_p (gdbarch, typecode, arg_type)
|
||||
&& float_argreg <= MIPS_LAST_FP_ARG_REGNUM (gdbarch))
|
||||
{
|
||||
LONGEST regval = extract_unsigned_integer (val, len);
|
||||
if (mips_debug)
|
||||
|
|
@ -4054,7 +4055,7 @@ mips_o64_push_dummy_call (struct gdbarch *gdbarch, struct value *function,
|
|||
partial_len);
|
||||
|
||||
/* Write this portion of the argument to the stack. */
|
||||
if (argreg > MIPS_LAST_ARG_REGNUM
|
||||
if (argreg > MIPS_LAST_ARG_REGNUM (gdbarch)
|
||||
|| odd_sized_struct)
|
||||
{
|
||||
/* Should shorter than int integer values be
|
||||
|
|
@ -4099,7 +4100,7 @@ mips_o64_push_dummy_call (struct gdbarch *gdbarch, struct value *function,
|
|||
structs may go thru BOTH paths. */
|
||||
/* Write this portion of the argument to a general
|
||||
purpose register. */
|
||||
if (argreg <= MIPS_LAST_ARG_REGNUM)
|
||||
if (argreg <= MIPS_LAST_ARG_REGNUM (gdbarch))
|
||||
{
|
||||
LONGEST regval = extract_signed_integer (val, partial_len);
|
||||
/* Value may need to be sign extended, because
|
||||
|
|
@ -4130,7 +4131,7 @@ mips_o64_push_dummy_call (struct gdbarch *gdbarch, struct value *function,
|
|||
|
||||
/* Prevent subsequent floating point arguments from
|
||||
being passed in floating point registers. */
|
||||
float_argreg = MIPS_LAST_FP_ARG_REGNUM + 1;
|
||||
float_argreg = MIPS_LAST_FP_ARG_REGNUM (gdbarch) + 1;
|
||||
}
|
||||
|
||||
len -= partial_len;
|
||||
|
|
@ -4168,7 +4169,7 @@ mips_o64_return_value (struct gdbarch *gdbarch, struct type *func_type,
|
|||
|| TYPE_CODE (type) == TYPE_CODE_UNION
|
||||
|| TYPE_CODE (type) == TYPE_CODE_ARRAY)
|
||||
return RETURN_VALUE_STRUCT_CONVENTION;
|
||||
else if (fp_register_arg_p (TYPE_CODE (type), type))
|
||||
else if (fp_register_arg_p (gdbarch, TYPE_CODE (type), type))
|
||||
{
|
||||
/* A floating-point value. It fits in the least significant
|
||||
part of FP0. */
|
||||
|
|
@ -4785,7 +4786,7 @@ show_mipsfpu_command (char *args, int from_tty)
|
|||
return;
|
||||
}
|
||||
|
||||
switch (MIPS_FPU_TYPE)
|
||||
switch (MIPS_FPU_TYPE (current_gdbarch))
|
||||
{
|
||||
case MIPS_FPU_SINGLE:
|
||||
fpu = "single-precision";
|
||||
|
|
@ -6032,13 +6033,14 @@ mips_dump_tdep (struct gdbarch *gdbarch, struct ui_file *file)
|
|||
: MIPS_DEFAULT_FPU_TYPE == MIPS_FPU_SINGLE ? "single"
|
||||
: MIPS_DEFAULT_FPU_TYPE == MIPS_FPU_DOUBLE ? "double"
|
||||
: "???"));
|
||||
fprintf_unfiltered (file, "mips_dump_tdep: MIPS_EABI = %d\n", MIPS_EABI);
|
||||
fprintf_unfiltered (file, "mips_dump_tdep: MIPS_EABI = %d\n",
|
||||
MIPS_EABI (gdbarch));
|
||||
fprintf_unfiltered (file,
|
||||
"mips_dump_tdep: MIPS_FPU_TYPE = %d (%s)\n",
|
||||
MIPS_FPU_TYPE,
|
||||
(MIPS_FPU_TYPE == MIPS_FPU_NONE ? "none"
|
||||
: MIPS_FPU_TYPE == MIPS_FPU_SINGLE ? "single"
|
||||
: MIPS_FPU_TYPE == MIPS_FPU_DOUBLE ? "double"
|
||||
MIPS_FPU_TYPE (gdbarch),
|
||||
(MIPS_FPU_TYPE (gdbarch) == MIPS_FPU_NONE ? "none"
|
||||
: MIPS_FPU_TYPE (gdbarch) == MIPS_FPU_SINGLE ? "single"
|
||||
: MIPS_FPU_TYPE (gdbarch) == MIPS_FPU_DOUBLE ? "double"
|
||||
: "???"));
|
||||
}
|
||||
|
||||
|
|
|
|||
|
|
@ -33,16 +33,17 @@
|
|||
|
||||
/* Determine if PT_GETREGS fetches this register. */
|
||||
static int
|
||||
getregs_supplies (int regno)
|
||||
getregs_supplies (struct gdbarch *gdbarch, int regno)
|
||||
{
|
||||
return ((regno) >= MIPS_ZERO_REGNUM
|
||||
&& (regno) <= gdbarch_pc_regnum (current_gdbarch));
|
||||
&& (regno) <= gdbarch_pc_regnum (gdbarch));
|
||||
}
|
||||
|
||||
static void
|
||||
mipsnbsd_fetch_inferior_registers (struct regcache *regcache, int regno)
|
||||
{
|
||||
if (regno == -1 || getregs_supplies (regno))
|
||||
struct gdbarch *gdbarch = get_regcache_arch (regcache);
|
||||
if (regno == -1 || getregs_supplies (gdbarch, regno))
|
||||
{
|
||||
struct reg regs;
|
||||
|
||||
|
|
@ -70,7 +71,8 @@ mipsnbsd_fetch_inferior_registers (struct regcache *regcache, int regno)
|
|||
static void
|
||||
mipsnbsd_store_inferior_registers (struct regcache *regcache, int regno)
|
||||
{
|
||||
if (regno == -1 || getregs_supplies (regno))
|
||||
struct gdbarch *gdbarch = get_regcache_arch (regcache);
|
||||
if (regno == -1 || getregs_supplies (gdbarch, regno))
|
||||
{
|
||||
struct reg regs;
|
||||
|
||||
|
|
|
|||
|
|
@ -286,25 +286,26 @@ mipsnbsd_sigtramp_offset (struct frame_info *this_frame)
|
|||
success. */
|
||||
|
||||
#define NBSD_MIPS_JB_PC (2 * 4)
|
||||
#define NBSD_MIPS_JB_ELEMENT_SIZE mips_isa_regsize (current_gdbarch)
|
||||
#define NBSD_MIPS_JB_OFFSET (NBSD_MIPS_JB_PC * \
|
||||
NBSD_MIPS_JB_ELEMENT_SIZE)
|
||||
#define NBSD_MIPS_JB_ELEMENT_SIZE(gdbarch) mips_isa_regsize (gdbarch)
|
||||
#define NBSD_MIPS_JB_OFFSET(gdbarch) (NBSD_MIPS_JB_PC * \
|
||||
NBSD_MIPS_JB_ELEMENT_SIZE (gdbarch))
|
||||
|
||||
static int
|
||||
mipsnbsd_get_longjmp_target (struct frame_info *frame, CORE_ADDR *pc)
|
||||
{
|
||||
struct gdbarch *gdbarch = get_frame_arch (frame);
|
||||
CORE_ADDR jb_addr;
|
||||
char *buf;
|
||||
|
||||
buf = alloca (NBSD_MIPS_JB_ELEMENT_SIZE);
|
||||
buf = alloca (NBSD_MIPS_JB_ELEMENT_SIZE (gdbarch));
|
||||
|
||||
jb_addr = get_frame_register_unsigned (frame, MIPS_A0_REGNUM);
|
||||
|
||||
if (target_read_memory (jb_addr + NBSD_MIPS_JB_OFFSET, buf,
|
||||
NBSD_MIPS_JB_ELEMENT_SIZE))
|
||||
if (target_read_memory (jb_addr + NBSD_MIPS_JB_OFFSET (gdbarch), buf,
|
||||
NBSD_MIPS_JB_ELEMENT_SIZE (gdbarch)))
|
||||
return 0;
|
||||
|
||||
*pc = extract_unsigned_integer (buf, NBSD_MIPS_JB_ELEMENT_SIZE);
|
||||
*pc = extract_unsigned_integer (buf, NBSD_MIPS_JB_ELEMENT_SIZE (gdbarch));
|
||||
|
||||
return 1;
|
||||
}
|
||||
|
|
|
|||
|
|
@ -92,7 +92,7 @@ static void mips_resume (ptid_t ptid, int step,
|
|||
static ptid_t mips_wait (ptid_t ptid,
|
||||
struct target_waitstatus *status);
|
||||
|
||||
static int mips_map_regno (int regno);
|
||||
static int mips_map_regno (struct gdbarch *, int);
|
||||
|
||||
static void mips_fetch_registers (struct regcache *regcache, int regno);
|
||||
|
||||
|
|
@ -1875,24 +1875,24 @@ mips_wait (ptid_t ptid, struct target_waitstatus *status)
|
|||
#define REGNO_OFFSET 96
|
||||
|
||||
static int
|
||||
mips_map_regno (int regno)
|
||||
mips_map_regno (struct gdbarch *gdbarch, int regno)
|
||||
{
|
||||
if (regno < 32)
|
||||
return regno;
|
||||
if (regno >= mips_regnum (current_gdbarch)->fp0
|
||||
&& regno < mips_regnum (current_gdbarch)->fp0 + 32)
|
||||
return regno - mips_regnum (current_gdbarch)->fp0 + 32;
|
||||
else if (regno == mips_regnum (current_gdbarch)->pc)
|
||||
if (regno >= mips_regnum (gdbarch)->fp0
|
||||
&& regno < mips_regnum (gdbarch)->fp0 + 32)
|
||||
return regno - mips_regnum (gdbarch)->fp0 + 32;
|
||||
else if (regno == mips_regnum (gdbarch)->pc)
|
||||
return REGNO_OFFSET + 0;
|
||||
else if (regno == mips_regnum (current_gdbarch)->cause)
|
||||
else if (regno == mips_regnum (gdbarch)->cause)
|
||||
return REGNO_OFFSET + 1;
|
||||
else if (regno == mips_regnum (current_gdbarch)->hi)
|
||||
else if (regno == mips_regnum (gdbarch)->hi)
|
||||
return REGNO_OFFSET + 2;
|
||||
else if (regno == mips_regnum (current_gdbarch)->lo)
|
||||
else if (regno == mips_regnum (gdbarch)->lo)
|
||||
return REGNO_OFFSET + 3;
|
||||
else if (regno == mips_regnum (current_gdbarch)->fp_control_status)
|
||||
else if (regno == mips_regnum (gdbarch)->fp_control_status)
|
||||
return REGNO_OFFSET + 4;
|
||||
else if (regno == mips_regnum (current_gdbarch)->fp_implementation_revision)
|
||||
else if (regno == mips_regnum (gdbarch)->fp_implementation_revision)
|
||||
return REGNO_OFFSET + 5;
|
||||
else
|
||||
/* FIXME: Is there a way to get the status register? */
|
||||
|
|
@ -1924,7 +1924,7 @@ mips_fetch_registers (struct regcache *regcache, int regno)
|
|||
{
|
||||
/* If PMON doesn't support this register, don't waste serial
|
||||
bandwidth trying to read it. */
|
||||
int pmon_reg = mips_map_regno (regno);
|
||||
int pmon_reg = mips_map_regno (gdbarch, regno);
|
||||
if (regno != 0 && pmon_reg == 0)
|
||||
val = 0;
|
||||
else
|
||||
|
|
@ -1979,7 +1979,7 @@ mips_store_registers (struct regcache *regcache, int regno)
|
|||
}
|
||||
|
||||
regcache_cooked_read_unsigned (regcache, regno, &val);
|
||||
mips_request ('R', mips_map_regno (regno), val,
|
||||
mips_request ('R', mips_map_regno (gdbarch, regno), val,
|
||||
&err, mips_receive_wait, NULL);
|
||||
if (err)
|
||||
mips_error ("Can't write register %d: %s", regno, safe_strerror (errno));
|
||||
|
|
@ -3281,8 +3281,10 @@ mips_load (char *file, int from_tty)
|
|||
/* Work around problem where PMON monitor updates the PC after a load
|
||||
to a different value than GDB thinks it has. The following ensures
|
||||
that the write_pc() WILL update the PC value: */
|
||||
regcache_set_valid_p (get_current_regcache (),
|
||||
gdbarch_pc_regnum (current_gdbarch), 0);
|
||||
struct regcache *regcache = get_current_regcache ();
|
||||
regcache_set_valid_p (regcache,
|
||||
gdbarch_pc_regnum (get_regcache_arch (regcache)),
|
||||
0);
|
||||
}
|
||||
if (exec_bfd)
|
||||
write_pc (bfd_get_start_address (exec_bfd));
|
||||
|
|
|
|||
Loading…
Reference in New Issue