(profile_print_core): Simplify by calling sim_core_map_to_str.
* sim-core.h (sim_core_map_to_str): Declare. * sim-core.c (sim_core_map_to_str): Make non-static.
This commit is contained in:
Doug Evans
parent
3910fb4a51
commit
751197f231
@ -127,7 +127,7 @@ sim_core_signal (SIM_DESC sd,
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#endif
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STATIC_INLINE_SIM_CORE\
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EXTERN_SIM_CORE\
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(const char *)
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sim_core_map_to_str (sim_core_maps map)
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{
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@ -138,6 +138,13 @@ EXTERN_SIM_CORE\
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void *optional_buffer);
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/* Utility to return the name of a map. */
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EXTERN_SIM_CORE\
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(const char *) sim_core_map_to_str
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(sim_core_maps);
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/* Delete a memory space within the core.
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*/
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@ -240,38 +247,45 @@ EXTERN_SIM_CORE\
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order (including xor endian). Should the transfer fail, the
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operation shall abort (no return).
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The aligned alternative makes the assumption that that the address
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is N byte aligned (no alignment checks are made).
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ALIGNED assumes yhat the specified ADDRESS is correctly alligned
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for an N byte transfer (no alignment checks are made). Passing an
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incorrectly aligned ADDRESS is erroneous.
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The unaligned alternative checks the address for correct byte
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alignment. Action, as defined by WITH_ALIGNMENT, being taken
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should the check fail.
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UNALIGNED checks/modifies the ADDRESS according to the requirements
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of an N byte transfer. Action, as defined by WITH_ALIGNMENT, being
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taken should the check fail.
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MISSALIGNED transfers the data regardless.
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Misaligned xor-endian accesses are broken into a sequence of
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transfers each <= WITH_XOR_ENDIAN bytes */
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#define DECLARE_SIM_CORE_WRITE_N(ALIGNMENT,N) \
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#define DECLARE_SIM_CORE_WRITE_N(ALIGNMENT,N,M) \
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INLINE_SIM_CORE\
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(void) sim_core_write_##ALIGNMENT##_##N \
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(sim_cpu *cpu, \
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sim_cia cia, \
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sim_core_maps map, \
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address_word addr, \
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unsigned_##N val);
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unsigned_##M val);
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DECLARE_SIM_CORE_WRITE_N(aligned,1)
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DECLARE_SIM_CORE_WRITE_N(aligned,2)
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DECLARE_SIM_CORE_WRITE_N(aligned,4)
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DECLARE_SIM_CORE_WRITE_N(aligned,8)
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DECLARE_SIM_CORE_WRITE_N(aligned,16)
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DECLARE_SIM_CORE_WRITE_N(aligned,1,1)
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DECLARE_SIM_CORE_WRITE_N(aligned,2,2)
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DECLARE_SIM_CORE_WRITE_N(aligned,4,4)
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DECLARE_SIM_CORE_WRITE_N(aligned,8,8)
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DECLARE_SIM_CORE_WRITE_N(aligned,16,16)
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DECLARE_SIM_CORE_WRITE_N(unaligned,1)
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DECLARE_SIM_CORE_WRITE_N(unaligned,2)
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DECLARE_SIM_CORE_WRITE_N(unaligned,4)
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DECLARE_SIM_CORE_WRITE_N(unaligned,8)
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DECLARE_SIM_CORE_WRITE_N(unaligned,16)
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#define sim_core_write_unaligned_1 sim_core_write_aligned_1
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DECLARE_SIM_CORE_WRITE_N(unaligned,2,2)
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DECLARE_SIM_CORE_WRITE_N(unaligned,4,4)
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DECLARE_SIM_CORE_WRITE_N(unaligned,8,8)
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DECLARE_SIM_CORE_WRITE_N(unaligned,16,16)
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DECLARE_SIM_CORE_WRITE_N(misaligned,3,4)
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DECLARE_SIM_CORE_WRITE_N(misaligned,5,8)
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DECLARE_SIM_CORE_WRITE_N(misaligned,6,8)
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DECLARE_SIM_CORE_WRITE_N(misaligned,7,8)
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#define sim_core_write_1 sim_core_write_aligned_1
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#define sim_core_write_2 sim_core_write_aligned_2
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@ -286,25 +300,31 @@ DECLARE_SIM_CORE_WRITE_N(unaligned,16)
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#undef DECLARE_SIM_CORE_WRITE_N
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#define DECLARE_SIM_CORE_READ_N(ALIGNMENT,N) \
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#define DECLARE_SIM_CORE_READ_N(ALIGNMENT,N,M) \
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INLINE_SIM_CORE\
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(unsigned_##N) sim_core_read_##ALIGNMENT##_##N \
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(unsigned_##M) sim_core_read_##ALIGNMENT##_##N \
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(sim_cpu *cpu, \
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sim_cia cia, \
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sim_core_maps map, \
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address_word addr);
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DECLARE_SIM_CORE_READ_N(aligned,1)
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DECLARE_SIM_CORE_READ_N(aligned,2)
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DECLARE_SIM_CORE_READ_N(aligned,4)
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DECLARE_SIM_CORE_READ_N(aligned,8)
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DECLARE_SIM_CORE_READ_N(aligned,16)
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DECLARE_SIM_CORE_READ_N(aligned,1,1)
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DECLARE_SIM_CORE_READ_N(aligned,2,2)
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DECLARE_SIM_CORE_READ_N(aligned,4,4)
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DECLARE_SIM_CORE_READ_N(aligned,8,8)
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DECLARE_SIM_CORE_READ_N(aligned,16,16)
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#define sim_core_read_unaligned_1 sim_core_read_aligned_1
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DECLARE_SIM_CORE_READ_N(unaligned,2,2)
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DECLARE_SIM_CORE_READ_N(unaligned,4,4)
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DECLARE_SIM_CORE_READ_N(unaligned,8,8)
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DECLARE_SIM_CORE_READ_N(unaligned,16,16)
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DECLARE_SIM_CORE_READ_N(misaligned,3,4)
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DECLARE_SIM_CORE_READ_N(misaligned,5,8)
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DECLARE_SIM_CORE_READ_N(misaligned,6,8)
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DECLARE_SIM_CORE_READ_N(misaligned,7,8)
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DECLARE_SIM_CORE_READ_N(unaligned,1)
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DECLARE_SIM_CORE_READ_N(unaligned,2)
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DECLARE_SIM_CORE_READ_N(unaligned,4)
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DECLARE_SIM_CORE_READ_N(unaligned,8)
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DECLARE_SIM_CORE_READ_N(unaligned,16)
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#define sim_core_read_1 sim_core_read_aligned_1
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#define sim_core_read_2 sim_core_read_aligned_2
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@ -711,20 +711,7 @@ profile_print_core (sim_cpu *cpu, int verbose)
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{
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if (PROFILE_CORE_COUNT (data) [map] != 0)
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{
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switch (map)
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{
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case sim_core_read_map:
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sim_io_printf (sd, " read:");
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break;
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case sim_core_write_map:
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sim_io_printf (sd, " write:");
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break;
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case sim_core_execute_map:
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sim_io_printf (sd, " exec:");
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break;
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case nr_sim_core_maps:
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; /* ignore */
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}
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sim_io_printf (sd, "%10s:", sim_core_map_to_str (map));
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sim_io_printf (sd, "%*s: ",
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max_val < 10000 ? 5 : 10,
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COMMAS (PROFILE_CORE_COUNT (data) [map]));
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