Add missing break statemenets.
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@ -1,3 +1,7 @@
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2009-05-09 Anthony Green <green@moxielogic.com>
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* interp.c (sim_resume): Add missing breaks in switch.
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2008-10-03 Anthony Green <green@moxielogic.com>
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2008-10-03 Anthony Green <green@moxielogic.com>
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* interp.c (sim_resume): Add support for ldo.b, sto.b, ldo.s, sto.s.
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* interp.c (sim_resume): Add support for ldo.b, sto.b, ldo.s, sto.s.
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@ -460,6 +460,7 @@ sim_resume (sd, step, siggnal)
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TRACE("gsr");
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TRACE("gsr");
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cpu.asregs.regs[a] = cpu.asregs.sregs[v];
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cpu.asregs.regs[a] = cpu.asregs.sregs[v];
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}
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}
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break;
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case 0x03: /* ssr */
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case 0x03: /* ssr */
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{
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{
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int a = (inst >> 8) & 0xf;
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int a = (inst >> 8) & 0xf;
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@ -467,6 +468,7 @@ sim_resume (sd, step, siggnal)
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TRACE("ssr");
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TRACE("ssr");
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cpu.asregs.sregs[v] = cpu.asregs.regs[a];
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cpu.asregs.sregs[v] = cpu.asregs.regs[a];
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}
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}
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break;
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default:
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default:
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TRACE("SIGILL2");
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TRACE("SIGILL2");
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cpu.asregs.exception = SIGILL;
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cpu.asregs.exception = SIGILL;
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