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? gas/testsuite/gas/mips/rol64.d 

? gas/testsuite/gas/mips/rol64.s
Index: gas/ChangeLog
===================================================================
RCS file: /cvs/src/src/gas/ChangeLog,v
retrieving revision 1.1334
diff -u -p -r1.1334 ChangeLog
--- gas/ChangeLog	21 May 2002 20:01:51 -0000	1.1334
+++ gas/ChangeLog	21 May 2002 23:32:51 -0000
@@ -1,3 +1,8 @@
+2002-05-22  Thiemo Seufer <seufer@csv.ica.uni-stuttgart.de>
+
+	* config/tc-mips.c (macro2): Add 64 bit drol, dror macros.
+	Optimize the rotate by zero case.
+
 2002-05-21  Nick Clifton  <nickc@cambridge.redhat.com>

 	* configure.in: Remove accidental enabling of bfd_gas=yes for
Index: gas/config/tc-mips.c
===================================================================
RCS file: /cvs/src/src/gas/config/tc-mips.c,v
retrieving revision 1.123
diff -u -p -r1.123 tc-mips.c
--- gas/config/tc-mips.c	14 May 2002 23:35:59 -0000	1.123
+++ gas/config/tc-mips.c	21 May 2002 23:32:52 -0000
@@ -6686,6 +6686,17 @@ macro2 (ip)
       --mips_opts.noreorder;
       break;

+    case M_DROL:
+      macro_build ((char *) NULL, &icnt, (expressionS *) NULL, "dsubu",
+		   "d,v,t", AT, 0, treg);
+      macro_build ((char *) NULL, &icnt, (expressionS *) NULL, "dsrlv",
+		   "d,t,s", AT, sreg, AT);
+      macro_build ((char *) NULL, &icnt, (expressionS *) NULL, "dsllv",
+		   "d,t,s", dreg, sreg, treg);
+      macro_build ((char *) NULL, &icnt, (expressionS *) NULL, "or",
+		   "d,v,t", dreg, dreg, AT);
+      break;
+
     case M_ROL:
       macro_build ((char *) NULL, &icnt, (expressionS *) NULL, "subu",
 		   "d,v,t", AT, 0, treg);
@@ -6697,15 +6708,55 @@ macro2 (ip)
 		   "d,v,t", dreg, dreg, AT);
       break;

+    case M_DROL_I:
+      {
+	unsigned int rot;
+	char *l, *r;
+
+	if (imm_expr.X_op != O_constant)
+	  as_bad (_("rotate count too large"));
+	rot = imm_expr.X_add_number & 0x3f;
+	if (! rot)
+	  break;
+	l = (rot < 0x20) ? "dsll" : "dsll32";
+	r = ((0x40 - rot) < 0x20) ? "dsrl" : "dsrl32";
+	rot &= 0x1f;
+	macro_build ((char *) NULL, &icnt, (expressionS *) NULL, l,
+		     "d,w,<", AT, sreg, rot);
+	macro_build ((char *) NULL, &icnt, (expressionS *) NULL, r,
+		     "d,w,<", dreg, sreg, (0x20 - rot) & 0x1f);
+	macro_build ((char *) NULL, &icnt, (expressionS *) NULL, "or",
+		     "d,v,t", dreg, dreg, AT);
+      }
+      break;
+
     case M_ROL_I:
-      if (imm_expr.X_op != O_constant)
-	as_bad (_("rotate count too large"));
-      macro_build ((char *) NULL, &icnt, (expressionS *) NULL, "sll", "d,w,<",
-		   AT, sreg, (int) (imm_expr.X_add_number & 0x1f));
-      macro_build ((char *) NULL, &icnt, (expressionS *) NULL, "srl", "d,w,<",
-		   dreg, sreg, (int) ((0 - imm_expr.X_add_number) & 0x1f));
-      macro_build ((char *) NULL, &icnt, (expressionS *) NULL, "or", "d,v,t",
-		   dreg, dreg, AT);
+      {
+	unsigned int rot;
+
+	if (imm_expr.X_op != O_constant)
+	  as_bad (_("rotate count too large"));
+	rot = imm_expr.X_add_number & 0x1f;
+	if (! rot)
+	  break;
+	macro_build ((char *) NULL, &icnt, (expressionS *) NULL, "sll",
+		     "d,w,<", AT, sreg, rot);
+	macro_build ((char *) NULL, &icnt, (expressionS *) NULL, "srl",
+		     "d,w,<", dreg, sreg, (0x20 - rot) & 0x1f);
+	macro_build ((char *) NULL, &icnt, (expressionS *) NULL, "or",
+		     "d,v,t", dreg, dreg, AT);
+      }
+      break;
+
+    case M_DROR:
+      macro_build ((char *) NULL, &icnt, (expressionS *) NULL, "dsubu",
+		   "d,v,t", AT, 0, treg);
+      macro_build ((char *) NULL, &icnt, (expressionS *) NULL, "dsllv",
+		   "d,t,s", AT, sreg, AT);
+      macro_build ((char *) NULL, &icnt, (expressionS *) NULL, "dsrlv",
+		   "d,t,s", dreg, sreg, treg);
+      macro_build ((char *) NULL, &icnt, (expressionS *) NULL, "or",
+		   "d,v,t", dreg, dreg, AT);
       break;

     case M_ROR:
@@ -6719,15 +6770,44 @@ macro2 (ip)
 		   "d,v,t", dreg, dreg, AT);
       break;

+    case M_DROR_I:
+      {
+	unsigned int rot;
+	char *l, *r;
+
+	if (imm_expr.X_op != O_constant)
+	  as_bad (_("rotate count too large"));
+	rot = imm_expr.X_add_number & 0x3f;
+	if (! rot)
+	  break;
+	r = (rot < 0x20) ? "dsrl" : "dsrl32";
+	l = ((0x40 - rot) < 0x20) ? "dsll" : "dsll32";
+	rot &= 0x1f;
+	macro_build ((char *) NULL, &icnt, (expressionS *) NULL, r,
+		     "d,w,<", AT, sreg, rot);
+	macro_build ((char *) NULL, &icnt, (expressionS *) NULL, l,
+		     "d,w,<", dreg, sreg, (0x20 - rot) & 0x1f);
+	macro_build ((char *) NULL, &icnt, (expressionS *) NULL, "or",
+		     "d,v,t", dreg, dreg, AT);
+      }
+      break;
+
     case M_ROR_I:
-      if (imm_expr.X_op != O_constant)
-	as_bad (_("rotate count too large"));
-      macro_build ((char *) NULL, &icnt, (expressionS *) NULL, "srl", "d,w,<",
-		   AT, sreg, (int) (imm_expr.X_add_number & 0x1f));
-      macro_build ((char *) NULL, &icnt, (expressionS *) NULL, "sll", "d,w,<",
-		   dreg, sreg, (int) ((0 - imm_expr.X_add_number) & 0x1f));
-      macro_build ((char *) NULL, &icnt, (expressionS *) NULL, "or", "d,v,t",
-		   dreg, dreg, AT);
+      {
+	unsigned int rot;
+
+	if (imm_expr.X_op != O_constant)
+	  as_bad (_("rotate count too large"));
+	rot = imm_expr.X_add_number & 0x1f;
+	if (! rot)
+	  break;
+	macro_build ((char *) NULL, &icnt, (expressionS *) NULL, "srl",
+		     "d,w,<", AT, sreg, rot);
+	macro_build ((char *) NULL, &icnt, (expressionS *) NULL, "sll",
+		     "d,w,<", dreg, sreg, (0x20 - rot) & 0x1f);
+	macro_build ((char *) NULL, &icnt, (expressionS *) NULL, "or",
+		     "d,v,t", dreg, dreg, AT);
+      }
       break;

     case M_S_DOB:
Index: gas/testsuite/ChangeLog
===================================================================
RCS file: /cvs/src/src/gas/testsuite/ChangeLog,v
retrieving revision 1.315
diff -u -p -r1.315 ChangeLog
--- gas/testsuite/ChangeLog	20 May 2002 17:05:34 -0000	1.315
+++ gas/testsuite/ChangeLog	21 May 2002 23:32:54 -0000
@@ -1,3 +1,9 @@
+2002-05-22  Thiemo Seufer <seufer@csv.ica.uni-stuttgart.de>
+
+	* gas/mips/rol64.s: New file, test of drol, dror macros.
+	* gas/mips/rol64.d: Likewise.
+	* gas/mips/mips.exp: Add new test.
+
 2002-05-20  Nick Clifton  <nickc@cambridge.redhat.com>

 	* gas/arm/arm.exp: Replace deprecated command line switches
Index: gas/testsuite/gas/mips/mips.exp
===================================================================
RCS file: /cvs/src/src/gas/testsuite/gas/mips/mips.exp,v
retrieving revision 1.32
diff -u -p -r1.32 mips.exp
--- gas/testsuite/gas/mips/mips.exp	4 Apr 2002 08:23:30 -0000	1.32
+++ gas/testsuite/gas/mips/mips.exp	21 May 2002 23:32:54 -0000
@@ -122,6 +122,7 @@ if { [istarget mips*-*-*] } then {
 	run_dump_test "mul"
     }
     run_dump_test "rol"
+    run_dump_test "rol64"
     if !$aout { run_dump_test "sb" }
     run_dump_test "trunc"
     if !$aout { run_dump_test "ulh" }
Index: include/opcode/ChangeLog
===================================================================
RCS file: /cvs/src/src/include/opcode/ChangeLog,v
retrieving revision 1.167
diff -u -p -r1.167 ChangeLog
--- include/opcode/ChangeLog	17 May 2002 19:01:03 -0000	1.167
+++ include/opcode/ChangeLog	21 May 2002 23:32:57 -0000
@@ -1,3 +1,7 @@
+2002-05-22  Thiemo Seufer <seufer@csv.ica.uni-stuttgart.de>
+
+	* mips.h: Add M_DROL, M_DROL_I, M_DROR, M_DROR_I macro cases.
+
 2002-05-17  Andrey Volkov  <avolkov@sources.redhat.com>

         * h8300.h: Corrected defs of all control regs
Index: include/opcode/mips.h
===================================================================
RCS file: /cvs/src/src/include/opcode/mips.h,v
retrieving revision 1.24
diff -u -p -r1.24 mips.h
--- include/opcode/mips.h	16 Mar 2002 03:09:18 -0000	1.24
+++ include/opcode/mips.h	21 May 2002 23:32:57 -0000
@@ -526,9 +526,13 @@ enum
   M_REM_3I,
   M_REMU_3,
   M_REMU_3I,
+  M_DROL,
   M_ROL,
+  M_DROL_I,
   M_ROL_I,
+  M_DROR,
   M_ROR,
+  M_DROR_I,
   M_ROR_I,
   M_S_DA,
   M_S_DOB,
Index: opcodes/ChangeLog
===================================================================
RCS file: /cvs/src/src/opcodes/ChangeLog,v
retrieving revision 1.447
diff -u -p -r1.447 ChangeLog
--- opcodes/ChangeLog	17 May 2002 14:36:45 -0000	1.447
+++ opcodes/ChangeLog	21 May 2002 23:33:00 -0000
@@ -1,3 +1,7 @@
+2002-05-22  Thiemo Seufer <seufer@csv.ica.uni-stuttgart.de>
+
+	* mips-opc.c (mips_builtin_opcodes): Add drol, dror macros.
+
 Fri May 17 14:26:44 2002  J"orn Rennecke <joern.rennecke@superh.com>

 	* disassemble.c (disassembler): Just use print_insn_sh for bfd_arch_sh.
Index: opcodes/mips-opc.c
===================================================================
RCS file: /cvs/src/src/opcodes/mips-opc.c,v
retrieving revision 1.32
diff -u -p -r1.32 mips-opc.c
--- opcodes/mips-opc.c	17 Mar 2002 02:42:25 -0000	1.32
+++ opcodes/mips-opc.c	21 May 2002 23:33:00 -0000
@@ -492,6 +492,10 @@ const struct mips_opcode mips_builtin_op
 {"dremu",   "z,s,t",    0x0000001f, 0xfc00ffff, RD_s|RD_t|WR_HILO,      I3      },
 {"dremu",   "d,v,t",	3,    (int) M_DREMU_3,	INSN_MACRO,		I3	},
 {"dremu",   "d,v,I",	3,    (int) M_DREMU_3I,	INSN_MACRO,		I3	},
+{"drol",    "d,v,t",	0,    (int) M_DROL,	INSN_MACRO,		I3	},
+{"drol",    "d,v,I",	0,    (int) M_DROL_I,	INSN_MACRO,		I3	},
+{"dror",    "d,v,t",	0,    (int) M_DROR,	INSN_MACRO,		I3	},
+{"dror",    "d,v,I",	0,    (int) M_DROR_I,	INSN_MACRO,		I3	},
 {"dsllv",   "d,t,s",	0x00000014, 0xfc0007ff,	WR_d|RD_t|RD_s,		I3	},
 {"dsll32",  "d,w,<",	0x0000003c, 0xffe0003f, WR_d|RD_t,		I3	},
 {"dsll",    "d,w,s",	0x00000014, 0xfc0007ff,	WR_d|RD_t|RD_s,		I3	}, /* dsllv */
This commit is contained in:
Thiemo Seufer 2002-05-21 23:54:48 +00:00
parent 257ce47071
commit 771c7ce4bc
10 changed files with 213 additions and 16 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

5
gas/ChangeLog
View File

@ -1,3 +1,8 @@
2002-05-22 Thiemo Seufer <seufer@csv.ica.uni-stuttgart.de>
* config/tc-mips.c (macro2): Add 64 bit drol, dror macros.
Optimize the rotate by zero case.
2002-05-21 Nick Clifton <nickc@cambridge.redhat.com>
* configure.in: Remove accidental enabling of bfd_gas=yes for

112
gas/config/tc-mips.c
View File

@ -6686,6 +6686,17 @@ macro2 (ip)
--mips_opts.noreorder;
break;
case M_DROL:
macro_build ((char *) NULL, &icnt, (expressionS *) NULL, "dsubu",
"d,v,t", AT, 0, treg);
macro_build ((char *) NULL, &icnt, (expressionS *) NULL, "dsrlv",
"d,t,s", AT, sreg, AT);
macro_build ((char *) NULL, &icnt, (expressionS *) NULL, "dsllv",
"d,t,s", dreg, sreg, treg);
macro_build ((char *) NULL, &icnt, (expressionS *) NULL, "or",
"d,v,t", dreg, dreg, AT);
break;
case M_ROL:
macro_build ((char *) NULL, &icnt, (expressionS *) NULL, "subu",
"d,v,t", AT, 0, treg);
@ -6697,15 +6708,55 @@ macro2 (ip)
"d,v,t", dreg, dreg, AT);
break;
case M_DROL_I:
{
unsigned int rot;
char *l, *r;
if (imm_expr.X_op != O_constant)
as_bad (_("rotate count too large"));
rot = imm_expr.X_add_number & 0x3f;
if (! rot)
break;
l = (rot < 0x20) ? "dsll" : "dsll32";
r = ((0x40 - rot) < 0x20) ? "dsrl" : "dsrl32";
rot &= 0x1f;
macro_build ((char *) NULL, &icnt, (expressionS *) NULL, l,
"d,w,<", AT, sreg, rot);
macro_build ((char *) NULL, &icnt, (expressionS *) NULL, r,
"d,w,<", dreg, sreg, (0x20 - rot) & 0x1f);
macro_build ((char *) NULL, &icnt, (expressionS *) NULL, "or",
"d,v,t", dreg, dreg, AT);
}
break;
case M_ROL_I:
if (imm_expr.X_op != O_constant)
as_bad (_("rotate count too large"));
macro_build ((char *) NULL, &icnt, (expressionS *) NULL, "sll", "d,w,<",
AT, sreg, (int) (imm_expr.X_add_number & 0x1f));
macro_build ((char *) NULL, &icnt, (expressionS *) NULL, "srl", "d,w,<",
dreg, sreg, (int) ((0 - imm_expr.X_add_number) & 0x1f));
macro_build ((char *) NULL, &icnt, (expressionS *) NULL, "or", "d,v,t",
dreg, dreg, AT);
{
unsigned int rot;
if (imm_expr.X_op != O_constant)
as_bad (_("rotate count too large"));
rot = imm_expr.X_add_number & 0x1f;
if (! rot)
break;
macro_build ((char *) NULL, &icnt, (expressionS *) NULL, "sll",
"d,w,<", AT, sreg, rot);
macro_build ((char *) NULL, &icnt, (expressionS *) NULL, "srl",
"d,w,<", dreg, sreg, (0x20 - rot) & 0x1f);
macro_build ((char *) NULL, &icnt, (expressionS *) NULL, "or",
"d,v,t", dreg, dreg, AT);
}
break;
case M_DROR:
macro_build ((char *) NULL, &icnt, (expressionS *) NULL, "dsubu",
"d,v,t", AT, 0, treg);
macro_build ((char *) NULL, &icnt, (expressionS *) NULL, "dsllv",
"d,t,s", AT, sreg, AT);
macro_build ((char *) NULL, &icnt, (expressionS *) NULL, "dsrlv",
"d,t,s", dreg, sreg, treg);
macro_build ((char *) NULL, &icnt, (expressionS *) NULL, "or",
"d,v,t", dreg, dreg, AT);
break;
case M_ROR:
@ -6719,15 +6770,44 @@ macro2 (ip)
"d,v,t", dreg, dreg, AT);
break;
case M_DROR_I:
{
unsigned int rot;
char *l, *r;
if (imm_expr.X_op != O_constant)
as_bad (_("rotate count too large"));
rot = imm_expr.X_add_number & 0x3f;
if (! rot)
break;
r = (rot < 0x20) ? "dsrl" : "dsrl32";
l = ((0x40 - rot) < 0x20) ? "dsll" : "dsll32";
rot &= 0x1f;
macro_build ((char *) NULL, &icnt, (expressionS *) NULL, r,
"d,w,<", AT, sreg, rot);
macro_build ((char *) NULL, &icnt, (expressionS *) NULL, l,
"d,w,<", dreg, sreg, (0x20 - rot) & 0x1f);
macro_build ((char *) NULL, &icnt, (expressionS *) NULL, "or",
"d,v,t", dreg, dreg, AT);
}
break;
case M_ROR_I:
if (imm_expr.X_op != O_constant)
as_bad (_("rotate count too large"));
macro_build ((char *) NULL, &icnt, (expressionS *) NULL, "srl", "d,w,<",
AT, sreg, (int) (imm_expr.X_add_number & 0x1f));
macro_build ((char *) NULL, &icnt, (expressionS *) NULL, "sll", "d,w,<",
dreg, sreg, (int) ((0 - imm_expr.X_add_number) & 0x1f));
macro_build ((char *) NULL, &icnt, (expressionS *) NULL, "or", "d,v,t",
dreg, dreg, AT);
{
unsigned int rot;
if (imm_expr.X_op != O_constant)
as_bad (_("rotate count too large"));
rot = imm_expr.X_add_number & 0x1f;
if (! rot)
break;
macro_build ((char *) NULL, &icnt, (expressionS *) NULL, "srl",
"d,w,<", AT, sreg, rot);
macro_build ((char *) NULL, &icnt, (expressionS *) NULL, "sll",
"d,w,<", dreg, sreg, (0x20 - rot) & 0x1f);
macro_build ((char *) NULL, &icnt, (expressionS *) NULL, "or",
"d,v,t", dreg, dreg, AT);
}
break;
case M_S_DOB:

6
gas/testsuite/ChangeLog
View File

@ -1,3 +1,9 @@
2002-05-22 Thiemo Seufer <seufer@csv.ica.uni-stuttgart.de>
* gas/mips/rol64.s: New file, test of drol, dror macros.
* gas/mips/rol64.d: Likewise.
* gas/mips/mips.exp: Add new test.
2002-05-20 Nick Clifton <nickc@cambridge.redhat.com>
* gas/arm/arm.exp: Replace deprecated command line switches

1
gas/testsuite/gas/mips/mips.exp
View File

@ -122,6 +122,7 @@ if { [istarget mips*-*-*] } then {
run_dump_test "mul"
}
run_dump_test "rol"
run_dump_test "rol64"
if !$aout { run_dump_test "sb" }
run_dump_test "trunc"
if !$aout { run_dump_test "ulh" }

62
gas/testsuite/gas/mips/rol64.d Normal file
View File

@ -0,0 +1,62 @@
#objdump: -dr --prefix-addresses -mmips:4000
#as: -march=r4000 -mtune=r4000
#name: MIPS R4000 drol
# Test the drol and dror macros.
.*: +file format .*mips.*
Disassembly of section .text:
0+0000 <[^>]*> dnegu at,a1
0+0004 <[^>]*> dsrlv at,a0,at
0+0008 <[^>]*> dsllv a0,a0,a1
0+000c <[^>]*> or a0,a0,at
0+0010 <[^>]*> dnegu at,a2
0+0014 <[^>]*> dsrlv at,a1,at
0+0018 <[^>]*> dsllv a0,a1,a2
0+001c <[^>]*> or a0,a0,at
0+0020 <[^>]*> dsll at,a0,0x1
0+0024 <[^>]*> dsrl32 a0,a0,0x1f
0+0028 <[^>]*> or a0,a0,at
0+002c <[^>]*> dsll at,a1,0x1
0+0030 <[^>]*> dsrl32 a0,a1,0x1f
0+0034 <[^>]*> or a0,a0,at
0+0038 <[^>]*> dsll at,a1,0x1f
0+003c <[^>]*> dsrl32 a0,a1,0x1
0+0040 <[^>]*> or a0,a0,at
0+0044 <[^>]*> dsll32 at,a1,0x0
0+0048 <[^>]*> dsrl32 a0,a1,0x0
0+004c <[^>]*> or a0,a0,at
0+0050 <[^>]*> dsll32 at,a1,0x1
0+0054 <[^>]*> dsrl a0,a1,0x1f
0+0058 <[^>]*> or a0,a0,at
0+005c <[^>]*> dsll32 at,a1,0x1f
0+0060 <[^>]*> dsrl a0,a1,0x1
0+0064 <[^>]*> or a0,a0,at
0+0068 <[^>]*> dnegu at,a1
0+006c <[^>]*> dsllv at,a0,at
0+0070 <[^>]*> dsrlv a0,a0,a1
0+0074 <[^>]*> or a0,a0,at
0+0078 <[^>]*> dnegu at,a2
0+007c <[^>]*> dsllv at,a1,at
0+0080 <[^>]*> dsrlv a0,a1,a2
0+0084 <[^>]*> or a0,a0,at
0+0088 <[^>]*> dsrl at,a0,0x1
0+008c <[^>]*> dsll32 a0,a0,0x1f
0+0090 <[^>]*> or a0,a0,at
0+0094 <[^>]*> dsrl at,a1,0x1
0+0098 <[^>]*> dsll32 a0,a1,0x1f
0+009c <[^>]*> or a0,a0,at
0+00a0 <[^>]*> dsrl at,a1,0x1f
0+00a4 <[^>]*> dsll32 a0,a1,0x1
0+00a8 <[^>]*> or a0,a0,at
0+00ac <[^>]*> dsrl32 at,a1,0x0
0+00b0 <[^>]*> dsll32 a0,a1,0x0
0+00b4 <[^>]*> or a0,a0,at
0+00b8 <[^>]*> dsrl32 at,a1,0x1
0+00bc <[^>]*> dsll a0,a1,0x1f
0+00c0 <[^>]*> or a0,a0,at
0+00c4 <[^>]*> dsrl32 at,a1,0x1f
0+00c8 <[^>]*> dsll a0,a1,0x1
0+00cc <[^>]*> or a0,a0,at
...

27
gas/testsuite/gas/mips/rol64.s Normal file
View File

@ -0,0 +1,27 @@
# Source file used to test the drol and dror macros.
foo:
drol $4,$5
drol $4,$5,$6
drol $4,1
drol $4,$5,0
drol $4,$5,1
drol $4,$5,31
drol $4,$5,32
drol $4,$5,33
drol $4,$5,63
drol $4,$5,64
dror $4,$5
dror $4,$5,$6
dror $4,1
dror $4,$5,0
dror $4,$5,1
dror $4,$5,31
dror $4,$5,32
dror $4,$5,33
dror $4,$5,63
dror $4,$5,64
# Force at least 8 (non-delay-slot) zero bytes, to make 'objdump' print ...
.space 8

4
include/opcode/ChangeLog
View File

@ -1,3 +1,7 @@
2002-05-22 Thiemo Seufer <seufer@csv.ica.uni-stuttgart.de>
* mips.h: Add M_DROL, M_DROL_I, M_DROR, M_DROR_I macro cases.
2002-05-17 Andrey Volkov <avolkov@sources.redhat.com>
* h8300.h: Corrected defs of all control regs

4
include/opcode/mips.h
View File

@ -526,9 +526,13 @@ enum
M_REM_3I,
M_REMU_3,
M_REMU_3I,
M_DROL,
M_ROL,
M_DROL_I,
M_ROL_I,
M_DROR,
M_ROR,
M_DROR_I,
M_ROR_I,
M_S_DA,
M_S_DOB,

4
opcodes/ChangeLog
View File

@ -1,3 +1,7 @@
2002-05-22 Thiemo Seufer <seufer@csv.ica.uni-stuttgart.de>
* mips-opc.c (mips_builtin_opcodes): Add drol, dror macros.
Fri May 17 14:26:44 2002 J"orn Rennecke <joern.rennecke@superh.com>
* disassemble.c (disassembler): Just use print_insn_sh for bfd_arch_sh.

4
opcodes/mips-opc.c
View File

@ -492,6 +492,10 @@ const struct mips_opcode mips_builtin_opcodes[] =
{"dremu", "z,s,t", 0x0000001f, 0xfc00ffff, RD_s|RD_t|WR_HILO, I3 },
{"dremu", "d,v,t", 3, (int) M_DREMU_3, INSN_MACRO, I3 },
{"dremu", "d,v,I", 3, (int) M_DREMU_3I, INSN_MACRO, I3 },
{"drol", "d,v,t", 0, (int) M_DROL, INSN_MACRO, I3 },
{"drol", "d,v,I", 0, (int) M_DROL_I, INSN_MACRO, I3 },
{"dror", "d,v,t", 0, (int) M_DROR, INSN_MACRO, I3 },
{"dror", "d,v,I", 0, (int) M_DROR_I, INSN_MACRO, I3 },
{"dsllv", "d,t,s", 0x00000014, 0xfc0007ff, WR_d|RD_t|RD_s, I3 },
{"dsll32", "d,w,<", 0x0000003c, 0xffe0003f, WR_d|RD_t, I3 },
{"dsll", "d,w,s", 0x00000014, 0xfc0007ff, WR_d|RD_t|RD_s, I3 }, /* dsllv */