* rs6000-tdep.c (store_param_on_stack_p): New function,
an improved version of some code extracted from skip_prologue(). (skip_prologue): Use store_param_on_stack_p() to detect instructions saving a parameter on the stack. Detect when r0 is used to save a parameter. Do not mark "li rx, SIMM" instructions as part of the prologue, unless the following instruction is also part of the prologue.
This commit is contained in:
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366ddcd57f
commit
773df3e50e
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@ -1,3 +1,13 @@
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2004-05-15 Joel Brobecker <brobecker@gnat.com>
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* rs6000-tdep.c (store_param_on_stack_p): New function,
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an improved version of some code extracted from skip_prologue().
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(skip_prologue): Use store_param_on_stack_p() to detect
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instructions saving a parameter on the stack. Detect when r0
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is used to save a parameter.
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Do not mark "li rx, SIMM" instructions as part of the prologue,
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unless the following instruction is also part of the prologue.
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2004-05-14 Andrew Cagney <cagney@redhat.com>
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* infrun.c (handle_inferior_event): Simplify
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@ -592,6 +592,76 @@ refine_prologue_limit (CORE_ADDR pc, CORE_ADDR lim_pc)
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return lim_pc;
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}
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/* Return nonzero if the given instruction OP can be part of the prologue
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of a function and saves a parameter on the stack. FRAMEP should be
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set if one of the previous instructions in the function has set the
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Frame Pointer. */
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static int
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store_param_on_stack_p (unsigned long op, int framep, int *r0_contains_arg)
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{
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/* Move parameters from argument registers to temporary register. */
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if ((op & 0xfc0007fe) == 0x7c000378) /* mr(.) Rx,Ry */
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{
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/* Rx must be scratch register r0. */
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const int rx_regno = (op >> 16) & 31;
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/* Ry: Only r3 - r10 are used for parameter passing. */
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const int ry_regno = GET_SRC_REG (op);
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if (rx_regno == 0 && ry_regno >= 3 && ry_regno <= 10)
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{
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*r0_contains_arg = 1;
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return 1;
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}
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else
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return 0;
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}
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/* Save a General Purpose Register on stack. */
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if ((op & 0xfc1f0003) == 0xf8010000 || /* std Rx,NUM(r1) */
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(op & 0xfc1f0000) == 0xd8010000) /* stfd Rx,NUM(r1) */
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{
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/* Rx: Only r3 - r10 are used for parameter passing. */
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const int rx_regno = GET_SRC_REG (op);
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return (rx_regno >= 3 && rx_regno <= 10);
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}
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/* Save a General Purpose Register on stack via the Frame Pointer. */
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if (framep &&
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((op & 0xfc1f0000) == 0x901f0000 || /* st rx,NUM(r31) */
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(op & 0xfc1f0000) == 0x981f0000 || /* stb Rx,NUM(r31) */
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(op & 0xfc1f0000) == 0xd81f0000)) /* stfd Rx,NUM(r31) */
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{
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/* Rx: Usually, only r3 - r10 are used for parameter passing.
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However, the compiler sometimes uses r0 to hold an argument. */
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const int rx_regno = GET_SRC_REG (op);
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return ((rx_regno >= 3 && rx_regno <= 10)
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|| (rx_regno == 0 && *r0_contains_arg));
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}
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if ((op & 0xfc1f0000) == 0xfc010000) /* frsp, fp?,NUM(r1) */
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{
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/* Only f2 - f8 are used for parameter passing. */
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const int src_regno = GET_SRC_REG (op);
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return (src_regno >= 2 && src_regno <= 8);
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}
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if (framep && ((op & 0xfc1f0000) == 0xfc1f0000)) /* frsp, fp?,NUM(r31) */
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{
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/* Only f2 - f8 are used for parameter passing. */
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const int src_regno = GET_SRC_REG (op);
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return (src_regno >= 2 && src_regno <= 8);
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}
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/* Not an insn that saves a parameter on stack. */
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return 0;
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}
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static CORE_ADDR
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skip_prologue (CORE_ADDR pc, CORE_ADDR lim_pc, struct rs6000_framedata *fdata)
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@ -614,6 +684,7 @@ skip_prologue (CORE_ADDR pc, CORE_ADDR lim_pc, struct rs6000_framedata *fdata)
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int minimal_toc_loaded = 0;
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int prev_insn_was_prologue_insn = 1;
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int num_skip_non_prologue_insns = 0;
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int r0_contains_arg = 0;
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const struct bfd_arch_info *arch_info = gdbarch_bfd_arch_info (current_gdbarch);
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struct gdbarch_tdep *tdep = gdbarch_tdep (current_gdbarch);
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@ -682,11 +753,15 @@ skip_prologue (CORE_ADDR pc, CORE_ADDR lim_pc, struct rs6000_framedata *fdata)
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ones. */
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if (lr_reg < 0)
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lr_reg = (op & 0x03e00000);
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if (lr_reg == 0)
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r0_contains_arg = 0;
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continue;
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}
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else if ((op & 0xfc1fffff) == 0x7c000026)
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{ /* mfcr Rx */
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cr_reg = (op & 0x03e00000);
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if (cr_reg == 0)
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r0_contains_arg = 0;
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continue;
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}
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@ -733,6 +808,7 @@ skip_prologue (CORE_ADDR pc, CORE_ADDR lim_pc, struct rs6000_framedata *fdata)
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for >= 32k frames */
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fdata->offset = (op & 0x0000ffff) << 16;
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fdata->frameless = 0;
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r0_contains_arg = 0;
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continue;
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}
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@ -741,6 +817,7 @@ skip_prologue (CORE_ADDR pc, CORE_ADDR lim_pc, struct rs6000_framedata *fdata)
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lf of >= 32k frames */
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fdata->offset |= (op & 0x0000ffff);
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fdata->frameless = 0;
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r0_contains_arg = 0;
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continue;
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}
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@ -874,26 +951,7 @@ skip_prologue (CORE_ADDR pc, CORE_ADDR lim_pc, struct rs6000_framedata *fdata)
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/* store parameters in stack */
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}
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/* Move parameters from argument registers to temporary register. */
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else if ((op & 0xfc0007fe) == 0x7c000378 && /* mr(.) Rx,Ry */
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(((op >> 21) & 31) >= 3) && /* R3 >= Ry >= R10 */
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(((op >> 21) & 31) <= 10) &&
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(((op >> 16) & 31) == 0)) /* Rx: scratch register r0 */
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{
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continue;
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}
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else if ((op & 0xfc1f0003) == 0xf8010000 || /* std rx,NUM(r1) */
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(op & 0xfc1f0000) == 0xd8010000 || /* stfd Rx,NUM(r1) */
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(op & 0xfc1f0000) == 0xfc010000) /* frsp, fp?,NUM(r1) */
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{
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continue;
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/* store parameters in stack via frame pointer */
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}
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else if (framep &&
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((op & 0xfc1f0000) == 0x901f0000 || /* st rx,NUM(r31) */
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(op & 0xfc1f0000) == 0x981f0000 || /* stb Rx,NUM(r31) */
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(op & 0xfc1f0000) == 0xd81f0000 || /* stfd Rx,NUM(r31) */
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(op & 0xfc1f0000) == 0xfc1f0000)) /* frsp, fp?,NUM(r31) */
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else if (store_param_on_stack_p (op, framep, &r0_contains_arg))
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{
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continue;
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@ -962,8 +1020,15 @@ skip_prologue (CORE_ADDR pc, CORE_ADDR lim_pc, struct rs6000_framedata *fdata)
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else if ((op & 0xffff0000) == 0x38000000 /* li r0, SIMM */
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|| (op & 0xffff0000) == 0x39c00000) /* li r14, SIMM */
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{
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if ((op & 0xffff0000) == 0x38000000)
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r0_contains_arg = 0;
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li_found_pc = pc;
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vr_saved_offset = SIGNED_SHORT (op);
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/* This insn by itself is not part of the prologue, unless
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if part of the pair of insns mentioned above. So do not
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record this insn as part of the prologue yet. */
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prev_insn_was_prologue_insn = 0;
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}
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/* Store vector register S at (r31+r0) aligned to 16 bytes. */
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/* 011111 sssss 11111 00000 00111001110 */
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