* mips-opc.c (mips_builtin_opcodes): Add dmfc2 and dmtc2.
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@ -1,5 +1,7 @@
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Sun Dec 6 14:06:48 1998 Ian Lance Taylor <ian@cygnus.com>
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* mips-opc.c (mips_builtin_opcodes): Add dmfc2 and dmtc2.
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* ppc-opc.c (powerpc_opcodes): Add PowerPC403 GC[X] instructions.
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From Saitoh Masanobu <msaitoh@spa.is.uec.ac.jp>.
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@ -529,6 +529,8 @@ const struct mips_opcode mips_builtin_opcodes[] = {
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{"dmtc0", "t,G", 0x40a00000, 0xffe007ff, COD|RD_t|WR_C0|WR_CC, I3 },
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{"dmfc1", "t,S", 0x44200000, 0xffe007ff, LCD|WR_t|RD_S|FP_S, I3 },
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{"dmtc1", "t,S", 0x44a00000, 0xffe007ff, COD|RD_t|WR_S|FP_S, I3 },
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{"dmfc2", "t,S", 0x48200000, 0xffe007ff, LCD|WR_t|RD_S|FP_S, I3 },
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{"dmtc2", "t,S", 0x48a00000, 0xffe007ff, COD|RD_t|WR_S|FP_S, I3 },
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{"dmul", "d,v,t", 0, (int) M_DMUL, INSN_MACRO, I3 },
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{"dmul", "d,v,I", 0, (int) M_DMUL_I, INSN_MACRO, I3 },
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{"dmulo", "d,v,t", 0, (int) M_DMULO, INSN_MACRO, I3 },
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@ -1175,8 +1177,8 @@ const struct mips_opcode mips_builtin_opcodes[] = {
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{"invalidate", "t,A(b)",0, (int) M_SWR_AB, INSN_MACRO, I2 }, /* as swr */
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{"swxc1", "S,t(b)", 0x4c000008, 0xfc0007ff, SM|RD_S|RD_t|RD_b, I4 },
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{"sync", "", 0x0000000f, 0xffffffff, 0, I2|T3 },
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{"sync.p", "", 0x0000000f, 0xffffffff, 0, I2 },
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{"sync.l", "", 0x0000040f, 0xffffffff, 0, I2 },
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{"sync.p", "", 0x0000040f, 0xffffffff, 0, I2 },
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{"sync.l", "", 0x0000000f, 0xffffffff, 0, I2 },
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{"syscall", "", 0x0000000c, 0xffffffff, TRAP, I1 },
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{"syscall", "B", 0x0000000c, 0xfc00003f, TRAP, I1 },
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{"teqi", "s,j", 0x040c0000, 0xfc1f0000, RD_s|TRAP, I2 },
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