x86: Correct EVEX to 128-bit EVEX optimization
Since not all AVX512F processors support AVX512VL, we can optimize 512-bit EVEX to 128-bit EVEX encoding for upper 16 vector registers only when AVX512VL is enabled explicitly at command-line or via ".arch .avx512vl" directive. PR gas/24352 * config/tc-i386.c (optimize_encoding): Check only cpu_arch_flags.bitfield.cpuavx512vl. * testsuite/gas/i386/i386.exp: Run x86-64-optimize-2b. * testsuite/gas/i386/x86-64-optimize-2.d: Revert the last change. * testsuite/gas/i386/x86-64-optimize-2b.d: New file. * testsuite/gas/i386/x86-64-optimize-2b.s: Likewise.
This commit is contained in:
parent
89199bb5a0
commit
7b1d7ca194
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@ -1,3 +1,14 @@
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2019-03-19 H.J. Lu <hongjiu.lu@intel.com>
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PR gas/24352
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* config/tc-i386.c (optimize_encoding): Check only
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cpu_arch_flags.bitfield.cpuavx512vl.
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* testsuite/gas/i386/i386.exp: Run x86-64-optimize-2b.
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* testsuite/gas/i386/x86-64-optimize-2.d: Revert the last
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change.
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* testsuite/gas/i386/x86-64-optimize-2b.d: New file.
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* testsuite/gas/i386/x86-64-optimize-2b.s: Likewise.
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2019-03-19 H.J. Lu <hongjiu.lu@intel.com>
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PR gas/24359
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@ -3985,9 +3985,6 @@ optimize_encoding (void)
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&& !i.rounding
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&& is_evex_encoding (&i.tm)
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&& (i.vec_encoding != vex_encoding_evex
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|| cpu_arch_flags.bitfield.cpuavx
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|| cpu_arch_isa_flags.bitfield.cpuavx
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|| cpu_arch_flags.bitfield.cpuavx512vl
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|| cpu_arch_isa_flags.bitfield.cpuavx512vl
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|| i.tm.cpu_flags.bitfield.cpuavx512vl
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|| (i.tm.operand_types[2].bitfield.zmmword
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@ -4045,17 +4042,13 @@ optimize_encoding (void)
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*/
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if (is_evex_encoding (&i.tm))
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{
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if (i.vec_encoding != vex_encoding_evex
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&& (cpu_arch_flags.bitfield.cpuavx
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|| cpu_arch_isa_flags.bitfield.cpuavx))
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if (i.vec_encoding != vex_encoding_evex)
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{
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i.tm.opcode_modifier.vex = VEX128;
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i.tm.opcode_modifier.vexw = VEXW0;
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i.tm.opcode_modifier.evex = 0;
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}
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else if (optimize > 1
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&& (cpu_arch_flags.bitfield.cpuavx512vl
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|| cpu_arch_isa_flags.bitfield.cpuavx512vl))
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else if (optimize > 1)
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i.tm.opcode_modifier.evex = EVEX128;
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else
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return;
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@ -983,6 +983,7 @@ if [expr ([istarget "i*86-*-*"] || [istarget "x86_64-*-*"]) && [gas_64_check]] t
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run_dump_test "x86-64-optimize-1"
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run_dump_test "x86-64-optimize-2"
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run_dump_test "x86-64-optimize-2a"
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run_dump_test "x86-64-optimize-2b"
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run_dump_test "x86-64-optimize-3"
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run_dump_test "x86-64-optimize-4"
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run_dump_test "x86-64-optimize-5"
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@ -12,99 +12,99 @@ Disassembly of section .text:
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+[a-f0-9]+: c5 71 55 f9 vandnpd %xmm1,%xmm1,%xmm15
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+[a-f0-9]+: c5 71 55 f9 vandnpd %xmm1,%xmm1,%xmm15
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+[a-f0-9]+: c5 71 55 f9 vandnpd %xmm1,%xmm1,%xmm15
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+[a-f0-9]+: 62 e1 f5 48 55 c1 vandnpd %zmm1,%zmm1,%zmm16
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+[a-f0-9]+: 62 e1 f5 08 55 c1 vandnpd %xmm1,%xmm1,%xmm16
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+[a-f0-9]+: 62 e1 f5 08 55 c1 vandnpd %xmm1,%xmm1,%xmm16
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+[a-f0-9]+: 62 b1 f5 00 55 c9 vandnpd %xmm17,%xmm17,%xmm1
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+[a-f0-9]+: 62 b1 f5 40 55 c9 vandnpd %zmm17,%zmm17,%zmm1
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+[a-f0-9]+: 62 b1 f5 00 55 c9 vandnpd %xmm17,%xmm17,%xmm1
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+[a-f0-9]+: 62 71 74 4f 55 f9 vandnps %zmm1,%zmm1,%zmm15\{%k7\}
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+[a-f0-9]+: c5 70 55 f9 vandnps %xmm1,%xmm1,%xmm15
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+[a-f0-9]+: c5 70 55 f9 vandnps %xmm1,%xmm1,%xmm15
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+[a-f0-9]+: c5 70 55 f9 vandnps %xmm1,%xmm1,%xmm15
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+[a-f0-9]+: 62 e1 74 48 55 c1 vandnps %zmm1,%zmm1,%zmm16
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+[a-f0-9]+: 62 e1 74 08 55 c1 vandnps %xmm1,%xmm1,%xmm16
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+[a-f0-9]+: 62 e1 74 08 55 c1 vandnps %xmm1,%xmm1,%xmm16
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+[a-f0-9]+: 62 b1 74 00 55 c9 vandnps %xmm17,%xmm17,%xmm1
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+[a-f0-9]+: 62 b1 74 40 55 c9 vandnps %zmm17,%zmm17,%zmm1
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+[a-f0-9]+: 62 b1 74 00 55 c9 vandnps %xmm17,%xmm17,%xmm1
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+[a-f0-9]+: c5 71 df f9 vpandn %xmm1,%xmm1,%xmm15
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+[a-f0-9]+: 62 71 75 4f df f9 vpandnd %zmm1,%zmm1,%zmm15\{%k7\}
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+[a-f0-9]+: c5 71 df f9 vpandn %xmm1,%xmm1,%xmm15
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+[a-f0-9]+: c5 71 df f9 vpandn %xmm1,%xmm1,%xmm15
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+[a-f0-9]+: c5 71 df f9 vpandn %xmm1,%xmm1,%xmm15
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+[a-f0-9]+: 62 e1 75 48 df c1 vpandnd %zmm1,%zmm1,%zmm16
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+[a-f0-9]+: 62 e1 75 08 df c1 vpandnd %xmm1,%xmm1,%xmm16
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+[a-f0-9]+: 62 e1 75 08 df c1 vpandnd %xmm1,%xmm1,%xmm16
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+[a-f0-9]+: 62 b1 75 00 df c9 vpandnd %xmm17,%xmm17,%xmm1
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+[a-f0-9]+: 62 b1 75 40 df c9 vpandnd %zmm17,%zmm17,%zmm1
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+[a-f0-9]+: 62 b1 75 00 df c9 vpandnd %xmm17,%xmm17,%xmm1
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+[a-f0-9]+: 62 71 f5 4f df f9 vpandnq %zmm1,%zmm1,%zmm15\{%k7\}
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+[a-f0-9]+: c5 71 df f9 vpandn %xmm1,%xmm1,%xmm15
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+[a-f0-9]+: c5 71 df f9 vpandn %xmm1,%xmm1,%xmm15
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+[a-f0-9]+: c5 71 df f9 vpandn %xmm1,%xmm1,%xmm15
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+[a-f0-9]+: 62 e1 f5 48 df c1 vpandnq %zmm1,%zmm1,%zmm16
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+[a-f0-9]+: 62 e1 f5 08 df c1 vpandnq %xmm1,%xmm1,%xmm16
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+[a-f0-9]+: 62 e1 f5 08 df c1 vpandnq %xmm1,%xmm1,%xmm16
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+[a-f0-9]+: 62 b1 f5 00 df c9 vpandnq %xmm17,%xmm17,%xmm1
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+[a-f0-9]+: 62 b1 f5 40 df c9 vpandnq %zmm17,%zmm17,%zmm1
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+[a-f0-9]+: 62 b1 f5 00 df c9 vpandnq %xmm17,%xmm17,%xmm1
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+[a-f0-9]+: 62 71 f5 4f 57 f9 vxorpd %zmm1,%zmm1,%zmm15\{%k7\}
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+[a-f0-9]+: c5 71 57 f9 vxorpd %xmm1,%xmm1,%xmm15
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+[a-f0-9]+: c5 71 57 f9 vxorpd %xmm1,%xmm1,%xmm15
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+[a-f0-9]+: c5 71 57 f9 vxorpd %xmm1,%xmm1,%xmm15
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+[a-f0-9]+: 62 e1 f5 48 57 c1 vxorpd %zmm1,%zmm1,%zmm16
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+[a-f0-9]+: 62 e1 f5 08 57 c1 vxorpd %xmm1,%xmm1,%xmm16
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+[a-f0-9]+: 62 e1 f5 08 57 c1 vxorpd %xmm1,%xmm1,%xmm16
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+[a-f0-9]+: 62 b1 f5 00 57 c9 vxorpd %xmm17,%xmm17,%xmm1
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+[a-f0-9]+: 62 b1 f5 40 57 c9 vxorpd %zmm17,%zmm17,%zmm1
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+[a-f0-9]+: 62 b1 f5 00 57 c9 vxorpd %xmm17,%xmm17,%xmm1
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+[a-f0-9]+: 62 71 74 4f 57 f9 vxorps %zmm1,%zmm1,%zmm15\{%k7\}
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+[a-f0-9]+: c5 70 57 f9 vxorps %xmm1,%xmm1,%xmm15
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+[a-f0-9]+: c5 70 57 f9 vxorps %xmm1,%xmm1,%xmm15
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+[a-f0-9]+: c5 70 57 f9 vxorps %xmm1,%xmm1,%xmm15
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+[a-f0-9]+: 62 e1 74 48 57 c1 vxorps %zmm1,%zmm1,%zmm16
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+[a-f0-9]+: 62 e1 74 08 57 c1 vxorps %xmm1,%xmm1,%xmm16
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+[a-f0-9]+: 62 e1 74 08 57 c1 vxorps %xmm1,%xmm1,%xmm16
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+[a-f0-9]+: 62 b1 74 00 57 c9 vxorps %xmm17,%xmm17,%xmm1
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+[a-f0-9]+: 62 b1 74 40 57 c9 vxorps %zmm17,%zmm17,%zmm1
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+[a-f0-9]+: 62 b1 74 00 57 c9 vxorps %xmm17,%xmm17,%xmm1
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+[a-f0-9]+: c5 71 ef f9 vpxor %xmm1,%xmm1,%xmm15
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+[a-f0-9]+: 62 71 75 4f ef f9 vpxord %zmm1,%zmm1,%zmm15\{%k7\}
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+[a-f0-9]+: c5 71 ef f9 vpxor %xmm1,%xmm1,%xmm15
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+[a-f0-9]+: c5 71 ef f9 vpxor %xmm1,%xmm1,%xmm15
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+[a-f0-9]+: c5 71 ef f9 vpxor %xmm1,%xmm1,%xmm15
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+[a-f0-9]+: 62 e1 75 48 ef c1 vpxord %zmm1,%zmm1,%zmm16
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+[a-f0-9]+: 62 e1 75 08 ef c1 vpxord %xmm1,%xmm1,%xmm16
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+[a-f0-9]+: 62 e1 75 08 ef c1 vpxord %xmm1,%xmm1,%xmm16
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+[a-f0-9]+: 62 b1 75 00 ef c9 vpxord %xmm17,%xmm17,%xmm1
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+[a-f0-9]+: 62 b1 75 40 ef c9 vpxord %zmm17,%zmm17,%zmm1
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+[a-f0-9]+: 62 b1 75 00 ef c9 vpxord %xmm17,%xmm17,%xmm1
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+[a-f0-9]+: 62 71 f5 4f ef f9 vpxorq %zmm1,%zmm1,%zmm15\{%k7\}
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+[a-f0-9]+: c5 71 ef f9 vpxor %xmm1,%xmm1,%xmm15
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+[a-f0-9]+: c5 71 ef f9 vpxor %xmm1,%xmm1,%xmm15
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+[a-f0-9]+: c5 71 ef f9 vpxor %xmm1,%xmm1,%xmm15
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+[a-f0-9]+: 62 e1 f5 48 ef c1 vpxorq %zmm1,%zmm1,%zmm16
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+[a-f0-9]+: 62 e1 f5 08 ef c1 vpxorq %xmm1,%xmm1,%xmm16
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+[a-f0-9]+: 62 e1 f5 08 ef c1 vpxorq %xmm1,%xmm1,%xmm16
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+[a-f0-9]+: 62 b1 f5 00 ef c9 vpxorq %xmm17,%xmm17,%xmm1
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+[a-f0-9]+: 62 b1 f5 40 ef c9 vpxorq %zmm17,%zmm17,%zmm1
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+[a-f0-9]+: 62 b1 f5 00 ef c9 vpxorq %xmm17,%xmm17,%xmm1
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+[a-f0-9]+: 62 71 75 4f f8 f9 vpsubb %zmm1,%zmm1,%zmm15\{%k7\}
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+[a-f0-9]+: c5 71 f8 f9 vpsubb %xmm1,%xmm1,%xmm15
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+[a-f0-9]+: c5 71 f8 f9 vpsubb %xmm1,%xmm1,%xmm15
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+[a-f0-9]+: c5 71 f8 f9 vpsubb %xmm1,%xmm1,%xmm15
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+[a-f0-9]+: 62 e1 75 48 f8 c1 vpsubb %zmm1,%zmm1,%zmm16
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+[a-f0-9]+: 62 e1 75 08 f8 c1 vpsubb %xmm1,%xmm1,%xmm16
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+[a-f0-9]+: 62 e1 75 08 f8 c1 vpsubb %xmm1,%xmm1,%xmm16
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+[a-f0-9]+: 62 b1 75 00 f8 c9 vpsubb %xmm17,%xmm17,%xmm1
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+[a-f0-9]+: 62 b1 75 40 f8 c9 vpsubb %zmm17,%zmm17,%zmm1
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+[a-f0-9]+: 62 b1 75 00 f8 c9 vpsubb %xmm17,%xmm17,%xmm1
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+[a-f0-9]+: 62 71 75 4f f9 f9 vpsubw %zmm1,%zmm1,%zmm15\{%k7\}
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+[a-f0-9]+: c5 71 f9 f9 vpsubw %xmm1,%xmm1,%xmm15
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+[a-f0-9]+: c5 71 f9 f9 vpsubw %xmm1,%xmm1,%xmm15
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+[a-f0-9]+: c5 71 f9 f9 vpsubw %xmm1,%xmm1,%xmm15
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+[a-f0-9]+: 62 e1 75 48 f9 c1 vpsubw %zmm1,%zmm1,%zmm16
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+[a-f0-9]+: 62 e1 75 08 f9 c1 vpsubw %xmm1,%xmm1,%xmm16
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+[a-f0-9]+: 62 e1 75 08 f9 c1 vpsubw %xmm1,%xmm1,%xmm16
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+[a-f0-9]+: 62 b1 75 00 f9 c9 vpsubw %xmm17,%xmm17,%xmm1
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+[a-f0-9]+: 62 b1 75 40 f9 c9 vpsubw %zmm17,%zmm17,%zmm1
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+[a-f0-9]+: 62 b1 75 00 f9 c9 vpsubw %xmm17,%xmm17,%xmm1
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+[a-f0-9]+: 62 71 75 4f fa f9 vpsubd %zmm1,%zmm1,%zmm15\{%k7\}
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+[a-f0-9]+: c5 71 fa f9 vpsubd %xmm1,%xmm1,%xmm15
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+[a-f0-9]+: c5 71 fa f9 vpsubd %xmm1,%xmm1,%xmm15
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+[a-f0-9]+: c5 71 fa f9 vpsubd %xmm1,%xmm1,%xmm15
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+[a-f0-9]+: 62 e1 75 48 fa c1 vpsubd %zmm1,%zmm1,%zmm16
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+[a-f0-9]+: 62 e1 75 08 fa c1 vpsubd %xmm1,%xmm1,%xmm16
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+[a-f0-9]+: 62 e1 75 08 fa c1 vpsubd %xmm1,%xmm1,%xmm16
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+[a-f0-9]+: 62 b1 75 00 fa c9 vpsubd %xmm17,%xmm17,%xmm1
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+[a-f0-9]+: 62 b1 75 40 fa c9 vpsubd %zmm17,%zmm17,%zmm1
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+[a-f0-9]+: 62 b1 75 00 fa c9 vpsubd %xmm17,%xmm17,%xmm1
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+[a-f0-9]+: 62 71 f5 4f fb f9 vpsubq %zmm1,%zmm1,%zmm15\{%k7\}
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+[a-f0-9]+: c5 71 fb f9 vpsubq %xmm1,%xmm1,%xmm15
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+[a-f0-9]+: c5 71 fb f9 vpsubq %xmm1,%xmm1,%xmm15
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+[a-f0-9]+: c5 71 fb f9 vpsubq %xmm1,%xmm1,%xmm15
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+[a-f0-9]+: 62 e1 f5 48 fb c1 vpsubq %zmm1,%zmm1,%zmm16
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+[a-f0-9]+: 62 e1 f5 08 fb c1 vpsubq %xmm1,%xmm1,%xmm16
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+[a-f0-9]+: 62 e1 f5 08 fb c1 vpsubq %xmm1,%xmm1,%xmm16
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+[a-f0-9]+: 62 b1 f5 00 fb c9 vpsubq %xmm17,%xmm17,%xmm1
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+[a-f0-9]+: 62 b1 f5 40 fb c9 vpsubq %zmm17,%zmm17,%zmm1
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+[a-f0-9]+: 62 b1 f5 00 fb c9 vpsubq %xmm17,%xmm17,%xmm1
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+[a-f0-9]+: c5 f9 6f d1 vmovdqa %xmm1,%xmm2
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+[a-f0-9]+: c5 f9 6f d1 vmovdqa %xmm1,%xmm2
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@ -0,0 +1,157 @@
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#as: -O2 -I${srcdir}/$subdir
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#objdump: -drw
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#name: x86-64 optimized encoding 2b with -O2
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.*: +file format .*
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Disassembly of section .text:
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0+ <_start>:
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+[a-f0-9]+: 62 71 f5 4f 55 f9 vandnpd %zmm1,%zmm1,%zmm15\{%k7\}
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+[a-f0-9]+: c5 71 55 f9 vandnpd %xmm1,%xmm1,%xmm15
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+[a-f0-9]+: c5 71 55 f9 vandnpd %xmm1,%xmm1,%xmm15
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+[a-f0-9]+: c5 71 55 f9 vandnpd %xmm1,%xmm1,%xmm15
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+[a-f0-9]+: 62 e1 f5 08 55 c1 vandnpd %xmm1,%xmm1,%xmm16
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+[a-f0-9]+: 62 e1 f5 08 55 c1 vandnpd %xmm1,%xmm1,%xmm16
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+[a-f0-9]+: 62 b1 f5 00 55 c9 vandnpd %xmm17,%xmm17,%xmm1
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+[a-f0-9]+: 62 b1 f5 00 55 c9 vandnpd %xmm17,%xmm17,%xmm1
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+[a-f0-9]+: 62 71 74 4f 55 f9 vandnps %zmm1,%zmm1,%zmm15\{%k7\}
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+[a-f0-9]+: c5 70 55 f9 vandnps %xmm1,%xmm1,%xmm15
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+[a-f0-9]+: c5 70 55 f9 vandnps %xmm1,%xmm1,%xmm15
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+[a-f0-9]+: c5 70 55 f9 vandnps %xmm1,%xmm1,%xmm15
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+[a-f0-9]+: 62 e1 74 08 55 c1 vandnps %xmm1,%xmm1,%xmm16
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+[a-f0-9]+: 62 e1 74 08 55 c1 vandnps %xmm1,%xmm1,%xmm16
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+[a-f0-9]+: 62 b1 74 00 55 c9 vandnps %xmm17,%xmm17,%xmm1
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+[a-f0-9]+: 62 b1 74 00 55 c9 vandnps %xmm17,%xmm17,%xmm1
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+[a-f0-9]+: c5 71 df f9 vpandn %xmm1,%xmm1,%xmm15
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+[a-f0-9]+: 62 71 75 4f df f9 vpandnd %zmm1,%zmm1,%zmm15\{%k7\}
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+[a-f0-9]+: c5 71 df f9 vpandn %xmm1,%xmm1,%xmm15
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+[a-f0-9]+: c5 71 df f9 vpandn %xmm1,%xmm1,%xmm15
|
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+[a-f0-9]+: c5 71 df f9 vpandn %xmm1,%xmm1,%xmm15
|
||||
+[a-f0-9]+: 62 e1 75 08 df c1 vpandnd %xmm1,%xmm1,%xmm16
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+[a-f0-9]+: 62 e1 75 08 df c1 vpandnd %xmm1,%xmm1,%xmm16
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+[a-f0-9]+: 62 b1 75 00 df c9 vpandnd %xmm17,%xmm17,%xmm1
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+[a-f0-9]+: 62 b1 75 00 df c9 vpandnd %xmm17,%xmm17,%xmm1
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+[a-f0-9]+: 62 71 f5 4f df f9 vpandnq %zmm1,%zmm1,%zmm15\{%k7\}
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+[a-f0-9]+: c5 71 df f9 vpandn %xmm1,%xmm1,%xmm15
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+[a-f0-9]+: c5 71 df f9 vpandn %xmm1,%xmm1,%xmm15
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+[a-f0-9]+: c5 71 df f9 vpandn %xmm1,%xmm1,%xmm15
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+[a-f0-9]+: 62 e1 f5 08 df c1 vpandnq %xmm1,%xmm1,%xmm16
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+[a-f0-9]+: 62 e1 f5 08 df c1 vpandnq %xmm1,%xmm1,%xmm16
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+[a-f0-9]+: 62 b1 f5 00 df c9 vpandnq %xmm17,%xmm17,%xmm1
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+[a-f0-9]+: 62 b1 f5 00 df c9 vpandnq %xmm17,%xmm17,%xmm1
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+[a-f0-9]+: 62 71 f5 4f 57 f9 vxorpd %zmm1,%zmm1,%zmm15\{%k7\}
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+[a-f0-9]+: c5 71 57 f9 vxorpd %xmm1,%xmm1,%xmm15
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+[a-f0-9]+: c5 71 57 f9 vxorpd %xmm1,%xmm1,%xmm15
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+[a-f0-9]+: c5 71 57 f9 vxorpd %xmm1,%xmm1,%xmm15
|
||||
+[a-f0-9]+: 62 e1 f5 08 57 c1 vxorpd %xmm1,%xmm1,%xmm16
|
||||
+[a-f0-9]+: 62 e1 f5 08 57 c1 vxorpd %xmm1,%xmm1,%xmm16
|
||||
+[a-f0-9]+: 62 b1 f5 00 57 c9 vxorpd %xmm17,%xmm17,%xmm1
|
||||
+[a-f0-9]+: 62 b1 f5 00 57 c9 vxorpd %xmm17,%xmm17,%xmm1
|
||||
+[a-f0-9]+: 62 71 74 4f 57 f9 vxorps %zmm1,%zmm1,%zmm15\{%k7\}
|
||||
+[a-f0-9]+: c5 70 57 f9 vxorps %xmm1,%xmm1,%xmm15
|
||||
+[a-f0-9]+: c5 70 57 f9 vxorps %xmm1,%xmm1,%xmm15
|
||||
+[a-f0-9]+: c5 70 57 f9 vxorps %xmm1,%xmm1,%xmm15
|
||||
+[a-f0-9]+: 62 e1 74 08 57 c1 vxorps %xmm1,%xmm1,%xmm16
|
||||
+[a-f0-9]+: 62 e1 74 08 57 c1 vxorps %xmm1,%xmm1,%xmm16
|
||||
+[a-f0-9]+: 62 b1 74 00 57 c9 vxorps %xmm17,%xmm17,%xmm1
|
||||
+[a-f0-9]+: 62 b1 74 00 57 c9 vxorps %xmm17,%xmm17,%xmm1
|
||||
+[a-f0-9]+: c5 71 ef f9 vpxor %xmm1,%xmm1,%xmm15
|
||||
+[a-f0-9]+: 62 71 75 4f ef f9 vpxord %zmm1,%zmm1,%zmm15\{%k7\}
|
||||
+[a-f0-9]+: c5 71 ef f9 vpxor %xmm1,%xmm1,%xmm15
|
||||
+[a-f0-9]+: c5 71 ef f9 vpxor %xmm1,%xmm1,%xmm15
|
||||
+[a-f0-9]+: c5 71 ef f9 vpxor %xmm1,%xmm1,%xmm15
|
||||
+[a-f0-9]+: 62 e1 75 08 ef c1 vpxord %xmm1,%xmm1,%xmm16
|
||||
+[a-f0-9]+: 62 e1 75 08 ef c1 vpxord %xmm1,%xmm1,%xmm16
|
||||
+[a-f0-9]+: 62 b1 75 00 ef c9 vpxord %xmm17,%xmm17,%xmm1
|
||||
+[a-f0-9]+: 62 b1 75 00 ef c9 vpxord %xmm17,%xmm17,%xmm1
|
||||
+[a-f0-9]+: 62 71 f5 4f ef f9 vpxorq %zmm1,%zmm1,%zmm15\{%k7\}
|
||||
+[a-f0-9]+: c5 71 ef f9 vpxor %xmm1,%xmm1,%xmm15
|
||||
+[a-f0-9]+: c5 71 ef f9 vpxor %xmm1,%xmm1,%xmm15
|
||||
+[a-f0-9]+: c5 71 ef f9 vpxor %xmm1,%xmm1,%xmm15
|
||||
+[a-f0-9]+: 62 e1 f5 08 ef c1 vpxorq %xmm1,%xmm1,%xmm16
|
||||
+[a-f0-9]+: 62 e1 f5 08 ef c1 vpxorq %xmm1,%xmm1,%xmm16
|
||||
+[a-f0-9]+: 62 b1 f5 00 ef c9 vpxorq %xmm17,%xmm17,%xmm1
|
||||
+[a-f0-9]+: 62 b1 f5 00 ef c9 vpxorq %xmm17,%xmm17,%xmm1
|
||||
+[a-f0-9]+: 62 71 75 4f f8 f9 vpsubb %zmm1,%zmm1,%zmm15\{%k7\}
|
||||
+[a-f0-9]+: c5 71 f8 f9 vpsubb %xmm1,%xmm1,%xmm15
|
||||
+[a-f0-9]+: c5 71 f8 f9 vpsubb %xmm1,%xmm1,%xmm15
|
||||
+[a-f0-9]+: c5 71 f8 f9 vpsubb %xmm1,%xmm1,%xmm15
|
||||
+[a-f0-9]+: 62 e1 75 08 f8 c1 vpsubb %xmm1,%xmm1,%xmm16
|
||||
+[a-f0-9]+: 62 e1 75 08 f8 c1 vpsubb %xmm1,%xmm1,%xmm16
|
||||
+[a-f0-9]+: 62 b1 75 00 f8 c9 vpsubb %xmm17,%xmm17,%xmm1
|
||||
+[a-f0-9]+: 62 b1 75 00 f8 c9 vpsubb %xmm17,%xmm17,%xmm1
|
||||
+[a-f0-9]+: 62 71 75 4f f9 f9 vpsubw %zmm1,%zmm1,%zmm15\{%k7\}
|
||||
+[a-f0-9]+: c5 71 f9 f9 vpsubw %xmm1,%xmm1,%xmm15
|
||||
+[a-f0-9]+: c5 71 f9 f9 vpsubw %xmm1,%xmm1,%xmm15
|
||||
+[a-f0-9]+: c5 71 f9 f9 vpsubw %xmm1,%xmm1,%xmm15
|
||||
+[a-f0-9]+: 62 e1 75 08 f9 c1 vpsubw %xmm1,%xmm1,%xmm16
|
||||
+[a-f0-9]+: 62 e1 75 08 f9 c1 vpsubw %xmm1,%xmm1,%xmm16
|
||||
+[a-f0-9]+: 62 b1 75 00 f9 c9 vpsubw %xmm17,%xmm17,%xmm1
|
||||
+[a-f0-9]+: 62 b1 75 00 f9 c9 vpsubw %xmm17,%xmm17,%xmm1
|
||||
+[a-f0-9]+: 62 71 75 4f fa f9 vpsubd %zmm1,%zmm1,%zmm15\{%k7\}
|
||||
+[a-f0-9]+: c5 71 fa f9 vpsubd %xmm1,%xmm1,%xmm15
|
||||
+[a-f0-9]+: c5 71 fa f9 vpsubd %xmm1,%xmm1,%xmm15
|
||||
+[a-f0-9]+: c5 71 fa f9 vpsubd %xmm1,%xmm1,%xmm15
|
||||
+[a-f0-9]+: 62 e1 75 08 fa c1 vpsubd %xmm1,%xmm1,%xmm16
|
||||
+[a-f0-9]+: 62 e1 75 08 fa c1 vpsubd %xmm1,%xmm1,%xmm16
|
||||
+[a-f0-9]+: 62 b1 75 00 fa c9 vpsubd %xmm17,%xmm17,%xmm1
|
||||
+[a-f0-9]+: 62 b1 75 00 fa c9 vpsubd %xmm17,%xmm17,%xmm1
|
||||
+[a-f0-9]+: 62 71 f5 4f fb f9 vpsubq %zmm1,%zmm1,%zmm15\{%k7\}
|
||||
+[a-f0-9]+: c5 71 fb f9 vpsubq %xmm1,%xmm1,%xmm15
|
||||
+[a-f0-9]+: c5 71 fb f9 vpsubq %xmm1,%xmm1,%xmm15
|
||||
+[a-f0-9]+: c5 71 fb f9 vpsubq %xmm1,%xmm1,%xmm15
|
||||
+[a-f0-9]+: 62 e1 f5 08 fb c1 vpsubq %xmm1,%xmm1,%xmm16
|
||||
+[a-f0-9]+: 62 e1 f5 08 fb c1 vpsubq %xmm1,%xmm1,%xmm16
|
||||
+[a-f0-9]+: 62 b1 f5 00 fb c9 vpsubq %xmm17,%xmm17,%xmm1
|
||||
+[a-f0-9]+: 62 b1 f5 00 fb c9 vpsubq %xmm17,%xmm17,%xmm1
|
||||
+[a-f0-9]+: c5 f9 6f d1 vmovdqa %xmm1,%xmm2
|
||||
+[a-f0-9]+: c5 f9 6f d1 vmovdqa %xmm1,%xmm2
|
||||
+[a-f0-9]+: c5 fa 6f d1 vmovdqu %xmm1,%xmm2
|
||||
+[a-f0-9]+: c5 fa 6f d1 vmovdqu %xmm1,%xmm2
|
||||
+[a-f0-9]+: c5 fa 6f d1 vmovdqu %xmm1,%xmm2
|
||||
+[a-f0-9]+: c5 fa 6f d1 vmovdqu %xmm1,%xmm2
|
||||
+[a-f0-9]+: c4 41 79 6f e3 vmovdqa %xmm11,%xmm12
|
||||
+[a-f0-9]+: c4 41 79 6f e3 vmovdqa %xmm11,%xmm12
|
||||
+[a-f0-9]+: c4 41 7a 6f e3 vmovdqu %xmm11,%xmm12
|
||||
+[a-f0-9]+: c4 41 7a 6f e3 vmovdqu %xmm11,%xmm12
|
||||
+[a-f0-9]+: c4 41 7a 6f e3 vmovdqu %xmm11,%xmm12
|
||||
+[a-f0-9]+: c4 41 7a 6f e3 vmovdqu %xmm11,%xmm12
|
||||
+[a-f0-9]+: c5 f9 6f 50 7f vmovdqa 0x7f\(%rax\),%xmm2
|
||||
+[a-f0-9]+: c5 f9 6f 50 7f vmovdqa 0x7f\(%rax\),%xmm2
|
||||
+[a-f0-9]+: c5 fa 6f 50 7f vmovdqu 0x7f\(%rax\),%xmm2
|
||||
+[a-f0-9]+: c5 fa 6f 50 7f vmovdqu 0x7f\(%rax\),%xmm2
|
||||
+[a-f0-9]+: c5 fa 6f 50 7f vmovdqu 0x7f\(%rax\),%xmm2
|
||||
+[a-f0-9]+: c5 fa 6f 50 7f vmovdqu 0x7f\(%rax\),%xmm2
|
||||
+[a-f0-9]+: c5 f9 7f 88 80 00 00 00 vmovdqa %xmm1,0x80\(%rax\)
|
||||
+[a-f0-9]+: c5 f9 7f 88 80 00 00 00 vmovdqa %xmm1,0x80\(%rax\)
|
||||
+[a-f0-9]+: c5 fa 7f 88 80 00 00 00 vmovdqu %xmm1,0x80\(%rax\)
|
||||
+[a-f0-9]+: c5 fa 7f 88 80 00 00 00 vmovdqu %xmm1,0x80\(%rax\)
|
||||
+[a-f0-9]+: c5 fa 7f 88 80 00 00 00 vmovdqu %xmm1,0x80\(%rax\)
|
||||
+[a-f0-9]+: c5 fa 7f 88 80 00 00 00 vmovdqu %xmm1,0x80\(%rax\)
|
||||
+[a-f0-9]+: c5 fd 6f d1 vmovdqa %ymm1,%ymm2
|
||||
+[a-f0-9]+: c5 fd 6f d1 vmovdqa %ymm1,%ymm2
|
||||
+[a-f0-9]+: c5 fe 6f d1 vmovdqu %ymm1,%ymm2
|
||||
+[a-f0-9]+: c5 fe 6f d1 vmovdqu %ymm1,%ymm2
|
||||
+[a-f0-9]+: c5 fe 6f d1 vmovdqu %ymm1,%ymm2
|
||||
+[a-f0-9]+: c5 fe 6f d1 vmovdqu %ymm1,%ymm2
|
||||
+[a-f0-9]+: c4 41 7d 6f e3 vmovdqa %ymm11,%ymm12
|
||||
+[a-f0-9]+: c4 41 7d 6f e3 vmovdqa %ymm11,%ymm12
|
||||
+[a-f0-9]+: c4 41 7e 6f e3 vmovdqu %ymm11,%ymm12
|
||||
+[a-f0-9]+: c4 41 7e 6f e3 vmovdqu %ymm11,%ymm12
|
||||
+[a-f0-9]+: c4 41 7e 6f e3 vmovdqu %ymm11,%ymm12
|
||||
+[a-f0-9]+: c4 41 7e 6f e3 vmovdqu %ymm11,%ymm12
|
||||
+[a-f0-9]+: c5 fd 6f 50 7f vmovdqa 0x7f\(%rax\),%ymm2
|
||||
+[a-f0-9]+: c5 fd 6f 50 7f vmovdqa 0x7f\(%rax\),%ymm2
|
||||
+[a-f0-9]+: c5 fe 6f 50 7f vmovdqu 0x7f\(%rax\),%ymm2
|
||||
+[a-f0-9]+: c5 fe 6f 50 7f vmovdqu 0x7f\(%rax\),%ymm2
|
||||
+[a-f0-9]+: c5 fe 6f 50 7f vmovdqu 0x7f\(%rax\),%ymm2
|
||||
+[a-f0-9]+: c5 fe 6f 50 7f vmovdqu 0x7f\(%rax\),%ymm2
|
||||
+[a-f0-9]+: c5 fd 7f 88 80 00 00 00 vmovdqa %ymm1,0x80\(%rax\)
|
||||
+[a-f0-9]+: c5 fd 7f 88 80 00 00 00 vmovdqa %ymm1,0x80\(%rax\)
|
||||
+[a-f0-9]+: c5 fe 7f 88 80 00 00 00 vmovdqu %ymm1,0x80\(%rax\)
|
||||
+[a-f0-9]+: c5 fe 7f 88 80 00 00 00 vmovdqu %ymm1,0x80\(%rax\)
|
||||
+[a-f0-9]+: c5 fe 7f 88 80 00 00 00 vmovdqu %ymm1,0x80\(%rax\)
|
||||
+[a-f0-9]+: c5 fe 7f 88 80 00 00 00 vmovdqu %ymm1,0x80\(%rax\)
|
||||
#pass
|
|
@ -0,0 +1,5 @@
|
|||
# Check 64bit instructions with optimized encoding
|
||||
|
||||
.arch .avx512vl
|
||||
|
||||
.include "x86-64-optimize-2.s"
|
Loading…
Reference in New Issue