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* gas/config/tc-avr.c: Change ISA for devices with USB support to

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AVR_ISA_XMEGAU

	* include/opcode/avr.h: Rename AVR_ISA_XCH to AVR_ISA_RMW. Remove
	from AVR_ISA_XMEGA and add new AVR_ISA_XMEGAU
This commit is contained in:
Denis Chertykov 2013-06-01 07:14:44 +00:00
parent a4818a052e
commit 7bab763496
4 changed files with 21 additions and 10 deletions
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5
ChangeLog
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@ -1,3 +1,8 @@
2013-06-01 George Thomas <george.thomas@atmel.com>
* include/opcode/avr.h: Rename AVR_ISA_XCH to AVR_ISA_RMW. Remove
from AVR_ISA_XMEGA and add new AVR_ISA_XMEGAU
2013-05-06 Sandra Loosemore <sandra@codesourcery.com>
* COPYING.NEWLIB: Add Altera Corporation copyright.

5
gas/ChangeLog
View File

@ -1,3 +1,8 @@
2013-06-01 George Thomas <george.thomas@atmel.com>
* gas/config/tc-avr.c: Change ISA for devices with USB support to
AVR_ISA_XMEGAU
2013-05-31 H.J. Lu <hongjiu.lu@intel.com>
* config/tc-i386.c (md_begin): Don't align text/data/bss sections

8
gas/config/tc-avr.c
View File

@ -268,18 +268,18 @@ static struct mcu_type_s mcu_types[] =
{"atxmega64a3", AVR_ISA_XMEGA, bfd_mach_avrxmega4},
{"atxmega64d3", AVR_ISA_XMEGA, bfd_mach_avrxmega4},
{"atxmega64a1", AVR_ISA_XMEGA, bfd_mach_avrxmega5},
{"atxmega64a1u",AVR_ISA_XMEGA, bfd_mach_avrxmega5},
{"atxmega64a1u",AVR_ISA_XMEGAU, bfd_mach_avrxmega5},
{"atxmega128a3", AVR_ISA_XMEGA, bfd_mach_avrxmega6},
{"atxmega128b1", AVR_ISA_XMEGA, bfd_mach_avrxmega6},
{"atxmega128b1", AVR_ISA_XMEGAU, bfd_mach_avrxmega6},
{"atxmega128d3", AVR_ISA_XMEGA, bfd_mach_avrxmega6},
{"atxmega192a3", AVR_ISA_XMEGA, bfd_mach_avrxmega6},
{"atxmega192d3", AVR_ISA_XMEGA, bfd_mach_avrxmega6},
{"atxmega256a3", AVR_ISA_XMEGA, bfd_mach_avrxmega6},
{"atxmega256a3b",AVR_ISA_XMEGA, bfd_mach_avrxmega6},
{"atxmega256a3bu",AVR_ISA_XMEGA,bfd_mach_avrxmega6},
{"atxmega256a3bu",AVR_ISA_XMEGAU, bfd_mach_avrxmega6},
{"atxmega256d3", AVR_ISA_XMEGA, bfd_mach_avrxmega6},
{"atxmega128a1", AVR_ISA_XMEGA, bfd_mach_avrxmega7},
{"atxmega128a1u", AVR_ISA_XMEGA, bfd_mach_avrxmega7},
{"atxmega128a1u", AVR_ISA_XMEGAU, bfd_mach_avrxmega7},
{NULL, 0, 0}
};

13
include/opcode/avr.h
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@ -33,7 +33,7 @@
#define AVR_ISA_MOVW 0x1000 /* device has MOVW */
#define AVR_ISA_SPMX 0x2000 /* device has SPM Z[+] */
#define AVR_ISA_DES 0x4000 /* device has DES */
#define AVR_ISA_XCH 0x8000 /* device has XCH, LAC, LAS, LAT */
#define AVR_ISA_RMW 0x8000 /* device has RMW instructions XCH,LAC,LAS,LAT */
#define AVR_ISA_TINY1 (AVR_ISA_1200 | AVR_ISA_LPM)
#define AVR_ISA_2xxx (AVR_ISA_TINY1 | AVR_ISA_SRAM)
@ -53,7 +53,8 @@
#define AVR_ISA_M323 (AVR_ISA_M161 | AVR_ISA_BRK)
#define AVR_ISA_M128 (AVR_ISA_M323 | AVR_ISA_ELPM | AVR_ISA_ELPMX)
#define AVR_ISA_M256 (AVR_ISA_M128 | AVR_ISA_EIND)
#define AVR_ISA_XMEGA (AVR_ISA_M256 | AVR_ISA_SPMX | AVR_ISA_DES | AVR_ISA_XCH)
#define AVR_ISA_XMEGA (AVR_ISA_M256 | AVR_ISA_SPMX | AVR_ISA_DES)
#define AVR_ISA_XMEGAU (AVR_ISA_XMEGA | AVR_ISA_RMW)
#define AVR_ISA_AVR1 AVR_ISA_TINY1
#define AVR_ISA_AVR2 AVR_ISA_2xxx
@ -266,10 +267,10 @@ AVR_INSN (ror, "r", "1001010rrrrr0111", 1, AVR_ISA_1200, 0x9407)
AVR_INSN (swap, "r", "1001010rrrrr0010", 1, AVR_ISA_1200, 0x9402)
/* Atomic memory operations for XMEGA. List before `sts'. */
AVR_INSN (xch, "z,r", "1001001rrrrr0100", 1, AVR_ISA_XCH, 0x9204)
AVR_INSN (las, "z,r", "1001001rrrrr0101", 1, AVR_ISA_XCH, 0x9205)
AVR_INSN (lac, "z,r", "1001001rrrrr0110", 1, AVR_ISA_XCH, 0x9206)
AVR_INSN (lat, "z,r", "1001001rrrrr0111", 1, AVR_ISA_XCH, 0x9207)
AVR_INSN (xch, "z,r", "1001001rrrrr0100", 1, AVR_ISA_RMW, 0x9204)
AVR_INSN (las, "z,r", "1001001rrrrr0101", 1, AVR_ISA_RMW, 0x9205)
AVR_INSN (lac, "z,r", "1001001rrrrr0110", 1, AVR_ISA_RMW, 0x9206)
AVR_INSN (lat, "z,r", "1001001rrrrr0111", 1, AVR_ISA_RMW, 0x9207)
/* Known to be decoded as `nop' by the old core. */
AVR_INSN (movw, "v,v", "00000001ddddrrrr", 1, AVR_ISA_MOVW, 0x0100)