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* tc-i386.c (md_assemble): Handle third byte of the opcode as prefix. 

* i386.h (i386_optab): Make [sml]fence template to use immext field.
This commit is contained in:
Jan Hubicka 2001-01-05 12:30:12 +00:00
parent 52b15da39a
commit 7bc70a8e57
4 changed files with 19 additions and 23 deletions
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4
gas/ChangeLog
View File

@ -1,3 +1,7 @@
Fri Jan 5 13:26:42 MET 2001 Jan Hubicka <jh@suse.cz>
* tc-i386.c (md_assemble): Handle third byte of the opcode as prefix.
Thu Jan 4 22:25:26 MET 2001 Jan Hubicka <jh@suse.cz>
* tc-i386.c (cpu_arch): Add Pentium4 and modify sledgehammer entry.

24
gas/config/tc-i386.c
View File

@ -2826,6 +2826,11 @@ md_assemble (line)
/* Output normal instructions here. */
unsigned char *q;
/* All opcodes on i386 have eighter 1 or 2 bytes. We may use third
byte for the SSE instructions to specify prefix they require. */
if (i.tm.base_opcode & 0xff0000)
add_prefix ((i.tm.base_opcode >> 16) & 0xff);
/* The prefix bytes. */
for (q = i.prefix;
q < i.prefix + sizeof (i.prefix) / sizeof (i.prefix[0]);
@ -2845,7 +2850,7 @@ md_assemble (line)
insn_size += 1;
FRAG_APPEND_1_CHAR (i.tm.base_opcode);
}
else if (fits_in_unsigned_word (i.tm.base_opcode))
else
{
insn_size += 2;
p = frag_more (2);
@ -2853,23 +2858,6 @@ md_assemble (line)
*p++ = (i.tm.base_opcode >> 8) & 0xff;
*p = i.tm.base_opcode & 0xff;
}
else
{ /* Opcode is either 3 or 4 bytes. */
if (i.tm.base_opcode & 0xff000000)
{
insn_size += 4;
p = frag_more (4);
*p++ = (i.tm.base_opcode >> 24) & 0xff;
}
else
{
insn_size += 3;
p = frag_more (3);
}
*p++ = (i.tm.base_opcode >> 16) & 0xff;
*p++ = (i.tm.base_opcode >> 8) & 0xff;
*p = (i.tm.base_opcode) & 0xff;
}
/* Now the modrm byte and sib byte (if present). */
if (i.tm.opcode_modifier & Modrm)

8
include/opcode/ChangeLog
View File

@ -1,9 +1,13 @@
Wed Jan 3 16:27:15 MET 2001 Jan hubicka <jh@suse.cz>
Fri Jan 5 13:22:23 MET 2001 Jan Hubicka <jh@suse.cz>
* i386.h (i386_optab): Make [sml]fence template to use immext field.
Wed Jan 3 16:27:15 MET 2001 Jan Hubicka <jh@suse.cz>
* i386.h (i386_optab): Fix 64bit pushf template; Add instructions
introduced by Pentium4
Sat Dec 30 19:03:15 MET 2000 Jan hubicka <jh@suse.cz>
Sat Dec 30 19:03:15 MET 2000 Jan Hubicka <jh@suse.cz>
* i386.h (i386_optab): Add "rex*" instructions;
add swapgs; disable jmp/call far direct instructions for

6
include/opcode/i386.h
View File

@ -953,8 +953,8 @@ static const template i386_optab[] = {
{"movnti", 2, 0x0fc3, X, CpuP4, lq_Suf|Modrm, { WordReg|WordMem, WordReg, 0 } },
{"clflush", 1, 0x0fae, 7, CpuP4, FP|Modrm, { ByteMem, 0, 0 } },
{"lfence", 0, 0x0faee8, X, CpuP4, FP, { 0, 0, 0 } },
{"mfence", 0, 0x0faef0, X, CpuP4, FP, { 0, 0, 0 } },
{"lfence", 0, 0x0fae, 0xe8, CpuP4, FP|ImmExt, { 0, 0, 0 } },
{"mfence", 0, 0x0fae, 0xf0, CpuP4, FP|ImmExt, { 0, 0, 0 } },
{"pause", 0, 0xf390, X, CpuP4, FP, { 0, 0, 0 } },
/* MMX/SSE2 instructions. */
@ -1172,7 +1172,7 @@ static const template i386_optab[] = {
{"rcpss", 2, 0xf30f53, X, CpuSSE, FP|Modrm, { RegXMM|WordMem, RegXMM, 0 } },
{"rsqrtps", 2, 0x0f52, X, CpuSSE, FP|Modrm, { RegXMM|LLongMem, RegXMM, 0 } },
{"rsqrtss", 2, 0xf30f52, X, CpuSSE, FP|Modrm, { RegXMM|WordMem, RegXMM, 0 } },
{"sfence", 0, 0x0faef8, X, CpuSSE, FP, { 0, 0, 0 } },
{"sfence", 0, 0x0fae, 0xf8, CpuSSE, FP|ImmExt, { 0, 0, 0 } },
{"shufps", 3, 0x0fc6, X, CpuSSE, FP|Modrm, { Imm8, RegXMM|LLongMem, RegXMM } },
{"sqrtps", 2, 0x0f51, X, CpuSSE, FP|Modrm, { RegXMM|LLongMem, RegXMM, 0 } },
{"sqrtss", 2, 0xf30f51, X, CpuSSE, FP|Modrm, { RegXMM|WordMem, RegXMM, 0 } },