* config/tc-m68hc11.c (md_begin): Take into account additional
page operand for call instruction. (print_opcode_format): Likewise. (check_range): Likewise for page range checking. (get_operand): Don't skip a possible comma in operands. (fixup8): Generate BFD_RELOC_M68HC11_PAGE reloc. (fixup16): Likwise with BFD_RELOC_M68HC11_LO16. (fixup24): New to handle call reloc. (build_insn): Handle missing page operand for call instruction. (find): Likewise. (md_apply_fix3): Take into account new relocs. (get_operand): Fix the mode for indexed indirect addressing. (build_indexed_byte): Fix post index byte for indexed indirect mode.
This commit is contained in:
Stephane Carrez
parent
9b701e4403
commit
7bfda7ebd0
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@ -1,3 +1,19 @@
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2002-08-13 Stephane Carrez <stcarrez@nerim.fr>
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* config/tc-m68hc11.c (md_begin): Take into account additional
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page operand for call instruction.
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(print_opcode_format): Likewise.
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(check_range): Likewise for page range checking.
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(get_operand): Don't skip a possible comma in operands.
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(fixup8): Generate BFD_RELOC_M68HC11_PAGE reloc.
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(fixup16): Likwise with BFD_RELOC_M68HC11_LO16.
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(fixup24): New to handle call reloc.
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(build_insn): Handle missing page operand for call instruction.
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(find): Likewise.
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(md_apply_fix3): Take into account new relocs.
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(get_operand): Fix the mode for indexed indirect addressing.
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(build_indexed_byte): Fix post index byte for indexed indirect mode.
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2002-08-12 Richard Sandiford <rsandifo@redhat.com>
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* config/tc-mips.c (mips_ip): Don't work out the value of
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@ -1,6 +1,6 @@
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/* tc-m68hc11.c -- Assembler code for the Motorola 68HC11 & 68HC12.
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Copyright 1999, 2000, 2001, 2002 Free Software Foundation, Inc.
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Written by Stephane Carrez (stcarrez@worldnet.fr)
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Written by Stephane Carrez (stcarrez@nerim.fr)
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This file is part of GAS, the GNU Assembler.
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@ -25,6 +25,7 @@
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#include "subsegs.h"
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#include "opcode/m68hc11.h"
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#include "dwarf2dbg.h"
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#include "elf/m68hc11.h"
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const char comment_chars[] = ";!";
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const char line_comment_chars[] = "#*";
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@ -163,6 +164,7 @@ static void print_insn_format PARAMS ((char *));
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static int get_operand PARAMS ((operand *, int, long));
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static void fixup8 PARAMS ((expressionS *, int, int));
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static void fixup16 PARAMS ((expressionS *, int, int));
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static void fixup24 PARAMS ((expressionS *, int, int));
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static unsigned char convert_branch PARAMS ((unsigned char));
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static char *m68hc11_new_insn PARAMS ((int));
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static void build_dbranch_insn PARAMS ((struct m68hc11_opcode *,
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@ -529,6 +531,10 @@ cmp_opcode (op1, op2)
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return strcmp (op1->name, op2->name);
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}
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#define IS_CALL_SYMBOL(MODE) \
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(((MODE) & (M6812_OP_PAGE|M6811_OP_IND16)) \
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== ((M6812_OP_PAGE|M6811_OP_IND16)))
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/* Initialize the assembler. Create the opcode hash table
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(sorted on the names) with the M6811 opcode table
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(from opcode library). */
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@ -613,9 +619,15 @@ md_begin ()
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expect++;
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if (opcodes->format & (M6812_OP_IND16_P2 | M6812_OP_IDX_P2))
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expect++;
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/* Special case for call instruction. */
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if ((opcodes->format & M6812_OP_PAGE)
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&& !(opcodes->format & M6811_OP_IND16))
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expect++;
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if (expect < opc->min_operands)
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opc->min_operands = expect;
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if (IS_CALL_SYMBOL (opcodes->format))
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expect++;
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if (expect > opc->max_operands)
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opc->max_operands = expect;
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}
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@ -695,6 +707,15 @@ print_opcode_format (opcode, example)
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p = &p[strlen (p)];
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}
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if (format & M6812_OP_PAGE)
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{
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if (example)
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sprintf (p, ", %d", rand () & 0x0FF);
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else
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strcpy (p, ", <page>");
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p = &p[strlen (p)];
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}
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if (format & M6811_OP_DIRECT)
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{
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if (example)
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@ -900,19 +921,19 @@ register_name ()
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/* Parse a string of operands and return an array of expressions.
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Operand mode[0] mode[1] exp[0] exp[1]
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#n M6811_OP_IMM16 - O_*
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*<exp> M6811_OP_DIRECT - O_*
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.{+-}<exp> M6811_OP_JUMP_REL - O_*
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<exp> M6811_OP_IND16 - O_*
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,r N,r M6812_OP_IDX M6812_OP_REG O_constant O_register
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n,-r M6812_PRE_DEC M6812_OP_REG O_constant O_register
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n,+r M6812_PRE_INC " "
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n,r- M6812_POST_DEC " "
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n,r+ M6812_POST_INC " "
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A,r B,r D,r M6811_OP_REG M6812_OP_REG O_register O_register
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[D,r] M6811_OP_IDX_2 M6812_OP_REG O_register O_register
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[n,r] M6811_OP_IDX_1 M6812_OP_REG O_constant O_register */
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Operand mode[0] mode[1] exp[0] exp[1]
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#n M6811_OP_IMM16 - O_*
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*<exp> M6811_OP_DIRECT - O_*
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.{+-}<exp> M6811_OP_JUMP_REL - O_*
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<exp> M6811_OP_IND16 - O_*
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,r N,r M6812_OP_IDX M6812_OP_REG O_constant O_register
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n,-r M6812_PRE_DEC M6812_OP_REG O_constant O_register
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n,+r M6812_PRE_INC " "
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n,r- M6812_POST_DEC " "
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n,r+ M6812_POST_INC " "
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A,r B,r D,r M6811_OP_REG M6812_OP_REG O_register O_register
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[D,r] M6811_OP_D_IDX M6812_OP_REG O_register O_register
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[n,r] M6811_OP_D_IDX_2 M6812_OP_REG O_constant O_register */
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static int
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get_operand (oper, which, opmode)
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operand *oper;
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@ -974,7 +995,7 @@ get_operand (oper, which, opmode)
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as_bad (_("Indirect indexed addressing is not valid for 68HC11."));
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p++;
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mode = M6812_OP_IDX_2;
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mode = M6812_OP_D_IDX;
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p = skip_whites (p);
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}
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else if (*p == ',') /* Special handling of ,x and ,y. */
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@ -996,7 +1017,7 @@ get_operand (oper, which, opmode)
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}
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input_line_pointer = p;
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if (mode == M6811_OP_NONE || mode == M6812_OP_IDX_2)
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if (mode == M6811_OP_NONE || mode == M6812_OP_D_IDX)
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reg = register_name ();
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else
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reg = REG_NONE;
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@ -1004,7 +1025,7 @@ get_operand (oper, which, opmode)
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if (reg != REG_NONE)
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{
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p = skip_whites (input_line_pointer);
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if (*p == ']' && mode == M6812_OP_IDX_2)
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if (*p == ']' && mode == M6812_OP_D_IDX)
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{
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as_bad
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(_("Missing second register or offset for indexed-indirect mode."));
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@ -1015,7 +1036,7 @@ get_operand (oper, which, opmode)
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oper->mode = mode | M6812_OP_REG;
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if (*p != ',')
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{
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if (mode == M6812_OP_IDX_2)
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if (mode == M6812_OP_D_IDX)
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{
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as_bad (_("Missing second register for indexed-indirect mode."));
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return -1;
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@ -1029,7 +1050,7 @@ get_operand (oper, which, opmode)
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if (reg != REG_NONE)
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{
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p = skip_whites (input_line_pointer);
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if (mode == M6812_OP_IDX_2)
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if (mode == M6812_OP_D_IDX)
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{
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if (*p != ']')
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{
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@ -1037,6 +1058,7 @@ get_operand (oper, which, opmode)
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return -1;
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}
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p++;
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oper->mode = M6812_OP_D_IDX;
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}
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input_line_pointer = p;
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@ -1089,7 +1111,7 @@ get_operand (oper, which, opmode)
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p = input_line_pointer;
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if (mode == M6811_OP_NONE || mode == M6811_OP_DIRECT
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|| mode == M6812_OP_IDX_2)
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|| mode == M6812_OP_D_IDX)
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{
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p = skip_whites (input_line_pointer);
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@ -1097,6 +1119,8 @@ get_operand (oper, which, opmode)
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{
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int possible_mode = M6811_OP_NONE;
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char *old_input_line;
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old_input_line = p;
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p++;
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/* 68HC12 pre increment or decrement. */
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@ -1114,7 +1138,6 @@ get_operand (oper, which, opmode)
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}
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p = skip_whites (p);
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}
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old_input_line = input_line_pointer;
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input_line_pointer = p;
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reg = register_name ();
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@ -1150,7 +1173,7 @@ get_operand (oper, which, opmode)
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as_bad (_("Wrong register in register indirect mode."));
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return -1;
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}
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if (mode == M6812_OP_IDX_2)
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if (mode == M6812_OP_D_IDX)
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{
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p = skip_whites (input_line_pointer);
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if (*p++ != ']')
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@ -1159,6 +1182,9 @@ get_operand (oper, which, opmode)
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return -1;
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}
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input_line_pointer = p;
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oper->reg1 = reg;
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oper->mode = M6812_OP_D_IDX_2;
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return 1;
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}
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if (reg != REG_NONE)
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{
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@ -1193,6 +1219,7 @@ get_operand (oper, which, opmode)
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oper->mode = mode;
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return 1;
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}
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input_line_pointer = old_input_line;
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}
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if (mode == M6812_OP_D_IDX_2)
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@ -1236,6 +1263,7 @@ check_range (num, mode)
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if (mode & M6812_OP_JUMP_REL16)
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mode = M6811_OP_IND16;
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mode &= ~M6811_OP_BRANCH;
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switch (mode)
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{
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case M6811_OP_IX:
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@ -1245,6 +1273,7 @@ check_range (num, mode)
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case M6811_OP_BITMASK:
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case M6811_OP_IMM8:
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case M6812_OP_PAGE:
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return (((num & 0xFFFFFF00) == 0) || ((num & 0xFFFFFF00) == 0xFFFFFF00))
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? 1 : 0;
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@ -1252,6 +1281,7 @@ check_range (num, mode)
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return (num >= -128 && num <= 127) ? 1 : 0;
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case M6811_OP_IND16:
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case M6811_OP_IND16 | M6812_OP_PAGE:
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case M6811_OP_IMM16:
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return (((num & 0xFFFF0000) == 0) || ((num & 0xFFFF0000) == 0xFFFF0000))
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? 1 : 0;
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@ -1328,7 +1358,9 @@ fixup8 (oper, mode, opmode)
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((opmode & M6811_OP_HIGH_ADDR)
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? BFD_RELOC_M68HC11_HI8
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: ((opmode & M6811_OP_LOW_ADDR)
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? BFD_RELOC_M68HC11_LO8 : BFD_RELOC_8)));
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? BFD_RELOC_M68HC11_LO8
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: ((mode & M6812_OP_PAGE)
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? BFD_RELOC_M68HC11_PAGE : BFD_RELOC_8))));
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}
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number_to_chars_bigendian (f, 0, 1);
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}
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@ -1368,7 +1400,9 @@ fixup16 (oper, mode, opmode)
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oper,
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(mode & M6812_OP_JUMP_REL16 ? true : false),
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(mode & M6812_OP_JUMP_REL16
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? BFD_RELOC_16_PCREL : BFD_RELOC_16));
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? BFD_RELOC_16_PCREL
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: (mode & M6812_OP_PAGE)
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? BFD_RELOC_M68HC11_LO16 : BFD_RELOC_16));
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number_to_chars_bigendian (f, 0, 2);
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if (mode & M6812_OP_JUMP_REL16)
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fixp->fx_pcrel_adjust = 2;
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@ -1378,6 +1412,42 @@ fixup16 (oper, mode, opmode)
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as_fatal (_("Operand `%x' not recognized in fixup16."), oper->X_op);
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}
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}
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/* Put a 3 byte expression described by 'oper'. If this expression contains
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unresolved symbols, generate a 24-bit fixup. */
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static void
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fixup24 (oper, mode, opmode)
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expressionS *oper;
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int mode;
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int opmode ATTRIBUTE_UNUSED;
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{
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char *f;
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f = frag_more (3);
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if (oper->X_op == O_constant)
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{
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if (!check_range (oper->X_add_number, mode))
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{
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as_bad (_("Operand out of 16-bit range: `%ld'."),
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oper->X_add_number);
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}
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number_to_chars_bigendian (f, oper->X_add_number & 0x0FFFFFF, 3);
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}
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else if (oper->X_op != O_register)
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{
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fixS *fixp;
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/* Now create a 24-bit fixup. */
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fixp = fix_new_exp (frag_now, f - frag_now->fr_literal, 2,
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oper, false, BFD_RELOC_M68HC11_24);
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number_to_chars_bigendian (f, 0, 3);
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}
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else
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{
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as_fatal (_("Operand `%x' not recognized in fixup16."), oper->X_op);
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}
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}
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/* 68HC11 and 68HC12 code generation. */
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@ -1703,7 +1773,7 @@ build_indexed_byte (op, format, move_insn)
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return 1;
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}
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if (mode & M6812_OP_IDX)
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if (mode & (M6812_OP_IDX | M6812_OP_D_IDX_2))
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{
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switch (op->reg1)
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{
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@ -1741,7 +1811,7 @@ build_indexed_byte (op, format, move_insn)
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return -1;
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}
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if (val >= -16 && val <= 15 && !(mode & M6812_OP_IDX_2))
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if (val >= -16 && val <= 15 && !(mode & M6812_OP_D_IDX_2))
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{
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byte = byte << 6;
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byte |= val & 0x1f;
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@ -1749,7 +1819,7 @@ build_indexed_byte (op, format, move_insn)
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number_to_chars_bigendian (f, byte, 1);
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return 1;
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}
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else if (val >= -256 && val <= 255 && !(mode & M6812_OP_IDX_2))
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else if (val >= -256 && val <= 255 && !(mode & M6812_OP_D_IDX_2))
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{
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byte = byte << 3;
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byte |= 0xe0;
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|
@ -1763,7 +1833,7 @@ build_indexed_byte (op, format, move_insn)
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else
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{
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byte = byte << 3;
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if (mode & M6812_OP_IDX_2)
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if (mode & M6812_OP_D_IDX_2)
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byte |= 0xe3;
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else
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byte |= 0xe2;
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|
@ -1774,7 +1844,15 @@ build_indexed_byte (op, format, move_insn)
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return 3;
|
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}
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}
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if (op->reg1 != REG_PC)
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if (mode & M6812_OP_D_IDX_2)
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{
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byte = (byte << 3) | 0xe3;
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f = frag_more (1);
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number_to_chars_bigendian (f, byte, 1);
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fixup16 (&op->exp, 0, 0);
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}
|
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else if (op->reg1 != REG_PC)
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{
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byte = (byte << 3) | 0xe2;
|
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f = frag_more (1);
|
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|
|
@ -1797,9 +1875,9 @@ build_indexed_byte (op, format, move_insn)
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return 3;
|
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}
|
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if (mode & M6812_OP_REG)
|
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if (mode & (M6812_OP_REG | M6812_OP_D_IDX))
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{
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if (mode & M6812_OP_IDX_2)
|
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if (mode & M6812_OP_D_IDX)
|
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{
|
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if (op->reg1 != REG_D)
|
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as_bad (_("Expecting register D for indexed indirect mode."));
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|
|
@ -1954,9 +2032,17 @@ build_insn (opcode, operands, nb_operands)
|
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operands[i].mode);
|
||||
i++;
|
||||
}
|
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else if (IS_CALL_SYMBOL (format) && nb_operands == 1)
|
||||
{
|
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format &= ~M6812_OP_PAGE;
|
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fixup24 (&operands[i].exp, format & M6811_OP_IND16,
|
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operands[i].mode);
|
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i++;
|
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}
|
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else if (format & (M6811_OP_IMM16 | M6811_OP_IND16))
|
||||
{
|
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fixup16 (&operands[i].exp, format & (M6811_OP_IMM16 | M6811_OP_IND16),
|
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fixup16 (&operands[i].exp,
|
||||
format & (M6811_OP_IMM16 | M6811_OP_IND16 | M6812_OP_PAGE),
|
||||
operands[i].mode);
|
||||
i++;
|
||||
}
|
||||
|
|
@ -1971,7 +2057,8 @@ build_insn (opcode, operands, nb_operands)
|
|||
i = 1;
|
||||
}
|
||||
else if (format &
|
||||
(M6812_OP_IDX | M6812_OP_IDX_2 | M6812_OP_IDX_1 | M6812_OP_D_IDX))
|
||||
(M6812_OP_IDX | M6812_OP_IDX_2 | M6812_OP_IDX_1
|
||||
| M6812_OP_D_IDX | M6812_OP_D_IDX_2))
|
||||
{
|
||||
build_indexed_byte (&operands[i], format, move_insn);
|
||||
i++;
|
||||
|
|
@ -1994,6 +2081,10 @@ build_insn (opcode, operands, nb_operands)
|
|||
{
|
||||
fixup16 (&operands[1].exp, M6811_OP_IND16, operands[1].mode);
|
||||
}
|
||||
if (format & M6812_OP_PAGE)
|
||||
{
|
||||
fixup8 (&operands[i].exp, M6812_OP_PAGE, operands[i].mode);
|
||||
}
|
||||
}
|
||||
|
||||
/* Opcode identification and operand analysis. */
|
||||
|
|
@ -2032,6 +2123,9 @@ find (opc, operands, nb_operands)
|
|||
expect++;
|
||||
if (opcode->format & (M6812_OP_IND16_P2 | M6812_OP_IDX_P2))
|
||||
expect++;
|
||||
if ((opcode->format & M6812_OP_PAGE)
|
||||
&& (!IS_CALL_SYMBOL (opcode->format) || nb_operands == 2))
|
||||
expect++;
|
||||
|
||||
for (i = 0; expect == nb_operands && i < nb_operands; i++)
|
||||
{
|
||||
|
|
@ -2064,6 +2158,8 @@ find (opc, operands, nb_operands)
|
|||
{
|
||||
if (i == 0 && (format & M6811_OP_IND16) != 0)
|
||||
continue;
|
||||
if (i != 0 && (format & M6812_OP_PAGE) != 0)
|
||||
continue;
|
||||
if (i != 0 && (format & M6812_OP_IND16_P2) != 0)
|
||||
continue;
|
||||
if (i == 0 && (format & M6811_OP_BITMASK))
|
||||
|
|
@ -2089,9 +2185,6 @@ find (opc, operands, nb_operands)
|
|||
&& (format & M6812_OP_IDX)
|
||||
&& (operands[i].reg2 != REG_NONE))
|
||||
continue;
|
||||
if (i == 0
|
||||
&& (format & M6812_OP_D_IDX))
|
||||
continue;
|
||||
if (i == 0
|
||||
&& (format & M6812_OP_IDX)
|
||||
&& (format & (M6812_OP_IND16_P2 | M6812_OP_IDX_P2)))
|
||||
|
|
@ -2117,6 +2210,11 @@ find (opc, operands, nb_operands)
|
|||
if (i == 1 && format & M6812_OP_IDX_P2)
|
||||
continue;
|
||||
}
|
||||
if (mode & format & (M6812_OP_D_IDX | M6812_OP_D_IDX_2))
|
||||
{
|
||||
if (i == 0)
|
||||
continue;
|
||||
}
|
||||
if (mode & M6812_AUTO_INC_DEC)
|
||||
{
|
||||
if (i == 0
|
||||
|
|
@ -2204,7 +2302,10 @@ find_opcode (opc, operands, nb_operands)
|
|||
if (i >= opc->min_operands)
|
||||
{
|
||||
opcode = find (opc, operands, i);
|
||||
if (opcode)
|
||||
if (opcode && !(opcode->format & M6812_OP_PAGE))
|
||||
return opcode;
|
||||
|
||||
if (opcode && *input_line_pointer != ',')
|
||||
return opcode;
|
||||
}
|
||||
|
||||
|
|
@ -2779,8 +2880,15 @@ md_apply_fix3 (fixP, valP, seg)
|
|||
bfd_putb32 ((bfd_vma) value, (unsigned char *) where);
|
||||
break;
|
||||
|
||||
case BFD_RELOC_24:
|
||||
case BFD_RELOC_M68HC11_24:
|
||||
bfd_putb16 ((bfd_vma) (value & 0x0ffff), (unsigned char *) where);
|
||||
((bfd_byte*) where)[2] = ((value >> 16) & 0x0ff);
|
||||
break;
|
||||
|
||||
case BFD_RELOC_16:
|
||||
case BFD_RELOC_16_PCREL:
|
||||
case BFD_RELOC_M68HC11_LO16:
|
||||
bfd_putb16 ((bfd_vma) value, (unsigned char *) where);
|
||||
if (value < -65537 || value > 65535)
|
||||
as_bad_where (fixP->fx_file, fixP->fx_line,
|
||||
|
|
@ -2793,6 +2901,7 @@ md_apply_fix3 (fixP, valP, seg)
|
|||
|
||||
case BFD_RELOC_M68HC11_LO8:
|
||||
case BFD_RELOC_8:
|
||||
case BFD_RELOC_M68HC11_PAGE:
|
||||
#if 0
|
||||
bfd_putb8 ((bfd_vma) value, (unsigned char *) where);
|
||||
#endif
|
||||
|
|
|
|||
Loading…
Reference in New Issue