PowerPC Rename powerxx to power10
Now that ISA3.1 is out we can finish with the powerxx silliness. bfd/ * elf64-ppc.c: Rename powerxx to power10 throughout. gas/ * config/tc-ppc.c (md_assemble): Update for PPC_OPCODE_POWER10 renaming. * testsuite/gas/ppc/prefix-align.d: Use -mpower10/-Mpower10 in place of -mfuture/-Mfuture. * testsuite/gas/ppc/prefix-pcrel.d: Likewise. * testsuite/gas/ppc/prefix-reloc.d: Likewise. gold/ * powerpc.cc: Rename powerxx to power10 throughout. include/ * elf/ppc64.h: Update comment. * opcode/ppc.h (PPC_OPCODE_POWER10): Rename from PPC_OPCODE_POWERXX. ld/ * testsuite/ld-powerpc/callstub-1.d: Use -mpower10/-Mpower10 in place of -mfuture/-Mfuture. * testsuite/ld-powerpc/notoc2.d: Likewise. * testsuite/ld-powerpc/powerpc.exp: Likewise. * testsuite/ld-powerpc/tlsgd.d: Likewise. * testsuite/ld-powerpc/tlsie.d: Likewise. * testsuite/ld-powerpc/tlsld.d: Likewise. opcodes/ * ppc-dis.c (ppc_opts): Add "power10" entry. (print_insn_powerpc): Update for PPC_OPCODE_POWER10 renaming. * ppc-opc.c (POWER10): Rename from POWERXX. Update all uses.
This commit is contained in:
Alan Modra
parent
73199c2b7a
commit
7c1f422735
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@ -1,3 +1,7 @@
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2020-05-11 Alan Modra <amodra@gmail.com>
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* elf64-ppc.c: Rename powerxx to power10 throughout.
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2020-05-11 Alan Modra <amodra@gmail.com>
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PR 25961
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@ -2914,7 +2914,7 @@ must_be_dyn_reloc (struct bfd_link_info *info,
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. mtctr %r12
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. bctr
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There are also ELFv1 powerxx variants of these stubs.
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There are also ELFv1 power10 variants of these stubs.
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ppc_stub_long_branch_notoc:
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. pla %r12,dest@pcrel
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. b dest
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@ -2937,7 +2937,7 @@ must_be_dyn_reloc (struct bfd_link_info *info,
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In cases where the high instructions would add zero, they are
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omitted and following instructions modified in some cases.
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For example, a powerxx ppc_stub_plt_call_notoc might simplify down
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For example, a power10 ppc_stub_plt_call_notoc might simplify down
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to
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. pld %r12,xxx@pcrel
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. mtctr %r12
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@ -3238,8 +3238,8 @@ struct ppc_link_hash_table
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/* Whether calls are made via the PLT from NOTOC functions. */
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unsigned int notoc_plt:1;
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/* Whether to use powerxx instructions in linkage stubs. */
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unsigned int powerxx_stubs:1;
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/* Whether to use power10 instructions in linkage stubs. */
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unsigned int power10_stubs:1;
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/* Incremented every time we size stubs. */
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unsigned int stub_iteration;
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@ -4604,7 +4604,7 @@ ppc64_elf_check_relocs (bfd *abfd, struct bfd_link_info *info,
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case R_PPC64_PLT_PCREL34:
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case R_PPC64_PLT_PCREL34_NOTOC:
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case R_PPC64_PCREL28:
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htab->powerxx_stubs = 1;
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htab->power10_stubs = 1;
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break;
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default:
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break;
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@ -10597,7 +10597,7 @@ emit_relocs_for_offset (struct bfd_link_info *info, Elf_Internal_Rela *r,
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}
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static bfd_byte *
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build_powerxx_offset (bfd *abfd, bfd_byte *p, bfd_vma off, int odd,
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build_power10_offset (bfd *abfd, bfd_byte *p, bfd_vma off, int odd,
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bfd_boolean load)
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{
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uint64_t insn;
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@ -10679,7 +10679,7 @@ build_powerxx_offset (bfd *abfd, bfd_byte *p, bfd_vma off, int odd,
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}
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static unsigned int
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size_powerxx_offset (bfd_vma off, int odd)
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size_power10_offset (bfd_vma off, int odd)
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{
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if (off - odd + (1ULL << 33) < 1ULL << 34)
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return odd + 8;
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@ -10690,7 +10690,7 @@ size_powerxx_offset (bfd_vma off, int odd)
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}
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static unsigned int
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num_relocs_for_powerxx_offset (bfd_vma off, int odd)
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num_relocs_for_power10_offset (bfd_vma off, int odd)
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{
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if (off - odd + (1ULL << 33) < 1ULL << 34)
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return 1;
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@ -10701,7 +10701,7 @@ num_relocs_for_powerxx_offset (bfd_vma off, int odd)
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}
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static Elf_Internal_Rela *
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emit_relocs_for_powerxx_offset (struct bfd_link_info *info,
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emit_relocs_for_power10_offset (struct bfd_link_info *info,
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Elf_Internal_Rela *r, bfd_vma roff,
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bfd_vma targ, bfd_vma off, int odd)
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{
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@ -10813,14 +10813,14 @@ plt_stub_size (struct ppc_link_hash_table *htab,
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if (stub_entry->stub_type >= ppc_stub_plt_call_notoc)
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{
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if (htab->powerxx_stubs)
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if (htab->power10_stubs)
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{
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bfd_vma start = (stub_entry->stub_offset
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+ stub_entry->group->stub_sec->output_offset
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+ stub_entry->group->stub_sec->output_section->vma);
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if (stub_entry->stub_type > ppc_stub_plt_call_notoc)
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start += 4;
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size = 8 + size_powerxx_offset (off, start & 4);
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size = 8 + size_power10_offset (off, start & 4);
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}
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else
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size = 8 + size_offset (off - 8);
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@ -11654,10 +11654,10 @@ ppc_build_one_stub (struct bfd_hash_entry *gen_entry, void *in_arg)
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relp = p;
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num_rel = 0;
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if (htab->powerxx_stubs)
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if (htab->power10_stubs)
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{
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bfd_boolean load = stub_entry->stub_type >= ppc_stub_plt_call_notoc;
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p = build_powerxx_offset (htab->params->stub_bfd, p, off, odd, load);
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p = build_power10_offset (htab->params->stub_bfd, p, off, odd, load);
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}
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else
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{
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@ -11693,8 +11693,8 @@ ppc_build_one_stub (struct bfd_hash_entry *gen_entry, void *in_arg)
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if (info->emitrelocations)
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{
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bfd_vma roff = relp - stub_entry->group->stub_sec->contents;
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if (htab->powerxx_stubs)
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num_rel += num_relocs_for_powerxx_offset (off, odd);
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if (htab->power10_stubs)
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num_rel += num_relocs_for_power10_offset (off, odd);
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else
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{
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num_rel += num_relocs_for_offset (off);
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@ -11703,8 +11703,8 @@ ppc_build_one_stub (struct bfd_hash_entry *gen_entry, void *in_arg)
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r = get_relocs (stub_entry->group->stub_sec, num_rel);
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if (r == NULL)
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return FALSE;
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if (htab->powerxx_stubs)
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r = emit_relocs_for_powerxx_offset (info, r, roff, targ, off, odd);
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if (htab->power10_stubs)
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r = emit_relocs_for_power10_offset (info, r, roff, targ, off, odd);
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else
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r = emit_relocs_for_offset (info, r, roff, targ, off);
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if (stub_entry->stub_type == ppc_stub_long_branch_notoc
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@ -11721,7 +11721,7 @@ ppc_build_one_stub (struct bfd_hash_entry *gen_entry, void *in_arg)
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}
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}
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if (!htab->powerxx_stubs
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if (!htab->power10_stubs
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&& htab->glink_eh_frame != NULL
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&& htab->glink_eh_frame->size != 0)
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{
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@ -12069,16 +12069,16 @@ ppc_size_one_stub (struct bfd_hash_entry *gen_entry, void *in_arg)
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if (info->emitrelocations)
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{
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unsigned int num_rel;
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if (htab->powerxx_stubs)
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num_rel = num_relocs_for_powerxx_offset (off, odd);
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if (htab->power10_stubs)
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num_rel = num_relocs_for_power10_offset (off, odd);
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else
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num_rel = num_relocs_for_offset (off - 8);
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stub_entry->group->stub_sec->reloc_count += num_rel;
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stub_entry->group->stub_sec->flags |= SEC_RELOC;
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}
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if (htab->powerxx_stubs)
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extra = size_powerxx_offset (off, odd);
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if (htab->power10_stubs)
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extra = size_power10_offset (off, odd);
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else
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extra = size_offset (off - 8);
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/* Include branch insn plus those in the offset sequence. */
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@ -12088,7 +12088,7 @@ ppc_size_one_stub (struct bfd_hash_entry *gen_entry, void *in_arg)
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calculated. */
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off -= extra;
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if (!htab->powerxx_stubs)
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if (!htab->power10_stubs)
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{
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/* After the bcl, lr has been modified so we need to emit
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.eh_frame info saying the return address is in r12. */
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@ -12151,8 +12151,8 @@ ppc_size_one_stub (struct bfd_hash_entry *gen_entry, void *in_arg)
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if (info->emitrelocations)
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{
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unsigned int num_rel;
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if (htab->powerxx_stubs)
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num_rel = num_relocs_for_powerxx_offset (off, odd);
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if (htab->power10_stubs)
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num_rel = num_relocs_for_power10_offset (off, odd);
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else
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num_rel = num_relocs_for_offset (off - 8);
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stub_entry->group->stub_sec->reloc_count += num_rel;
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@ -12161,7 +12161,7 @@ ppc_size_one_stub (struct bfd_hash_entry *gen_entry, void *in_arg)
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size = plt_stub_size (htab, stub_entry, off);
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if (!htab->powerxx_stubs)
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if (!htab->power10_stubs)
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{
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/* After the bcl, lr has been modified so we need to emit
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.eh_frame info saying the return address is in r12. */
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@ -1,3 +1,12 @@
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2020-05-11 Alan Modra <amodra@gmail.com>
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* config/tc-ppc.c (md_assemble): Update for PPC_OPCODE_POWER10
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renaming.
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* testsuite/gas/ppc/prefix-align.d: Use -mpower10/-Mpower10 in
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place of -mfuture/-Mfuture.
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* testsuite/gas/ppc/prefix-pcrel.d: Likewise.
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* testsuite/gas/ppc/prefix-reloc.d: Likewise.
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2020-05-06 Nick Clifton <nickc@redhat.com>
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* po/sv.po: Updated Swedish translation.
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@ -4131,7 +4131,7 @@ md_assemble (char *str)
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insn_length = 4;
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if ((ppc_cpu & PPC_OPCODE_VLE) != 0 && PPC_OP_SE_VLE (insn))
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insn_length = 2;
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else if ((opcode->flags & PPC_OPCODE_POWERXX) != 0
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else if ((opcode->flags & PPC_OPCODE_POWER10) != 0
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&& PPC_PREFIX_P (insn))
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{
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struct insn_label_list *l;
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@ -1,6 +1,6 @@
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#as: -mfuture
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#objdump: -dr -Mfuture
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#name: POWERXX alignment of labels test
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#as: -mpower10
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#objdump: -dr -Mpower10
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#name: POWER10 alignment of labels test
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.*
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@ -1,6 +1,6 @@
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#as: -mfuture
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#objdump: -dr -Mfuture
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#name: POWERXX pcrel tests
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#as: -mpower10
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#objdump: -dr -Mpower10
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#name: POWER10 pcrel tests
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.*
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@ -1,5 +1,5 @@
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#as: -a64 -mfuture
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#objdump: -dr -Mfuture
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#as: -a64 -mpower10
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#objdump: -dr -Mpower10
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#name: Prefix insn relocations
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.*
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@ -1,3 +1,7 @@
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2020-05-11 Alan Modra <amodra@gmail.com>
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* powerpc.cc: Rename powerxx to power10 throughout.
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2020-05-02 H.J. Lu <hongjiu.lu@intel.com>
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PR gold/25904
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@ -647,7 +647,7 @@ class Target_powerpc : public Sized_target<size, big_endian>
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glink_(NULL), rela_dyn_(NULL), copy_relocs_(),
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tlsld_got_offset_(-1U),
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stub_tables_(), branch_lookup_table_(), branch_info_(), tocsave_loc_(),
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powerxx_stubs_(false), plt_thread_safe_(false), plt_localentry0_(false),
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power10_stubs_(false), plt_thread_safe_(false), plt_localentry0_(false),
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plt_localentry0_init_(false), has_localentry0_(false),
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has_tls_get_addr_opt_(false),
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relax_failed_(false), relax_fail_count_(0),
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@ -1079,13 +1079,13 @@ class Target_powerpc : public Sized_target<size, big_endian>
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}
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bool
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powerxx_stubs() const
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{ return this->powerxx_stubs_; }
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power10_stubs() const
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{ return this->power10_stubs_; }
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void
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set_powerxx_stubs()
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set_power10_stubs()
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{
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this->powerxx_stubs_ = true;
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this->power10_stubs_ = true;
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}
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bool
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@ -1687,7 +1687,7 @@ class Target_powerpc : public Sized_target<size, big_endian>
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Branches branch_info_;
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Tocsave_loc tocsave_loc_;
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bool powerxx_stubs_;
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bool power10_stubs_;
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bool plt_thread_safe_;
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bool plt_localentry0_;
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bool plt_localentry0_init_;
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@ -5073,7 +5073,7 @@ Stub_table<size, big_endian>::add_plt_call_entry(
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if (r_type == elfcpp::R_PPC64_REL24_NOTOC)
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{
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if (!p.second && !p.first->second.notoc_
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&& !this->targ_->powerxx_stubs())
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&& !this->targ_->power10_stubs())
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this->need_resize_ = true;
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p.first->second.notoc_ = 1;
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}
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@ -5124,7 +5124,7 @@ Stub_table<size, big_endian>::add_plt_call_entry(
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if (r_type == elfcpp::R_PPC64_REL24_NOTOC)
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{
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if (!p.second && !p.first->second.notoc_
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&& !this->targ_->powerxx_stubs())
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&& !this->targ_->power10_stubs())
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this->need_resize_ = true;
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p.first->second.notoc_ = 1;
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}
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@ -5330,7 +5330,7 @@ Stub_table<size, big_endian>::add_eh_frame(Layout* layout)
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&& cs->second.r2save_
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&& !cs->second.localentry0_)
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|| (cs->second.notoc_
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&& !this->targ_->powerxx_stubs()))
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&& !this->targ_->power10_stubs()))
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calls.push_back(cs);
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if (calls.size() > 1)
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std::stable_sort(calls.begin(), calls.end(),
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@ -5339,7 +5339,7 @@ Stub_table<size, big_endian>::add_eh_frame(Layout* layout)
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typedef typename Branch_stub_entries::const_iterator branch_iter;
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std::vector<branch_iter> branches;
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if (!this->long_branch_stubs_.empty()
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&& !this->targ_->powerxx_stubs())
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&& !this->targ_->power10_stubs())
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for (branch_iter bs = this->long_branch_stubs_.begin();
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bs != this->long_branch_stubs_.end();
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++bs)
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@ -5776,7 +5776,7 @@ Stub_table<size, big_endian>::build_tls_opt_tail(
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template<bool big_endian>
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static unsigned char*
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build_powerxx_offset(unsigned char* p, uint64_t off, uint64_t odd, bool load)
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build_power10_offset(unsigned char* p, uint64_t off, uint64_t odd, bool load)
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{
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uint64_t insn;
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if (off - odd + (1ULL << 33) < 1ULL << 34)
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@ -5964,7 +5964,7 @@ Stub_table<size, big_endian>::plt_call_size(
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if (p->second.r2save_)
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bytes += 4;
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if (this->targ_->powerxx_stubs())
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if (this->targ_->power10_stubs())
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{
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uint64_t from = this->stub_address() + p->second.off_ + bytes;
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if (bytes > 8 * 4)
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@ -6045,7 +6045,7 @@ Stub_table<size, big_endian>::branch_stub_size(
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uint64_t off = p->first.dest_ - loc;
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if (p->second.notoc_)
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{
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if (this->targ_->powerxx_stubs())
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if (this->targ_->power10_stubs())
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{
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Address odd = loc & 4;
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if (off + (1 << 25) < 2 << 25)
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@ -6080,7 +6080,7 @@ Stub_table<size, big_endian>::branch_stub_size(
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if (off + (1 << 25) < 2 << 25)
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return 4;
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if (!this->targ_->powerxx_stubs())
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if (!this->targ_->power10_stubs())
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*need_lt = true;
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return 16;
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}
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@ -6116,7 +6116,7 @@ Stub_table<size, big_endian>::do_write(Output_file* of)
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unsigned char* p;
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|
||||
if (size == 64
|
||||
&& this->targ_->powerxx_stubs())
|
||||
&& this->targ_->power10_stubs())
|
||||
{
|
||||
if (!this->plt_call_stubs_.empty())
|
||||
{
|
||||
|
|
@ -6138,7 +6138,7 @@ Stub_table<size, big_endian>::do_write(Output_file* of)
|
|||
Address plt_addr = pltoff + plt->address();
|
||||
Address from = this->stub_address() + (p - oview);
|
||||
Address delta = plt_addr - from;
|
||||
p = build_powerxx_offset<big_endian>(p, delta, from & 4, true);
|
||||
p = build_power10_offset<big_endian>(p, delta, from & 4, true);
|
||||
write_insn<big_endian>(p, mtctr_12);
|
||||
p += 4;
|
||||
if (!this->build_tls_opt_tail(p, cs))
|
||||
|
|
@ -6161,7 +6161,7 @@ Stub_table<size, big_endian>::do_write(Output_file* of)
|
|||
if (bs->second.notoc_ || delta + (1 << 25) >= 2 << 25)
|
||||
{
|
||||
unsigned char* startp = p;
|
||||
p = build_powerxx_offset<big_endian>(p, delta, loc & 4, false);
|
||||
p = build_power10_offset<big_endian>(p, delta, loc & 4, false);
|
||||
delta -= p - startp;
|
||||
}
|
||||
if (delta + (1 << 25) < 2 << 25)
|
||||
|
|
@ -8181,7 +8181,7 @@ Target_powerpc<size, big_endian>::Scan::local(
|
|||
case elfcpp::R_PPC64_GOT_TLSLD34:
|
||||
case elfcpp::R_PPC64_GOT_DTPREL34:
|
||||
case elfcpp::R_PPC64_GOT_TPREL34:
|
||||
target->set_powerxx_stubs();
|
||||
target->set_power10_stubs();
|
||||
break;
|
||||
default:
|
||||
break;
|
||||
|
|
@ -8939,7 +8939,7 @@ Target_powerpc<size, big_endian>::Scan::global(
|
|||
case elfcpp::R_PPC64_GOT_TLSLD34:
|
||||
case elfcpp::R_PPC64_GOT_DTPREL34:
|
||||
case elfcpp::R_PPC64_GOT_TPREL34:
|
||||
target->set_powerxx_stubs();
|
||||
target->set_power10_stubs();
|
||||
break;
|
||||
default:
|
||||
break;
|
||||
|
|
|
|||
|
|
@ -1,3 +1,8 @@
|
|||
2020-05-11 Alan Modra <amodra@gmail.com>
|
||||
|
||||
* elf/ppc64.h: Update comment.
|
||||
* opcode/ppc.h (PPC_OPCODE_POWER10): Rename from PPC_OPCODE_POWERXX.
|
||||
|
||||
2020-04-30 Alex Coplan <alex.coplan@arm.com>
|
||||
|
||||
* opcode/aarch64.h (enum aarch64_opnd): Add
|
||||
|
|
|
|||
|
|
@ -158,7 +158,7 @@ START_RELOC_NUMBERS (elf_ppc64_reloc_type)
|
|||
RELOC_NUMBER (R_PPC64_PLTSEQ, 119)
|
||||
RELOC_NUMBER (R_PPC64_PLTCALL, 120)
|
||||
|
||||
/* Powerxx support. */
|
||||
/* Power10 support. */
|
||||
RELOC_NUMBER (R_PPC64_PLTSEQ_NOTOC, 121)
|
||||
RELOC_NUMBER (R_PPC64_PLTCALL_NOTOC, 122)
|
||||
RELOC_NUMBER (R_PPC64_PCREL_OPT, 123)
|
||||
|
|
|
|||
|
|
@ -228,8 +228,8 @@ extern const unsigned int spe2_num_opcodes;
|
|||
/* Opcode is supported by EFS2. */
|
||||
#define PPC_OPCODE_EFS2 0x200000000000ull
|
||||
|
||||
/* Opcode is only supported by powerxx architecture. */
|
||||
#define PPC_OPCODE_POWERXX 0x400000000000ull
|
||||
/* Opcode is only supported by power10 architecture. */
|
||||
#define PPC_OPCODE_POWER10 0x400000000000ull
|
||||
|
||||
/* A macro to extract the major opcode from an instruction. */
|
||||
#define PPC_OP(i) (((i) >> 26) & 0x3f)
|
||||
|
|
|
|||
10
ld/ChangeLog
10
ld/ChangeLog
|
|
@ -1,3 +1,13 @@
|
|||
2020-05-11 Alan Modra <amodra@gmail.com>
|
||||
|
||||
* testsuite/ld-powerpc/callstub-1.d: Use -mpower10/-Mpower10 in
|
||||
place of -mfuture/-Mfuture.
|
||||
* testsuite/ld-powerpc/notoc2.d: Likewise.
|
||||
* testsuite/ld-powerpc/powerpc.exp: Likewise.
|
||||
* testsuite/ld-powerpc/tlsgd.d: Likewise.
|
||||
* testsuite/ld-powerpc/tlsie.d: Likewise.
|
||||
* testsuite/ld-powerpc/tlsld.d: Likewise.
|
||||
|
||||
2020-05-11 Nick Clifton <nickc@redhat.com>
|
||||
|
||||
* po/es.po: Updated Spanish translation.
|
||||
|
|
|
|||
|
|
@ -1,6 +1,6 @@
|
|||
#as: -a64 -mfuture
|
||||
#as: -a64 -mpower10
|
||||
#ld: -melf64ppc -shared --plt-align=0 --hash-style=gnu
|
||||
#objdump: -dr -Mfuture
|
||||
#objdump: -dr -Mpower10
|
||||
|
||||
.*
|
||||
|
||||
|
|
|
|||
|
|
@ -1,7 +1,7 @@
|
|||
#source: notoc2.s
|
||||
#as: -a64 -mfuture
|
||||
#as: -a64 -mpower10
|
||||
#ld: -shared -z norelro
|
||||
#objdump: -d -Mfuture
|
||||
#objdump: -d -Mpower10
|
||||
#target: powerpc64*-*-*
|
||||
|
||||
.*
|
||||
|
|
|
|||
|
|
@ -319,11 +319,11 @@ set ppc64elftests {
|
|||
{"notoc ext" "" "" "-a64" {ext.s} {} ""}
|
||||
{"notoc" "-melf64ppc --no-plt-localentry -T ext.lnk" "" "-a64" {notoc.s}
|
||||
{{objdump -d notoc.d} {readelf {-wf -W} notoc.wf}} "notoc"}
|
||||
{"notoc2" "-melf64ppc -shared" "" "-a64 -mfuture" {notoc2.s}
|
||||
{{objdump {-d -Mfuture} notoc2.d}} "notoc2"}
|
||||
{"notoc2" "-melf64ppc -shared" "" "-a64 -mpower10" {notoc2.s}
|
||||
{{objdump {-d -Mpower10} notoc2.d}} "notoc2"}
|
||||
{"pcrelopt" "-melf64ppc --hash-style=gnu" "tmpdir/symtocbase.so"
|
||||
"-a64 -mfuture" {pcrelopt.s}
|
||||
{{objdump {-d -Mfuture} pcrelopt.d}
|
||||
"-a64 -mpower10" {pcrelopt.s}
|
||||
{{objdump {-d -Mpower10} pcrelopt.d}
|
||||
{readelf {-S --wide} pcrelopt.sec}} "pcrelopt" }
|
||||
}
|
||||
|
||||
|
|
|
|||
|
|
@ -1,7 +1,7 @@
|
|||
#source: tlsgd.s
|
||||
#as: -a64 -mfuture
|
||||
#as: -a64 -mpower10
|
||||
#ld: -melf64ppc
|
||||
#objdump: -dr -Mfuture
|
||||
#objdump: -dr -Mpower10
|
||||
|
||||
.*: file format .*
|
||||
|
||||
|
|
|
|||
|
|
@ -1,7 +1,7 @@
|
|||
#source: tlsie.s
|
||||
#as: -a64 -mfuture
|
||||
#as: -a64 -mpower10
|
||||
#ld: -melf64ppc
|
||||
#objdump: -dr -Mfuture
|
||||
#objdump: -dr -Mpower10
|
||||
|
||||
.*: file format .*
|
||||
|
||||
|
|
|
|||
|
|
@ -1,7 +1,7 @@
|
|||
#source: tlsld.s
|
||||
#as: -a64 -mfuture
|
||||
#as: -a64 -mpower10
|
||||
#ld: -melf64ppc
|
||||
#objdump: -dr -Mfuture
|
||||
#objdump: -dr -Mpower10
|
||||
|
||||
.*: file format .*
|
||||
|
||||
|
|
|
|||
|
|
@ -1,3 +1,9 @@
|
|||
2020-05-11 Alan Modra <amodra@gmail.com>
|
||||
|
||||
* ppc-dis.c (ppc_opts): Add "power10" entry.
|
||||
(print_insn_powerpc): Update for PPC_OPCODE_POWER10 renaming.
|
||||
* ppc-opc.c (POWER10): Rename from POWERXX. Update all uses.
|
||||
|
||||
2020-05-11 Nick Clifton <nickc@redhat.com>
|
||||
|
||||
* po/fr.po: Updated French translation.
|
||||
|
|
|
|||
|
|
@ -185,10 +185,15 @@ struct ppc_mopt ppc_opts[] = {
|
|||
| PPC_OPCODE_POWER7 | PPC_OPCODE_POWER8 | PPC_OPCODE_POWER9
|
||||
| PPC_OPCODE_ALTIVEC | PPC_OPCODE_VSX),
|
||||
0 },
|
||||
{ "power10", (PPC_OPCODE_PPC | PPC_OPCODE_ISEL | PPC_OPCODE_64
|
||||
| PPC_OPCODE_POWER4 | PPC_OPCODE_POWER5 | PPC_OPCODE_POWER6
|
||||
| PPC_OPCODE_POWER7 | PPC_OPCODE_POWER8 | PPC_OPCODE_POWER9
|
||||
| PPC_OPCODE_POWER10 | PPC_OPCODE_ALTIVEC | PPC_OPCODE_VSX),
|
||||
0 },
|
||||
{ "future", (PPC_OPCODE_PPC | PPC_OPCODE_ISEL | PPC_OPCODE_64
|
||||
| PPC_OPCODE_POWER4 | PPC_OPCODE_POWER5 | PPC_OPCODE_POWER6
|
||||
| PPC_OPCODE_POWER7 | PPC_OPCODE_POWER8 | PPC_OPCODE_POWER9
|
||||
| PPC_OPCODE_POWERXX | PPC_OPCODE_ALTIVEC | PPC_OPCODE_VSX),
|
||||
| PPC_OPCODE_POWER10 | PPC_OPCODE_ALTIVEC | PPC_OPCODE_VSX),
|
||||
0 },
|
||||
{ "ppc", PPC_OPCODE_PPC,
|
||||
0 },
|
||||
|
|
@ -768,7 +773,7 @@ print_insn_powerpc (bfd_vma memaddr,
|
|||
|
||||
/* Get the major opcode of the insn. */
|
||||
opcode = NULL;
|
||||
if ((dialect & PPC_OPCODE_POWERXX) != 0
|
||||
if ((dialect & PPC_OPCODE_POWER10) != 0
|
||||
&& PPC_OP (insn) == 0x1)
|
||||
{
|
||||
uint64_t temp_insn, suffix;
|
||||
|
|
|
|||
|
|
@ -3713,7 +3713,7 @@ const unsigned int num_powerpc_operands = (sizeof (powerpc_operands)
|
|||
#define POWER7 PPC_OPCODE_POWER7
|
||||
#define POWER8 PPC_OPCODE_POWER8
|
||||
#define POWER9 PPC_OPCODE_POWER9
|
||||
#define POWERXX PPC_OPCODE_POWERXX
|
||||
#define POWER10 PPC_OPCODE_POWER10
|
||||
#define CELL PPC_OPCODE_CELL
|
||||
#define PPC64 PPC_OPCODE_64 | PPC_OPCODE_64_BRIDGE
|
||||
#define NON32 (PPC_OPCODE_64 | PPC_OPCODE_POWER4 \
|
||||
|
|
@ -7966,33 +7966,33 @@ const unsigned int powerpc_num_opcodes =
|
|||
The format of this opcode table is the same as the main opcode table. */
|
||||
|
||||
const struct powerpc_opcode prefix_opcodes[] = {
|
||||
{"pnop", PMRR, PREFIX_MASK, POWERXX, 0, {0}},
|
||||
{"pli", PMLS|OP(14), P_DRAPCREL_MASK, POWERXX, 0, {RT, SI34}},
|
||||
{"paddi", PMLS|OP(14), P_D_MASK, POWERXX, 0, {RT, RA0, SI34, PCREL0}},
|
||||
{"psubi", PMLS|OP(14), P_D_MASK, POWERXX, 0, {RT, RA0, NSI34, PCREL0}},
|
||||
{"pla", PMLS|OP(14), P_D_MASK, POWERXX, 0, {RT, D34, PRA0, PCREL}},
|
||||
{"plwz", PMLS|OP(32), P_D_MASK, POWERXX, 0, {RT, D34, PRA0, PCREL}},
|
||||
{"plbz", PMLS|OP(34), P_D_MASK, POWERXX, 0, {RT, D34, PRA0, PCREL}},
|
||||
{"pstw", PMLS|OP(36), P_D_MASK, POWERXX, 0, {RS, D34, PRA0, PCREL}},
|
||||
{"pstb", PMLS|OP(38), P_D_MASK, POWERXX, 0, {RS, D34, PRA0, PCREL}},
|
||||
{"plhz", PMLS|OP(40), P_D_MASK, POWERXX, 0, {RT, D34, PRA0, PCREL}},
|
||||
{"plwa", P8LS|OP(41), P_D_MASK, POWERXX, 0, {RT, D34, PRA0, PCREL}},
|
||||
{"plxsd", P8LS|OP(42), P_D_MASK, POWERXX, 0, {VD, D34, PRA0, PCREL}},
|
||||
{"plha", PMLS|OP(42), P_D_MASK, POWERXX, 0, {RT, D34, PRA0, PCREL}},
|
||||
{"plxssp", P8LS|OP(43), P_D_MASK, POWERXX, 0, {VD, D34, PRA0, PCREL}},
|
||||
{"psth", PMLS|OP(44), P_D_MASK, POWERXX, 0, {RS, D34, PRA0, PCREL}},
|
||||
{"pstxsd", P8LS|OP(46), P_D_MASK, POWERXX, 0, {VS, D34, PRA0, PCREL}},
|
||||
{"pstxssp", P8LS|OP(47), P_D_MASK, POWERXX, 0, {VS, D34, PRA0, PCREL}},
|
||||
{"plfs", PMLS|OP(48), P_D_MASK, POWERXX, 0, {FRT, D34, PRA0, PCREL}},
|
||||
{"plxv", P8LS|OP(50), P_D_MASK&~OP(1), POWERXX, 0, {XTOP, D34, PRA0, PCREL}},
|
||||
{"plfd", PMLS|OP(50), P_D_MASK, POWERXX, 0, {FRT, D34, PRA0, PCREL}},
|
||||
{"pstfs", PMLS|OP(52), P_D_MASK, POWERXX, 0, {FRS, D34, PRA0, PCREL}},
|
||||
{"pstxv", P8LS|OP(54), P_D_MASK&~OP(1), POWERXX, 0, {XTOP, D34, PRA0, PCREL}},
|
||||
{"pstfd", PMLS|OP(54), P_D_MASK, POWERXX, 0, {FRS, D34, PRA0, PCREL}},
|
||||
{"plq", P8LS|OP(56), P_D_MASK, POWERXX, 0, {RTQ, D34, PRAQ, PCREL}},
|
||||
{"pld", P8LS|OP(57), P_D_MASK, POWERXX, 0, {RT, D34, PRA0, PCREL}},
|
||||
{"pstq", P8LS|OP(60), P_D_MASK, POWERXX, 0, {RSQ, D34, PRA0, PCREL}},
|
||||
{"pstd", P8LS|OP(61), P_D_MASK, POWERXX, 0, {RS, D34, PRA0, PCREL}},
|
||||
{"pnop", PMRR, PREFIX_MASK, POWER10, 0, {0}},
|
||||
{"pli", PMLS|OP(14), P_DRAPCREL_MASK, POWER10, 0, {RT, SI34}},
|
||||
{"paddi", PMLS|OP(14), P_D_MASK, POWER10, 0, {RT, RA0, SI34, PCREL0}},
|
||||
{"psubi", PMLS|OP(14), P_D_MASK, POWER10, 0, {RT, RA0, NSI34, PCREL0}},
|
||||
{"pla", PMLS|OP(14), P_D_MASK, POWER10, 0, {RT, D34, PRA0, PCREL}},
|
||||
{"plwz", PMLS|OP(32), P_D_MASK, POWER10, 0, {RT, D34, PRA0, PCREL}},
|
||||
{"plbz", PMLS|OP(34), P_D_MASK, POWER10, 0, {RT, D34, PRA0, PCREL}},
|
||||
{"pstw", PMLS|OP(36), P_D_MASK, POWER10, 0, {RS, D34, PRA0, PCREL}},
|
||||
{"pstb", PMLS|OP(38), P_D_MASK, POWER10, 0, {RS, D34, PRA0, PCREL}},
|
||||
{"plhz", PMLS|OP(40), P_D_MASK, POWER10, 0, {RT, D34, PRA0, PCREL}},
|
||||
{"plwa", P8LS|OP(41), P_D_MASK, POWER10, 0, {RT, D34, PRA0, PCREL}},
|
||||
{"plxsd", P8LS|OP(42), P_D_MASK, POWER10, 0, {VD, D34, PRA0, PCREL}},
|
||||
{"plha", PMLS|OP(42), P_D_MASK, POWER10, 0, {RT, D34, PRA0, PCREL}},
|
||||
{"plxssp", P8LS|OP(43), P_D_MASK, POWER10, 0, {VD, D34, PRA0, PCREL}},
|
||||
{"psth", PMLS|OP(44), P_D_MASK, POWER10, 0, {RS, D34, PRA0, PCREL}},
|
||||
{"pstxsd", P8LS|OP(46), P_D_MASK, POWER10, 0, {VS, D34, PRA0, PCREL}},
|
||||
{"pstxssp", P8LS|OP(47), P_D_MASK, POWER10, 0, {VS, D34, PRA0, PCREL}},
|
||||
{"plfs", PMLS|OP(48), P_D_MASK, POWER10, 0, {FRT, D34, PRA0, PCREL}},
|
||||
{"plxv", P8LS|OP(50), P_D_MASK&~OP(1), POWER10, 0, {XTOP, D34, PRA0, PCREL}},
|
||||
{"plfd", PMLS|OP(50), P_D_MASK, POWER10, 0, {FRT, D34, PRA0, PCREL}},
|
||||
{"pstfs", PMLS|OP(52), P_D_MASK, POWER10, 0, {FRS, D34, PRA0, PCREL}},
|
||||
{"pstxv", P8LS|OP(54), P_D_MASK&~OP(1), POWER10, 0, {XTOP, D34, PRA0, PCREL}},
|
||||
{"pstfd", PMLS|OP(54), P_D_MASK, POWER10, 0, {FRS, D34, PRA0, PCREL}},
|
||||
{"plq", P8LS|OP(56), P_D_MASK, POWER10, 0, {RTQ, D34, PRAQ, PCREL}},
|
||||
{"pld", P8LS|OP(57), P_D_MASK, POWER10, 0, {RT, D34, PRA0, PCREL}},
|
||||
{"pstq", P8LS|OP(60), P_D_MASK, POWER10, 0, {RSQ, D34, PRA0, PCREL}},
|
||||
{"pstd", P8LS|OP(61), P_D_MASK, POWER10, 0, {RS, D34, PRA0, PCREL}},
|
||||
};
|
||||
|
||||
const unsigned int prefix_num_opcodes =
|
||||
|
|
|
|||
Loading…
Reference in New Issue