i386: Don't add 0x66 prefix to IRET for .code16gcc
The .code16gcc directive supports 16bit mode with 32-bit address. Since IRET (opcode 0xcf) in 16bit mode returns from an interrupt in 16bit mode, we shouldn't add 0x66 prefix for IRET. PR gas/24485 * config/tc-i386.c (process_suffix): Don't add DATA_PREFIX_OPCODE to IRET for .code16gcc. * testsuite/gas/i386/jump16.s: Add IRET tests. * testsuite/gas/i386/jump16.d: Updated.
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@ -1,3 +1,11 @@
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2019-04-26 H.J. Lu <hongjiu.lu@intel.com>
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PR gas/24485
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* config/tc-i386.c (process_suffix): Don't add DATA_PREFIX_OPCODE
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to IRET for .code16gcc.
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* testsuite/gas/i386/jump16.s: Add IRET tests.
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* testsuite/gas/i386/jump16.d: Updated.
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2019-04-25 Alexandre Oliva <aoliva@redhat.com>
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Alan Modra <amodra@gmail.com>
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@ -6352,7 +6352,13 @@ process_suffix (void)
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if (!add_prefix (ADDR_PREFIX_OPCODE))
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return 0;
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}
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/* stackop_size is set to LONG_MNEM_SUFFIX for the .code16gcc
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directive to support 16bit mode with 32-bit address. Since
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IRET (opcode 0xcf) in 16bit mode returns from an interrupt
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in 16bit mode, we shouldn't add DATA_PREFIX_OPCODE here. */
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else if (i.suffix != QWORD_MNEM_SUFFIX
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&& (stackop_size != LONG_MNEM_SUFFIX
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|| i.tm.base_opcode != 0xcf)
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&& !i.tm.opcode_modifier.ignoresize
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&& !i.tm.opcode_modifier.floatmf
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&& !i.tm.opcode_modifier.vex
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@ -67,4 +67,6 @@ Disassembly of section .text:
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[ ]*[a-f0-9]+: ea 10 10 90 90 ljmp \$0x9090,\$0x1010
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[ ]*[a-f0-9]+: ea 00 00 90 90 ljmp \$0x9090,\$0x0 ed: (R_386_)?16 xxx
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[ ]*[a-f0-9]+: ea 00 00 90 90 ljmp \$0x9090,\$0x0 f2: (R_386_)?16 xxx
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[ ]*[a-f0-9]+: cf iret
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[ ]*[a-f0-9]+: cf iret
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#pass
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@ -71,3 +71,9 @@
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jmp 0x9090:0x1010
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jmp 0x9090,xxx
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jmp 0x9090:xxx
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.code16gcc
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iret
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.code16
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iret
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