bfd/
* elf32-arm.c (cortex_a8_erratum_scan): If the stub is a Thumb branch to a PLT entry, redirect it to the PLT's Thumb entry point. ld/testsuite/ * ld-arm/cortex-a8-fix-b-plt.s, ld-arm/cortex-a8-fix-b-plt.d, ld-arm/cortex-a8-fix-bcc-plt.s, ld-arm/cortex-a8-fix-bcc-plt.d, ld-arm/cortex-a8-fix-bl-plt.s, ld-arm/cortex-a8-fix-bl-plt.d, ld-arm/cortex-a8-fix-blx-plt.s, ld-arm/cortex-a8-fix-blx-plt.d, ld-arm/cortex-a8-fix-plt.ld: New tests. * ld-arm/arm-elf.exp: Run them.
This commit is contained in:
Richard Sandiford
parent
1342dcfc82
commit
7d24e6a65a
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@ -1,3 +1,8 @@
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2011-05-06 Richard Sandiford <richard.sandiford@linaro.org>
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* elf32-arm.c (cortex_a8_erratum_scan): If the stub is a Thumb
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branch to a PLT entry, redirect it to the PLT's Thumb entry point.
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2011-05-05 Bernd Schmidt <bernds@codesourcery.com>
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* elf32-tic6x.c (elf32_tic6x_final_link): New function.
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@ -4556,6 +4556,7 @@ cortex_a8_erratum_scan (bfd *input_bfd,
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bfd_vma target;
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enum elf32_arm_stub_type stub_type = arm_stub_none;
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struct a8_erratum_reloc key, *found;
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bfd_boolean use_plt = FALSE;
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key.from = base_vma + i;
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found = (struct a8_erratum_reloc *)
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@ -4567,7 +4568,6 @@ cortex_a8_erratum_scan (bfd *input_bfd,
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{
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char *error_message = NULL;
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struct elf_link_hash_entry *entry;
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bfd_boolean use_plt = FALSE;
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/* We don't care about the error returned from this
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function, only if there is glue or not. */
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@ -4671,6 +4671,12 @@ cortex_a8_erratum_scan (bfd *input_bfd,
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offset =
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(bfd_signed_vma) (found->destination - pc_for_insn);
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/* If the stub will use a Thumb-mode branch to a
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PLT target, redirect it to the preceding Thumb
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entry point. */
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if (stub_type != arm_stub_a8_veneer_blx && use_plt)
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offset -= PLT_THUMB_STUB_SIZE;
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target = pc_for_insn + offset;
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/* The BLX stub is ARM-mode code. Adjust the offset to
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@ -1,3 +1,12 @@
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2011-05-06 Richard Sandiford <richard.sandiford@linaro.org>
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* ld-arm/cortex-a8-fix-b-plt.s, ld-arm/cortex-a8-fix-b-plt.d,
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ld-arm/cortex-a8-fix-bcc-plt.s, ld-arm/cortex-a8-fix-bcc-plt.d,
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ld-arm/cortex-a8-fix-bl-plt.s, ld-arm/cortex-a8-fix-bl-plt.d,
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ld-arm/cortex-a8-fix-blx-plt.s, ld-arm/cortex-a8-fix-blx-plt.d,
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ld-arm/cortex-a8-fix-plt.ld: New tests.
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* ld-arm/arm-elf.exp: Run them.
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2011-05-05 Bernd Schmidt <bernds@codesourcery.com>
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* ld-tic6x/shared-nopic.d: New test.
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@ -210,18 +210,38 @@ set armelftests {
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"-EL -Ttext=0x8f00 --fix-cortex-a8" "-EL" {cortex-a8-fix-b.s}
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{{objdump -dr cortex-a8-fix-b.d}}
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"cortex-a8-fix-b"}
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{"Cortex-A8 erratum fix, b.w to PLT"
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"-EL -Tcortex-a8-fix-plt.ld --fix-cortex-a8 -shared" "-EL"
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{cortex-a8-fix-b-plt.s}
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{{objdump -dr cortex-a8-fix-b-plt.d}}
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"cortex-a8-fix-b-plt"}
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{"Cortex-A8 erratum fix, bl.w"
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"-EL -Ttext=0x8f00 --fix-cortex-a8" "-EL" {cortex-a8-fix-bl.s}
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{{objdump -dr cortex-a8-fix-bl.d}}
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"cortex-a8-fix-bl"}
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{"Cortex-A8 erratum fix, bl.w to PLT"
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"-EL -Tcortex-a8-fix-plt.ld --fix-cortex-a8 -shared" "-EL"
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{cortex-a8-fix-bl-plt.s}
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{{objdump -dr cortex-a8-fix-bl-plt.d}}
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"cortex-a8-fix-bl-plt"}
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{"Cortex-A8 erratum fix, bcc.w"
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"-EL -Ttext=0x8f00 --fix-cortex-a8" "-EL" {cortex-a8-fix-bcc.s}
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{{objdump -dr cortex-a8-fix-bcc.d}}
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"cortex-a8-fix-bcc"}
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{"Cortex-A8 erratum fix, bcc.w to PLT"
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"-EL -Tcortex-a8-fix-plt.ld --fix-cortex-a8 -shared" "-EL"
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{cortex-a8-fix-bcc-plt.s}
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{{objdump -dr cortex-a8-fix-bcc-plt.d}}
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"cortex-a8-fix-bcc-plt"}
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{"Cortex-A8 erratum fix, blx.w"
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"-EL -Ttext=0x8f00 --fix-cortex-a8" "-EL" {cortex-a8-fix-blx.s}
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{{objdump -dr cortex-a8-fix-blx.d}}
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"cortex-a8-fix-blx"}
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{"Cortex-A8 erratum fix, blx.w to PLT"
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"-EL -Tcortex-a8-fix-plt.ld --fix-cortex-a8 -shared" "-EL"
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{cortex-a8-fix-blx-plt.s}
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{{objdump -dr cortex-a8-fix-blx-plt.d}}
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"cortex-a8-fix-blx-plt"}
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{"Cortex-A8 erratum fix, relocate b.w to ARM"
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"-EL -Ttext=0x8f00 --fix-cortex-a8" "-EL" {cortex-a8-arm-target.s cortex-a8-fix-b-rel.s}
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{{objdump -dr cortex-a8-fix-b-rel-arm.d}}
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@ -0,0 +1,30 @@
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.*
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Disassembly of section \.plt:
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00008000 <\.plt>:
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8000: e52de004 push {lr} ; \(str lr, \[sp, #-4\]!\)
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8004: e59fe004 ldr lr, \[pc, #4\] ; 8010 <foo-0xfe0>
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8008: e08fe00e add lr, pc, lr
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800c: e5bef008 ldr pc, \[lr, #8\]!
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8010: 00000ffc \.word 0x00000ffc
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8014: 4778 bx pc
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8016: 46c0 nop ; \(mov r8, r8\)
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8018: e28fc600 add ip, pc, #0
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801c: e28cca00 add ip, ip, #0
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8020: e5bcfff8 ldr pc, \[ip, #4088\]! ; 0xff8
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Disassembly of section \.text:
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00008ff0 <foo>:
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8ff0: 46c0 nop ; \(mov r8, r8\)
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8ff2: f240 0000 movw r0, #0
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8ff6: f240 0000 movw r0, #0
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8ffa: f240 0000 movw r0, #0
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8ffe: f000 b803 b\.w 9008 <foo\+0x18>
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9002: 0000 movs r0, r0
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9004: 0000 movs r0, r0
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9006: 0000 movs r0, r0
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9008: f7ff b804 b\.w 8014 <foo-0xfdc>
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@ -0,0 +1,10 @@
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.syntax unified
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.globl foo
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.type foo,%function
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.thumb_func
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foo:
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nop @ 0x00
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movw r0,#0 @ 0x02
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movw r0,#0 @ 0x06
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movw r0,#0 @ 0x0a
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b.w bar(PLT) @ 0x0e
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@ -0,0 +1,32 @@
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.*
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Disassembly of section \.plt:
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00008000 <\.plt>:
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8000: e52de004 push {lr} ; \(str lr, \[sp, #-4\]!\)
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8004: e59fe004 ldr lr, \[pc, #4\] ; 8010 <foo-0xfe0>
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8008: e08fe00e add lr, pc, lr
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800c: e5bef008 ldr pc, \[lr, #8\]!
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8010: 00001004 \.word 0x00001004
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8014: 4778 bx pc
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8016: 46c0 nop ; \(mov r8, r8\)
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8018: e28fc600 add ip, pc, #0
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801c: e28cca01 add ip, ip, #4096 ; 0x1000
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8020: e5bcf000 ldr pc, \[ip\]!
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Disassembly of section \.text:
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00008ff0 <foo>:
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8ff0: 46c0 nop ; \(mov r8, r8\)
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8ff2: f240 0000 movw r0, #0
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8ff6: f240 0000 movw r0, #0
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8ffa: f240 0000 movw r0, #0
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8ffe: f000 b803 b\.w 9008 <foo\+0x18>
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9002: 0000 movs r0, r0
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9004: 0000 movs r0, r0
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9006: 0000 movs r0, r0
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9008: d001 beq\.n 900e <foo\+0x1e>
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900a: f7ff bffa b\.w 9002 <foo\+0x12>
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900e: f7ff b801 b\.w 8014 <foo-0xfdc>
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@ -0,0 +1,10 @@
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.syntax unified
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.globl foo
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.type foo,%function
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.thumb_func
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foo:
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nop @ 0x00
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movw r0,#0 @ 0x02
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movw r0,#0 @ 0x06
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movw r0,#0 @ 0x0a
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beq.w bar(PLT) @ 0x0e
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@ -0,0 +1,28 @@
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.*
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Disassembly of section \.plt:
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00008000 <\.plt>:
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8000: e52de004 push {lr} ; \(str lr, \[sp, #-4\]!\)
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8004: e59fe004 ldr lr, \[pc, #4\] ; 8010 <foo-0xfe0>
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8008: e08fe00e add lr, pc, lr
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800c: e5bef008 ldr pc, \[lr, #8\]!
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8010: 00000ffc \.word 0x00000ffc
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8014: e28fc600 add ip, pc, #0
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8018: e28cca00 add ip, ip, #0
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801c: e5bcfffc ldr pc, \[ip, #4092\]! ; 0xffc
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Disassembly of section \.text:
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00008ff0 <foo>:
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8ff0: 46c0 nop ; \(mov r8, r8\)
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8ff2: f240 0000 movw r0, #0
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8ff6: f240 0000 movw r0, #0
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8ffa: f240 0000 movw r0, #0
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8ffe: f000 e804 blx 9008 <foo\+0x18>
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9002: 0000 movs r0, r0
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9004: 0000 movs r0, r0
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9006: 0000 movs r0, r0
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9008: eafffc01 b 8014 <foo-0xfdc>
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@ -0,0 +1,10 @@
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.syntax unified
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.globl foo
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.type foo,%function
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.thumb_func
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foo:
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nop @ 0x00
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movw r0,#0 @ 0x02
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movw r0,#0 @ 0x06
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movw r0,#0 @ 0x0a
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bl bar(PLT) @ 0x0e
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@ -0,0 +1,28 @@
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.*
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Disassembly of section \.plt:
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00008000 <\.plt>:
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8000: e52de004 push {lr} ; \(str lr, \[sp, #-4\]!\)
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8004: e59fe004 ldr lr, \[pc, #4\] ; 8010 <foo-0xfe0>
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8008: e08fe00e add lr, pc, lr
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800c: e5bef008 ldr pc, \[lr, #8\]!
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8010: 00000ffc \.word 0x00000ffc
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8014: e28fc600 add ip, pc, #0
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8018: e28cca00 add ip, ip, #0
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801c: e5bcfffc ldr pc, \[ip, #4092\]! ; 0xffc
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Disassembly of section \.text:
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00008ff0 <foo>:
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8ff0: 46c0 nop ; \(mov r8, r8\)
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8ff2: f240 0000 movw r0, #0
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8ff6: f240 0000 movw r0, #0
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8ffa: f240 0000 movw r0, #0
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8ffe: f000 e804 blx 9008 <foo\+0x18>
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9002: 0000 movs r0, r0
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9004: 0000 movs r0, r0
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9006: 0000 movs r0, r0
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9008: eafffc01 b 8014 <foo-0xfdc>
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@ -0,0 +1,10 @@
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.syntax unified
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.globl foo
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.type foo,%function
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.thumb_func
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foo:
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nop @ 0x00
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movw r0,#0 @ 0x02
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movw r0,#0 @ 0x06
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movw r0,#0 @ 0x0a
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blx bar @ 0x0e
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@ -0,0 +1,18 @@
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OUTPUT_ARCH(arm)
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ENTRY(_start)
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SECTIONS
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{
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. = 0x07000;
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.hash : { *(.hash) }
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.gnu.hash : { *(.gnu.hash) }
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.dynsym : { *(.dynsym) }
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.dynstr : { *(.dynstr) }
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.rel.dyn : { *(.rel.dyn) }
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.rel.plt : { *(.rel.plt) }
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. = 0x08000;
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.plt : { *(.plt) }
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. = 0x08ff0;
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.text : { *(.text) }
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. = 0x10000;
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.dynamic : { *(.dynamic) }
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}
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