RISC-V: Gate opcode tables by enum rather than string.
Generalize opcode arch dependencies so that we can support the overlapping B extension Zb* subsets. 2019-09-17 Maxim Blinov <maxim.blinov@embecosm.com> gas/ * config/tc-riscv.c (riscv_multi_subset_supports): Handle insn_class enum rather than subset char string. (riscv_ip): Update call to riscv_multi_subset_supports. include/ * opcode/riscv.h (riscv_insn_class): New enum. * opcode/riscv.h (struct riscv_opcode): Change subset field to insn_class field. opcodes/ * riscv-opc.c (riscv_opcodes): Change subset field to insn_class field for all instructions. (riscv_insn_types): Likewise.
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@ -1,3 +1,9 @@
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2019-09-17 Maxim Blinov <maxim.blinov@embecosm.com>
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* config/tc-riscv.c (riscv_multi_subset_supports): Handle
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insn_class enum rather than subset char string.
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(riscv_ip): Update call to riscv_multi_subset_supports.
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2019-09-16 Phil Blundell <pb@pbcl.net>
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* Makefile.in, configure, doc/Makefile.in: Regenerated.
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@ -121,15 +121,28 @@ riscv_subset_supports (const char *feature)
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}
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static bfd_boolean
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riscv_multi_subset_supports (const char *features[])
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riscv_multi_subset_supports (enum riscv_insn_class insn_class)
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{
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unsigned i = 0;
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bfd_boolean supported = TRUE;
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switch (insn_class)
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{
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case INSN_CLASS_I: return riscv_subset_supports ("i");
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case INSN_CLASS_C: return riscv_subset_supports ("c");
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case INSN_CLASS_A: return riscv_subset_supports ("a");
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case INSN_CLASS_M: return riscv_subset_supports ("m");
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case INSN_CLASS_F: return riscv_subset_supports ("f");
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case INSN_CLASS_D: return riscv_subset_supports ("d");
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case INSN_CLASS_D_AND_C:
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return riscv_subset_supports ("d") && riscv_subset_supports ("c");
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for (;features[i]; ++i)
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supported = supported && riscv_subset_supports (features[i]);
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case INSN_CLASS_F_AND_C:
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return riscv_subset_supports ("f") && riscv_subset_supports ("c");
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return supported;
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case INSN_CLASS_Q: return riscv_subset_supports ("q");
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default:
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as_fatal ("Unreachable");
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return FALSE;
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}
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}
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/* Set which ISA and extensions are available. */
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@ -1427,7 +1440,7 @@ riscv_ip (char *str, struct riscv_cl_insn *ip, expressionS *imm_expr,
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if ((insn->xlen_requirement != 0) && (xlen != insn->xlen_requirement))
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continue;
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if (!riscv_multi_subset_supports (insn->subset))
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if (!riscv_multi_subset_supports (insn->insn_class))
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continue;
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create_insn (ip, insn);
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@ -1,3 +1,9 @@
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2019-09-17 Maxim Blinov <maxim.blinov@embecosm.com>
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* opcode/riscv.h (riscv_insn_class): New enum.
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* opcode/riscv.h (struct riscv_opcode): Change
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subset field to insn_class field.
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2019-09-09 Phil Blundell <pb@pbcl.net>
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binutils 2.33 branch created.
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@ -294,6 +294,23 @@ static const char * const riscv_pred_succ[16] =
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/* The maximal number of subset can be required. */
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#define MAX_SUBSET_NUM 4
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/* All RISC-V instructions belong to at least one of these classes. */
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enum riscv_insn_class
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{
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INSN_CLASS_NONE,
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INSN_CLASS_I,
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INSN_CLASS_C,
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INSN_CLASS_A,
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INSN_CLASS_M,
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INSN_CLASS_F,
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INSN_CLASS_D,
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INSN_CLASS_D_AND_C,
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INSN_CLASS_F_AND_C,
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INSN_CLASS_Q,
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};
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/* This structure holds information for a particular instruction. */
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struct riscv_opcode
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@ -302,9 +319,9 @@ struct riscv_opcode
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const char *name;
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/* The requirement of xlen for the instruction, 0 if no requirement. */
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unsigned xlen_requirement;
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/* An array of ISA subset name (I, M, A, F, D, Xextension), must ended
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with a NULL pointer sential. */
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const char *subset[MAX_SUBSET_NUM];
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/* Class to which this instruction belongs. Used to decide whether or
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not this instruction is legal in the current -march context. */
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enum riscv_insn_class insn_class;
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/* A string describing the arguments for this instruction. */
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const char *args;
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/* The basic opcode for the instruction. When assembling, this
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@ -1,3 +1,9 @@
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2019-09-17 Maxim Blinov <maxim.blinov@embecosm.com>
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* riscv-opc.c (riscv_opcodes): Change subset field
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to insn_class field for all instructions.
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(riscv_insn_types): Likewise.
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2019-09-16 Phil Blundell <pb@pbcl.net>
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* configure: Regenerated.
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1278
opcodes/riscv-opc.c
1278
opcodes/riscv-opc.c
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