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Fix the generation of alignment frags in code sections for AArch64.

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PR gas/20364
	* config/tc-aarch64.c (s_ltorg): Change the mapping state after
	aligning the frag.
	(aarch64_init): Treat rs_align frags in code sections as
	containing code, not data.
	* testsuite/gas/aarch64/pr20364.s: New test.
	* testsuite/gas/aarch64/pr20364.d: New test driver.
This commit is contained in:
Nick Clifton 2016-08-05 10:37:57 +01:00
parent cca8e7e482
commit 7ea12e5c3a
4 changed files with 58 additions and 3 deletions
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10
gas/ChangeLog
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@ -1,3 +1,13 @@
2016-08-05 Nick Clifton <nickc@redhat.com>
PR gas/20364
* config/tc-aarch64.c (s_ltorg): Change the mapping state after
aligning the frag.
(aarch64_init): Treat rs_align frags in code sections as
containing code, not data.
* testsuite/gas/aarch64/pr20364.s: New test.
* testsuite/gas/aarch64/pr20364.d: New test driver.
2016-08-04 Stefan Trleman <stefan.teleman@oracle.com>
PR gas/20427

10
gas/config/tc-aarch64.c
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@ -1736,13 +1736,13 @@ s_ltorg (int ignored ATTRIBUTE_UNUSED)
if (pool == NULL || pool->symbol == NULL || pool->next_free_entry == 0)
continue;
mapping_state (MAP_DATA);
/* Align pool as you have word accesses.
Only make a frag if we have to. */
if (!need_pass_2)
frag_align (align, 0, 0);
mapping_state (MAP_DATA);
record_alignment (now_seg, align);
sprintf (sym_name, "$$lit_\002%x", pool->id);
@ -6373,11 +6373,15 @@ aarch64_init_frag (fragS * fragP, int max_chars)
switch (fragP->fr_type)
{
case rs_align:
case rs_align_test:
case rs_fill:
mapping_state_2 (MAP_DATA, max_chars);
break;
case rs_align:
/* PR 20364: We can get alignment frags in code sections,
so do not just assume that we should use the MAP_DATA state. */
mapping_state_2 (subseg_text_p (now_seg) ? MAP_INSN : MAP_DATA, max_chars);
break;
case rs_align_code:
mapping_state_2 (MAP_INSN, max_chars);
break;

13
gas/testsuite/gas/aarch64/pr20364.d Normal file
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@ -0,0 +1,13 @@
# Check that ".align <size>, <fill>" does not set the mapping state to DATA, causing unnecessary frag generation.
#name: PR20364
#objdump: -d
.*: file format .*
Disassembly of section \.vectors:
0+000 <.*>:
0: d2800000 mov x0, #0x0 // #0
4: 94000000 bl 0 <plat_report_exception>
8: 17fffffe b 0 <bl1_exceptions>

28
gas/testsuite/gas/aarch64/pr20364.s Normal file
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@ -0,0 +1,28 @@
.macro vector_base label
.section .vectors, "ax"
.align 11, 0
\label:
.endm
.macro vector_entry label
.section .vectors, "ax"
.align 7, 0
\label:
.endm
.macro check_vector_size since
.if (. - \since) > (32 * 4)
.error "Vector exceeds 32 instructions"
.endif
.endm
.globl bl1_exceptions
vector_base bl1_exceptions
vector_entry SynchronousExceptionSP0
mov x0, #0x0
bl plat_report_exception
b SynchronousExceptionSP0
check_vector_size SynchronousExceptionSP0