* i386.c (md_assemble): Support 32bit address prefix.
(i386_displacement): Likewise. (i386_index_check): Accept 32bit addressing in 64bit mode.
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@ -1,3 +1,9 @@
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Mon Feb 11 12:59:29 CET 2002 Jan Hubicka <jh@suse.cz>
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* i386.c (md_assemble): Support 32bit address prefix.
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(i386_displacement): Likewise.
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(i386_index_check): Accept 32bit addressing in 64bit mode.
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2002-02-11 Alexandre Oliva <aoliva@redhat.com>
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2002-02-11 Alexandre Oliva <aoliva@redhat.com>
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* config/tc-sh.c (dot): Removed unused function.
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* config/tc-sh.c (dot): Removed unused function.
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@ -1298,6 +1298,7 @@ md_assemble (line)
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/* If we are in 16-bit mode, do not allow addr16 or data16.
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/* If we are in 16-bit mode, do not allow addr16 or data16.
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Similarly, in 32-bit mode, do not allow addr32 or data32. */
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Similarly, in 32-bit mode, do not allow addr32 or data32. */
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if ((current_templates->start->opcode_modifier & (Size16 | Size32))
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if ((current_templates->start->opcode_modifier & (Size16 | Size32))
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&& flag_code != CODE_64BIT
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&& (((current_templates->start->opcode_modifier & Size32) != 0)
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&& (((current_templates->start->opcode_modifier & Size32) != 0)
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^ (flag_code == CODE_16BIT)))
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^ (flag_code == CODE_16BIT)))
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{
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{
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@ -2263,6 +2264,14 @@ md_assemble (line)
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return;
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return;
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}
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}
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if (i.suffix != QWORD_MNEM_SUFFIX && (flag_code == CODE_64BIT)
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&& !(i.tm.opcode_modifier & IgnoreSize)
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&& (i.tm.opcode_modifier & JumpByte))
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{
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if (! add_prefix (ADDR_PREFIX_OPCODE))
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return;
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}
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/* Set mode64 for an operand. */
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/* Set mode64 for an operand. */
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if (i.suffix == QWORD_MNEM_SUFFIX
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if (i.suffix == QWORD_MNEM_SUFFIX
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&& !(i.tm.opcode_modifier & NoRex64))
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&& !(i.tm.opcode_modifier & NoRex64))
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@ -2415,13 +2424,15 @@ md_assemble (line)
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if (! i.index_reg)
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if (! i.index_reg)
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{
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{
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/* Operand is just <disp> */
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/* Operand is just <disp> */
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if ((flag_code == CODE_16BIT) ^ (i.prefix[ADDR_PREFIX] != 0))
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if ((flag_code == CODE_16BIT) ^ (i.prefix[ADDR_PREFIX] != 0)
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&& (flag_code != CODE_64BIT))
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{
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{
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i.rm.regmem = NO_BASE_REGISTER_16;
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i.rm.regmem = NO_BASE_REGISTER_16;
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i.types[op] &= ~Disp;
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i.types[op] &= ~Disp;
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i.types[op] |= Disp16;
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i.types[op] |= Disp16;
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}
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}
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else if (flag_code != CODE_64BIT)
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else if (flag_code != CODE_64BIT
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|| (i.prefix[ADDR_PREFIX] != 0))
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{
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{
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i.rm.regmem = NO_BASE_REGISTER;
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i.rm.regmem = NO_BASE_REGISTER;
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i.types[op] &= ~Disp;
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i.types[op] &= ~Disp;
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@ -3438,10 +3449,13 @@ i386_displacement (disp_start, disp_end)
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#endif
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#endif
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int bigdisp = Disp32;
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int bigdisp = Disp32;
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if ((flag_code == CODE_16BIT) ^ (i.prefix[ADDR_PREFIX] != 0))
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bigdisp = Disp16;
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if (flag_code == CODE_64BIT)
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if (flag_code == CODE_64BIT)
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bigdisp = Disp64;
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{
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if (!i.prefix[ADDR_PREFIX])
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bigdisp = Disp64;
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}
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else if ((flag_code == CODE_16BIT) ^ (i.prefix[ADDR_PREFIX] != 0))
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bigdisp = Disp16;
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i.types[this_operand] |= bigdisp;
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i.types[this_operand] |= bigdisp;
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exp = &disp_expressions[i.disp_operands];
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exp = &disp_expressions[i.disp_operands];
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@ -3596,15 +3610,28 @@ i386_index_check (operand_string)
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ok = 1;
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ok = 1;
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if (flag_code == CODE_64BIT)
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if (flag_code == CODE_64BIT)
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{
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{
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/* 64bit checks. */
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if (i.prefix[ADDR_PREFIX] == 0)
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if ((i.base_reg
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{
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&& ((i.base_reg->reg_type & Reg64) == 0)
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/* 64bit checks. */
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&& (i.base_reg->reg_type != BaseIndex
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if ((i.base_reg
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|| i.index_reg))
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&& ((i.base_reg->reg_type & Reg64) == 0)
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|| (i.index_reg
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&& (i.base_reg->reg_type != BaseIndex
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&& ((i.index_reg->reg_type & (Reg64|BaseIndex))
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|| i.index_reg))
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!= (Reg64|BaseIndex))))
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|| (i.index_reg
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ok = 0;
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&& ((i.index_reg->reg_type & (Reg64|BaseIndex))
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!= (Reg64|BaseIndex))))
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ok = 0;
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}
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else
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{
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/* 32bit checks. */
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if ((i.base_reg
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&& (i.base_reg->reg_type & (Reg32 | RegRex)) != Reg32)
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|| (i.index_reg
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&& ((i.index_reg->reg_type & (Reg32|BaseIndex|RegRex))
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!= (Reg32|BaseIndex))))
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ok = 0;
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}
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}
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}
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else
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else
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{
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{
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