* v850-tdep.c (elf-bfd.h, elf/v850.h): Include.
(R_149_REGNUM, E_NUM_OF_V850E2_REGS, E_SELID_1_R0_REGNUM) (E_SELID_1_R31_REGNUM, E_SELID_2_R0_REGNUM, E_SELID_2_R31_REGNUM) (E_SELID_3_R0_REGNUM, E_SELID_3_R31_REGNUM, E_SELID_4_R0_REGNUM) (E_SELID_4_R31_REGNUM, E_SELID_5_R0_REGNUM, E_SELID_5_R31_REGNUM) (E_SELID_6_R0_REGNUM, E_SELID_6_R31_REGNUM, E_SELID_7_R0_REGNUM, E_SELID_7_R31_REGNUM) (E_VR0_REGNUM, E_VR31_REGNUM, E_NUM_OF_V850E3V5_REGS): Define. (v850_abi, V850_ABI_GCC, V850_ABI_RH850): New enum and constants. (gdbarch_tdep): New struct. (v850e2_register_name): Use E_NUM_OF_V850E2_REGS instead of E_NUM_REGS. (v850e3v5_register_name): New function. (v850_register_type): v850e3v5 vector registers are 64-bits wide. (v850_use_struct_convention): Add `gdbarch' parameter. Add new code handling the struct return conventions for the RH850 ABI. Update all callers. (v850_eight_byte_align_p): New function. (v850_push_call_dummy): Push structs by value, not by reference for the RH850 ABI. Add support for eight byte alignment. (v850_dbtrap_breakpoint_from_pc): New function. (v850_gdbarch_init): Add ABI detection code. Register v850e3v5_register_name for the v850e3v5 architecture. Set the number of registers for v850e3v5. Register v850_dbtrap_breakpoint_from_pc as appropriate. (_initialize_gdbarch_init): Registration bfd_arch_v850_rh850.
This commit is contained in:
Kevin Buettner
parent
d445b2f6a4
commit
83b2706ad5
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@ -1,3 +1,31 @@
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2013-05-03 Kevin Buettner <kevinb@redhat.com>
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* v850-tdep.c (elf-bfd.h, elf/v850.h): Include.
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(R_149_REGNUM, E_NUM_OF_V850E2_REGS, E_SELID_1_R0_REGNUM)
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(E_SELID_1_R31_REGNUM, E_SELID_2_R0_REGNUM, E_SELID_2_R31_REGNUM)
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(E_SELID_3_R0_REGNUM, E_SELID_3_R31_REGNUM, E_SELID_4_R0_REGNUM)
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(E_SELID_4_R31_REGNUM, E_SELID_5_R0_REGNUM, E_SELID_5_R31_REGNUM)
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(E_SELID_6_R0_REGNUM, E_SELID_6_R31_REGNUM, E_SELID_7_R0_REGNUM, E_SELID_7_R31_REGNUM)
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(E_VR0_REGNUM, E_VR31_REGNUM, E_NUM_OF_V850E3V5_REGS): Define.
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(v850_abi, V850_ABI_GCC, V850_ABI_RH850): New enum and constants.
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(gdbarch_tdep): New struct.
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(v850e2_register_name): Use E_NUM_OF_V850E2_REGS instead of
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E_NUM_REGS.
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(v850e3v5_register_name): New function.
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(v850_register_type): v850e3v5 vector registers are 64-bits wide.
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(v850_use_struct_convention): Add `gdbarch' parameter. Add new
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code handling the struct return conventions for the RH850 ABI.
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Update all callers.
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(v850_eight_byte_align_p): New function.
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(v850_push_call_dummy): Push structs by value, not by reference
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for the RH850 ABI. Add support for eight byte alignment.
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(v850_dbtrap_breakpoint_from_pc): New function.
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(v850_gdbarch_init): Add ABI detection code. Register
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v850e3v5_register_name for the v850e3v5 architecture. Set the
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number of registers for v850e3v5. Register
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v850_dbtrap_breakpoint_from_pc as appropriate.
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(_initialize_gdbarch_init): Registration bfd_arch_v850_rh850.
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2013-05-03 Doug Evans <dje@google.com>
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* objfiles.c (objfile_relocate): Use gdb_bfd_count_sections instead
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309
gdb/v850-tdep.c
309
gdb/v850-tdep.c
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@ -32,6 +32,8 @@
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#include "regcache.h"
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#include "dis-asm.h"
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#include "osabi.h"
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#include "elf-bfd.h"
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#include "elf/v850.h"
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enum
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{
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@ -197,7 +199,39 @@ enum
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E_R146_REGNUM,
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E_R147_REGNUM,
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E_R148_REGNUM,
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E_NUM_REGS
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E_R149_REGNUM,
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E_NUM_OF_V850E2_REGS,
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/* v850e3v5 system registers, selID 1 thru 7. */
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E_SELID_1_R0_REGNUM = E_NUM_OF_V850E2_REGS,
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E_SELID_1_R31_REGNUM = E_SELID_1_R0_REGNUM + 31,
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E_SELID_2_R0_REGNUM,
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E_SELID_2_R31_REGNUM = E_SELID_2_R0_REGNUM + 31,
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E_SELID_3_R0_REGNUM,
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E_SELID_3_R31_REGNUM = E_SELID_3_R0_REGNUM + 31,
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E_SELID_4_R0_REGNUM,
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E_SELID_4_R31_REGNUM = E_SELID_4_R0_REGNUM + 31,
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E_SELID_5_R0_REGNUM,
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E_SELID_5_R31_REGNUM = E_SELID_5_R0_REGNUM + 31,
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E_SELID_6_R0_REGNUM,
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E_SELID_6_R31_REGNUM = E_SELID_6_R0_REGNUM + 31,
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E_SELID_7_R0_REGNUM,
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E_SELID_7_R31_REGNUM = E_SELID_7_R0_REGNUM + 31,
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/* v850e3v5 vector registers. */
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E_VR0_REGNUM,
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E_VR31_REGNUM = E_VR0_REGNUM + 31,
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E_NUM_OF_V850E3V5_REGS,
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/* Total number of possible registers. */
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E_NUM_REGS = E_NUM_OF_V850E3V5_REGS
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};
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enum
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E_MAX_RETTYPE_SIZE_IN_REGS = 2 * v850_reg_size
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};
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/* When v850 support was added to GCC in the late nineties, the intention
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was to follow the Green Hills ABI for v850. In fact, the authors of
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that support at the time thought that they were doing so. As far as
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I can tell, the calling conventions are correct, but the return value
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conventions were not quite right. Over time, the return value code
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in this file was modified to mostly reflect what GCC was actually
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doing instead of to actually follow the Green Hills ABI as it did
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when the code was first written.
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Renesas defined the RH850 ABI which they use in their compiler. It
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is similar to the original Green Hills ABI with some minor
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differences. */
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enum v850_abi
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{
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V850_ABI_GCC,
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V850_ABI_RH850
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};
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/* Architecture specific data. */
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struct gdbarch_tdep
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{
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/* Fields from the ELF header. */
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int e_flags;
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int e_machine;
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/* Which ABI are we using? */
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enum v850_abi abi;
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int eight_byte_align;
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};
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struct v850_frame_cache
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{
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/* Base address. */
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@ -311,11 +377,114 @@ v850e2_register_name (struct gdbarch *gdbarch, int regnum)
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"", "", "", "", "", "", "", "",
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"", "", "", "fpspc"
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};
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if (regnum < 0 || regnum >= E_NUM_REGS)
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if (regnum < 0 || regnum >= E_NUM_OF_V850E2_REGS)
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return NULL;
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return v850e2_reg_names[regnum];
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}
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/* Implement the "register_name" gdbarch method for v850e3v5. */
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static const char *
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v850e3v5_register_name (struct gdbarch *gdbarch, int regnum)
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{
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static const char *v850e3v5_reg_names[] =
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{
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/* General purpose registers. */
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"r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
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"r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15",
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"r16", "r17", "r18", "r19", "r20", "r21", "r22", "r23",
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"r24", "r25", "r26", "r27", "r28", "r29", "r30", "r31",
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/* selID 0, not including FPU registers. The FPU registers are
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listed later on. */
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"eipc", "eipsw", "fepc", "fepsw",
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"", "psw", "" /* fpsr */, "" /* fpepc */,
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"" /* fpst */, "" /* fpcc */, "" /* fpcfg */, "" /* fpec */,
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"sesr", "eiic", "feic", "",
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"ctpc", "ctpsw", "", "", "ctbp", "", "", "",
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"", "", "", "", "eiwr", "fewr", "", "bsel",
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/* PC. */
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"pc", "",
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/* v850e2 MPV bank. */
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"", "", "", "", "", "", "", "",
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"", "", "", "", "", "", "", "",
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"", "", "", "", "", "", "", "",
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"", "", "", "",
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/* Skip v850e2 MPU bank. It's tempting to reuse these, but we need
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32 entries for this bank. */
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"", "", "", "", "", "", "", "",
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"", "", "", "", "", "", "", "",
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"", "", "", "", "", "", "", "",
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"", "", "", "",
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/* FPU system registers. These are actually in selID 0, but
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are placed here to preserve register numbering compatibility
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with previous architectures. */
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"", "", "", "", "", "", "fpsr", "fpepc",
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"fpst", "fpcc", "fpcfg", "fpec", "", "", "", "",
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"", "", "", "", "", "", "", "",
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"", "", "", "",
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/* selID 1. */
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"mcfg0", "mcfg1", "rbase", "ebase", "intbp", "mctl", "pid", "fpipr",
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"", "", "tcsel", "sccfg", "scbp", "hvccfg", "hvcbp", "vsel",
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"vmprt0", "vmprt1", "vmprt2", "", "", "", "", "vmscctl",
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"vmsctbl0", "vmsctbl1", "vmsctbl2", "vmsctbl3", "", "", "", "",
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/* selID 2. */
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"htcfg0", "", "", "", "", "htctl", "mea", "asid",
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"mei", "ispr", "pmr", "icsr", "intcfg", "", "", "",
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"tlbsch", "", "", "", "", "", "", "htscctl",
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"htsctbl0", "htsctbl1", "htsctbl2", "htsctbl3",
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"htsctbl4", "htsctbl5", "htsctbl6", "htsctbl7",
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/* selID 3. */
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"", "", "", "", "", "", "", "",
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"", "", "", "", "", "", "", "",
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"", "", "", "", "", "", "", "",
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"", "", "", "", "", "", "", "",
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/* selID 4. */
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"tlbidx", "", "", "", "telo0", "telo1", "tehi0", "tehi1",
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"", "", "tlbcfg", "", "bwerrl", "bwerrh", "brerrl", "brerrh",
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"ictagl", "ictagh", "icdatl", "icdath",
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"dctagl", "dctagh", "dcdatl", "dcdath",
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"icctrl", "dcctrl", "iccfg", "dccfg", "icerr", "dcerr", "", "",
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/* selID 5. */
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"mpm", "mprc", "", "", "mpbrgn", "mptrgn", "", "",
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"mca", "mcs", "mcc", "mcr", "", "", "", "",
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"", "", "", "", "mpprt0", "mpprt1", "mpprt2", "",
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"", "", "", "", "", "", "", "",
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/* selID 6. */
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"mpla0", "mpua0", "mpat0", "", "mpla1", "mpua1", "mpat1", "",
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"mpla2", "mpua2", "mpat2", "", "mpla3", "mpua3", "mpat3", "",
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"mpla4", "mpua4", "mpat4", "", "mpla5", "mpua5", "mpat5", "",
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"mpla6", "mpua6", "mpat6", "", "mpla7", "mpua7", "mpat7", "",
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/* selID 7. */
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"mpla8", "mpua8", "mpat8", "", "mpla9", "mpua9", "mpat9", "",
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"mpla10", "mpua10", "mpat10", "", "mpla11", "mpua11", "mpat11", "",
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"mpla12", "mpua12", "mpat12", "", "mpla13", "mpua13", "mpat13", "",
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"mpla14", "mpua14", "mpat14", "", "mpla15", "mpua15", "mpat15", "",
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/* Vector Registers */
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"vr0", "vr1", "vr2", "vr3", "vr4", "vr5", "vr6", "vr7",
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"vr8", "vr9", "vr10", "vr11", "vr12", "vr13", "vr14", "vr15",
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"vr16", "vr17", "vr18", "vr19", "vr20", "vr21", "vr22", "vr23",
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"vr24", "vr25", "vr26", "vr27", "vr28", "vr29", "vr30", "vr31",
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};
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if (regnum < 0 || regnum >= E_NUM_OF_V850E3V5_REGS)
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return NULL;
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return v850e3v5_reg_names[regnum];
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}
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/* Returns the default type for register N. */
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static struct type *
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@ -323,6 +492,8 @@ v850_register_type (struct gdbarch *gdbarch, int regnum)
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{
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if (regnum == E_PC_REGNUM)
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return builtin_type (gdbarch)->builtin_func_ptr;
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else if (E_VR0_REGNUM <= regnum && regnum <= E_VR31_REGNUM)
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return builtin_type (gdbarch)->builtin_uint64;
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return builtin_type (gdbarch)->builtin_int32;
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}
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@ -335,12 +506,21 @@ v850_type_is_scalar (struct type *t)
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}
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/* Should call_function allocate stack space for a struct return? */
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static int
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v850_use_struct_convention (struct type *type)
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v850_use_struct_convention (struct gdbarch *gdbarch, struct type *type)
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{
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int i;
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struct type *fld_type, *tgt_type;
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if (gdbarch_tdep (gdbarch)->abi == V850_ABI_RH850)
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{
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if (v850_type_is_scalar (type) && TYPE_LENGTH(type) <= 8)
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return 0;
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/* Structs are never returned in registers for this ABI. */
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return 1;
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}
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/* 1. The value is greater than 8 bytes -> returned by copying. */
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if (TYPE_LENGTH (type) > 8)
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return 1;
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@ -397,7 +577,7 @@ v850_use_struct_convention (struct type *type)
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for (i = 0; i < TYPE_NFIELDS (type); ++i)
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{
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fld_type = TYPE_FIELD_TYPE (type, 0);
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if (!v850_use_struct_convention (fld_type))
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if (!v850_use_struct_convention (gdbarch, fld_type))
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return 0;
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}
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}
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@ -406,6 +586,7 @@ v850_use_struct_convention (struct type *type)
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}
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/* Structure for mapping bits in register lists to register numbers. */
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struct reg_list
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{
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long mask;
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@ -788,6 +969,29 @@ v850_skip_prologue (struct gdbarch *gdbarch, CORE_ADDR pc)
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return pc;
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}
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/* Return 1 if the data structure has any 8-byte fields that'll require
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the entire data structure to be aligned. Otherwise, return 0. */
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static int
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v850_eight_byte_align_p (struct type *type)
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{
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type = check_typedef (type);
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if (v850_type_is_scalar (type))
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return (TYPE_LENGTH (type) == 8);
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else
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{
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int i;
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for (i = 0; i < TYPE_NFIELDS (type); i++)
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{
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if (v850_eight_byte_align_p (TYPE_FIELD_TYPE (type, i)))
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return 1;
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}
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}
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return 0;
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}
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static CORE_ADDR
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v850_frame_align (struct gdbarch *ignore, CORE_ADDR sp)
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{
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@ -820,6 +1024,9 @@ v850_push_dummy_call (struct gdbarch *gdbarch,
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int len = 0;
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int stack_offset;
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if (gdbarch_tdep (gdbarch)->abi == V850_ABI_RH850)
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stack_offset = 0;
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else
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/* The offset onto the stack at which we will start copying parameters
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(after the registers are used up) begins at 16 rather than at zero.
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That's how the ABI is defined, though there's no indication that these
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@ -847,6 +1054,7 @@ v850_push_dummy_call (struct gdbarch *gdbarch,
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gdb_byte valbuf[v850_reg_size];
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if (!v850_type_is_scalar (value_type (*args))
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&& gdbarch_tdep (gdbarch)->abi == V850_ABI_GCC
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&& TYPE_LENGTH (value_type (*args)) > E_MAX_RETTYPE_SIZE_IN_REGS)
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{
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store_unsigned_integer (valbuf, 4, byte_order,
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@ -860,6 +1068,15 @@ v850_push_dummy_call (struct gdbarch *gdbarch,
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val = (gdb_byte *) value_contents (*args);
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}
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if (gdbarch_tdep (gdbarch)->eight_byte_align
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&& v850_eight_byte_align_p (value_type (*args)))
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{
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if (argreg <= E_ARGLAST_REGNUM && (argreg & 1))
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argreg++;
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else if (stack_offset & 0x4)
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stack_offset += 4;
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}
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while (len > 0)
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if (argreg <= E_ARGLAST_REGNUM)
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{
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@ -944,7 +1161,7 @@ v850_return_value (struct gdbarch *gdbarch, struct value *function,
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struct type *type, struct regcache *regcache,
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gdb_byte *readbuf, const gdb_byte *writebuf)
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{
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if (v850_use_struct_convention (type))
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if (v850_use_struct_convention (gdbarch, type))
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return RETURN_VALUE_STRUCT_CONVENTION;
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if (writebuf)
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v850_store_return_value (type, regcache, writebuf);
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@ -954,9 +1171,25 @@ v850_return_value (struct gdbarch *gdbarch, struct value *function,
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}
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const static unsigned char *
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v850_breakpoint_from_pc (struct gdbarch *gdbarch, CORE_ADDR *pcptr, int *lenptr)
|
||||
v850_breakpoint_from_pc (struct gdbarch *gdbarch, CORE_ADDR *pcptr,
|
||||
int *lenptr)
|
||||
{
|
||||
static unsigned char breakpoint[] = { 0x85, 0x05 };
|
||||
|
||||
*lenptr = sizeof (breakpoint);
|
||||
return breakpoint;
|
||||
}
|
||||
|
||||
/* Implement software breakpoints by using the dbtrap instruction.
|
||||
Older architectures had no such instruction. For those, an
|
||||
unconditional branch to self instruction is used. */
|
||||
|
||||
const static unsigned char *
|
||||
v850_dbtrap_breakpoint_from_pc (struct gdbarch *gdbarch,
|
||||
CORE_ADDR *pcptr, int *lenptr)
|
||||
{
|
||||
static unsigned char breakpoint[] = { 0x40, 0xf8 };
|
||||
|
||||
*lenptr = sizeof (breakpoint);
|
||||
return breakpoint;
|
||||
}
|
||||
|
|
@ -1120,12 +1353,51 @@ static struct gdbarch *
|
|||
v850_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
|
||||
{
|
||||
struct gdbarch *gdbarch;
|
||||
struct gdbarch_tdep *tdep;
|
||||
int e_flags, e_machine;
|
||||
|
||||
/* Change the register names based on the current machine type. */
|
||||
if (info.bfd_arch_info->arch != bfd_arch_v850)
|
||||
return NULL;
|
||||
/* Extract the elf_flags if available. */
|
||||
if (info.abfd != NULL
|
||||
&& bfd_get_flavour (info.abfd) == bfd_target_elf_flavour)
|
||||
{
|
||||
e_flags = elf_elfheader (info.abfd)->e_flags;
|
||||
e_machine = elf_elfheader (info.abfd)->e_machine;
|
||||
}
|
||||
else
|
||||
{
|
||||
e_flags = 0;
|
||||
e_machine = 0;
|
||||
}
|
||||
|
||||
gdbarch = gdbarch_alloc (&info, NULL);
|
||||
|
||||
/* Try to find the architecture in the list of already defined
|
||||
architectures. */
|
||||
for (arches = gdbarch_list_lookup_by_info (arches, &info);
|
||||
arches != NULL;
|
||||
arches = gdbarch_list_lookup_by_info (arches->next, &info))
|
||||
{
|
||||
if (gdbarch_tdep (arches->gdbarch)->e_flags != e_flags
|
||||
|| gdbarch_tdep (arches->gdbarch)->e_machine != e_machine)
|
||||
continue;
|
||||
|
||||
return arches->gdbarch;
|
||||
}
|
||||
tdep = (struct gdbarch_tdep *) xmalloc (sizeof (struct gdbarch_tdep));
|
||||
tdep->e_flags = e_flags;
|
||||
tdep->e_machine = e_machine;
|
||||
|
||||
switch (tdep->e_machine)
|
||||
{
|
||||
case EM_V800:
|
||||
tdep->abi = V850_ABI_RH850;
|
||||
break;
|
||||
default:
|
||||
tdep->abi = V850_ABI_GCC;
|
||||
break;
|
||||
}
|
||||
|
||||
tdep->eight_byte_align = (tdep->e_flags & EF_RH850_DATA_ALIGN8) ? 1 : 0;
|
||||
gdbarch = gdbarch_alloc (&info, tdep);
|
||||
|
||||
switch (info.bfd_arch_info->mach)
|
||||
{
|
||||
|
|
@ -1143,6 +1415,10 @@ v850_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
|
|||
set_gdbarch_register_name (gdbarch, v850e2_register_name);
|
||||
set_gdbarch_num_regs (gdbarch, E_NUM_REGS);
|
||||
break;
|
||||
case bfd_mach_v850e3v5:
|
||||
set_gdbarch_register_name (gdbarch, v850e3v5_register_name);
|
||||
set_gdbarch_num_regs (gdbarch, E_NUM_OF_V850E3V5_REGS);
|
||||
break;
|
||||
}
|
||||
|
||||
set_gdbarch_num_pseudo_regs (gdbarch, 0);
|
||||
|
|
@ -1166,7 +1442,17 @@ v850_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
|
|||
set_gdbarch_addr_bit (gdbarch, 4 * TARGET_CHAR_BIT);
|
||||
|
||||
set_gdbarch_inner_than (gdbarch, core_addr_lessthan);
|
||||
set_gdbarch_breakpoint_from_pc (gdbarch, v850_breakpoint_from_pc);
|
||||
switch (info.bfd_arch_info->mach)
|
||||
{
|
||||
case bfd_mach_v850e2:
|
||||
case bfd_mach_v850e2v3:
|
||||
case bfd_mach_v850e3v5:
|
||||
set_gdbarch_breakpoint_from_pc (gdbarch, v850_dbtrap_breakpoint_from_pc);
|
||||
break;
|
||||
default:
|
||||
set_gdbarch_breakpoint_from_pc (gdbarch, v850_breakpoint_from_pc);
|
||||
break;
|
||||
}
|
||||
|
||||
set_gdbarch_return_value (gdbarch, v850_return_value);
|
||||
set_gdbarch_push_dummy_call (gdbarch, v850_push_dummy_call);
|
||||
|
|
@ -1195,4 +1481,5 @@ void
|
|||
_initialize_v850_tdep (void)
|
||||
{
|
||||
register_gdbarch_init (bfd_arch_v850, v850_gdbarch_init);
|
||||
register_gdbarch_init (bfd_arch_v850_rh850, v850_gdbarch_init);
|
||||
}
|
||||
|
|
|
|||
Loading…
Reference in New Issue