OpenE2K
/
binutils-gdb
12
0
Fork 0
Code Issues Pull Requests Releases Wiki Activity

2002-11-18 Klee Dienes <kdienes@apple.com> 

* arc.h (arc_ext_opcodes): Declare as extern.
	(arc_ext_operands): Declare as extern.
	* i860.h (i860_opcodes): Declare as const.

2002-11-18  Klee Dienes  <kdienes@apple.com>

	* arc-opc.c (arc_ext_opcodes): Define.
	(arc_ext_operands): Define.
	* i386-dis.c (Suffix3DNow): Declare as const.
	* arm-opc.h (arm_opcodes): Declare as const.
	(thumb_opcodes): Declare as const.
	* h8500-opc.h (h8500_table): Declare as const.
	(h8500_table): Use a NULL for the opcode in the terminator, so
	that code testing (opcode->name) behaves correctly.
	* mcore-opc.h (mcore_table): Declare as const.
	* sh-opc.h (sh_table): Declare as const.
	* w65-opc.h (optable): Declare as const.
	* z8k-opc.h (z8k_table): Declare as const.
This commit is contained in:
Klee Dienes 2002-11-18 16:50:05 +00:00
parent 93509525ce
commit 84037f8c66
12 changed files with 38 additions and 12 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

6
include/opcode/ChangeLog
View File

@ -1,3 +1,9 @@
2002-11-18 Klee Dienes <kdienes@apple.com>
* arc.h (arc_ext_opcodes): Declare as extern.
(arc_ext_operands): Declare as extern.
* i860.h (i860_opcodes): Declare as const.
2002-11-18 Svein E. Seldal <Svein.Seldal@solidas.com>
* tic4x.h: File reordering. Added enhanced opcodes.

6
include/opcode/arc.h
View File

@ -98,7 +98,7 @@ struct arc_opcode {
/* this is an "insert at front" linked list per Metaware spec
that new definitions override older ones. */
struct arc_opcode *arc_ext_opcodes;
extern struct arc_opcode *arc_ext_opcodes;
struct arc_operand_value {
char *name; /* eg: "eq" */
@ -117,7 +117,9 @@ struct arc_operand_value {
struct arc_ext_operand_value {
struct arc_ext_operand_value *next;
struct arc_operand_value operand;
} *arc_ext_operands;
};
extern struct arc_ext_operand_value *arc_ext_operands;
struct arc_operand {
/* One of the insn format chars. */

2
include/opcode/i860.h
View File

@ -96,7 +96,7 @@ Kinds of operands:
The order of opcodes does not affect the disassembler. */
static struct i860_opcode i860_opcodes[] =
static const struct i860_opcode i860_opcodes[] =
{
/* REG-Format Instructions. */
{ "ld.c", 0x30000000, 0xcc000000, "c,d", 0 }, /* ld.c csrc2,idest */

15
opcodes/ChangeLog
View File

@ -1,3 +1,18 @@
2002-11-18 Klee Dienes <kdienes@apple.com>
* arc-opc.c (arc_ext_opcodes): Define.
(arc_ext_operands): Define.
* i386-dis.c (Suffix3DNow): Declare as const.
* arm-opc.h (arm_opcodes): Declare as const.
(thumb_opcodes): Declare as const.
* h8500-opc.h (h8500_table): Declare as const.
(h8500_table): Use a NULL for the opcode in the terminator, so
that code testing (opcode->name) behaves correctly.
* mcore-opc.h (mcore_table): Declare as const.
* sh-opc.h (sh_table): Declare as const.
* w65-opc.h (optable): Declare as const.
* z8k-opc.h (z8k_table): Declare as const.
2002-11-18 Svein E. Seldal <Svein.Seldal@solidas.com>
* tic4x-dis.c: Added support for enhanced and special insn.

3
opcodes/arc-opc.c
View File

@ -66,6 +66,9 @@ enum operand {OP_NONE,OP_REG,OP_SHIMM,OP_LIMM};
enum operand ls_operand[OPERANDS];
struct arc_opcode *arc_ext_opcodes;
struct arc_ext_operand_value *arc_ext_operands;
#define LS_VALUE 0
#define LS_DEST 0
#define LS_BASE 1

4
opcodes/arm-opc.h
View File

@ -79,7 +79,7 @@ Thumb specific format options:
/* Note: There is a partial ordering in this table - it must be searched from
the top to obtain a correct match. */
static struct arm_opcode arm_opcodes[] =
static const struct arm_opcode arm_opcodes[] =
{
/* ARM instructions. */
{0xe1a00000, 0xffffffff, "nop\t\t\t(mov r0,r0)"},
@ -395,7 +395,7 @@ static struct arm_opcode arm_opcodes[] =
#define BDISP(x) ((((x) & 0xffffff) ^ 0x800000) - 0x800000) /* 26 bit */
static struct thumb_opcode thumb_opcodes[] =
static const struct thumb_opcode thumb_opcodes[] =
{
/* Thumb instructions. */

4
opcodes/h8500-opc.h
View File

@ -157,7 +157,7 @@ typedef struct {
int length;
struct { unsigned char contents;unsigned char mask; char insert; } bytes[6];
} h8500_opcode_info;
h8500_opcode_info h8500_table[]
const h8500_opcode_info h8500_table[]
#ifdef ASSEMBLER_TABLE
#ifdef DEFINE_TABLE
={
@ -3852,7 +3852,7 @@ IMM16,RD 'a','E','D','D'
QIM,ABS16 'a','I','E','E'
RNIND_D16,RD 'a','E','D','D'
*/
{0,0,0,0,0,0,"",0,{0,0},0,{}}}
{0,0,0,0,0,0,NULL,0,{0,0},0,{}}}
#endif
;
#endif

2
opcodes/i386-dis.c
View File

@ -3970,7 +3970,7 @@ OP_XS (bytemode, sizeflag)
BadOp ();
}
static const char *Suffix3DNow[] = {
static const char *const Suffix3DNow[] = {
/* 00 */ NULL, NULL, NULL, NULL,
/* 04 */ NULL, NULL, NULL, NULL,
/* 08 */ NULL, NULL, NULL, NULL,

2
opcodes/mcore-opc.h
View File

@ -39,7 +39,7 @@ typedef struct inst
mcore_opcode_info;
#ifdef DEFINE_TABLE
mcore_opcode_info mcore_table[] =
const mcore_opcode_info mcore_table[] =
{
{ "bkpt", O0, 0, 0x0000 },
{ "sync", O0, 0, 0x0001 },

2
opcodes/sh-opc.h
View File

@ -170,7 +170,7 @@ typedef struct {
#ifdef DEFINE_TABLE
sh_opcode_info sh_table[] = {
const sh_opcode_info sh_table[] = {
/* 0111nnnni8*1.... add #<imm>,<REG_N> */{"add",{A_IMM,A_REG_N},{HEX_7,REG_N,IMM0_8}, arch_sh1_up},

2
opcodes/w65-opc.h
View File

@ -54,7 +54,7 @@ struct opinfo {
char *name;
int amode;
};
struct opinfo optable[257]={
const struct opinfo optable[257]={
#define O_adc 1
#define O_and 2
#define O_asl 3

2
opcodes/z8k-opc.h
View File

@ -258,7 +258,7 @@ int length;
int idx;
} opcode_entry_type;
#ifdef DEFINE_TABLE
opcode_entry_type z8k_table[] = {
const opcode_entry_type z8k_table[] = {
/* 1011 0101 ssss dddd *** adc rd,rs */