* config/tc-spu.c: Don't include opcode/spu.h.
(md_assemble): Set tc_fix_data.insn_tag and arg_format. (md_apply_fix): Adjust. * config/tc-spu.h: Include opcode/spu.h. (struct tc_fix_info): New. (TC_FIX_TYPE, TC_INIT_FIX_DATA): Adjust. (TC_FORCE_RELOCATION): Define.
This commit is contained in:
parent
aa7a0635f3
commit
840edabd6d
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@ -1,3 +1,13 @@
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2007-03-23 Alan Modra <amodra@bigpond.net.au>
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* config/tc-spu.c: Don't include opcode/spu.h.
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(md_assemble): Set tc_fix_data.insn_tag and arg_format.
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(md_apply_fix): Adjust.
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* config/tc-spu.h: Include opcode/spu.h.
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(struct tc_fix_info): New.
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(TC_FIX_TYPE, TC_INIT_FIX_DATA): Adjust.
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(TC_FORCE_RELOCATION): Define.
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2007-03-22 Joseph Myers <joseph@codesourcery.com>
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* doc/as.texinfo: Include VERSION_PACKAGE when reporting version.
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@ -1,6 +1,6 @@
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/* spu.c -- Assembler for the IBM Synergistic Processing Unit (SPU)
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Copyright 2006 Free Software Foundation, Inc.
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Copyright 2006, 2007 Free Software Foundation, Inc.
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This file is part of GAS, the GNU Assembler.
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#include "as.h"
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#include "safe-ctype.h"
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#include "subsegs.h"
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#include "opcode/spu.h"
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#include "dwarf2dbg.h"
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const struct spu_opcode spu_opcodes[] = {
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@ -366,7 +365,8 @@ md_assemble (char *op)
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&insn.exp[i],
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pcrel,
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reloc);
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fixP->tc_fix_data = insn.reloc_arg[i];
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fixP->tc_fix_data.arg_format = insn.reloc_arg[i];
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fixP->tc_fix_data.insn_tag = insn.tag;
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}
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dwarf2_emit_insn (4);
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}
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@ -941,10 +941,10 @@ md_apply_fix (fixS *fixP, valueT *valP, segT seg ATTRIBUTE_UNUSED)
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{
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fixP->fx_done = 1;
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res = 0;
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if (fixP->tc_fix_data > A_P)
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if (fixP->tc_fix_data.arg_format > A_P)
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{
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int hi = arg_encode[fixP->tc_fix_data].hi;
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int lo = arg_encode[fixP->tc_fix_data].lo;
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int hi = arg_encode[fixP->tc_fix_data.arg_format].hi;
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int lo = arg_encode[fixP->tc_fix_data.arg_format].lo;
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if (hi > lo && ((offsetT) val < lo || (offsetT) val > hi))
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as_bad_where (fixP->fx_file, fixP->fx_line,
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"Relocation doesn't fit. (relocation value = 0x%lx)",
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@ -21,6 +21,8 @@
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#define TC_SPU
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#include "opcode/spu.h"
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#ifdef OBJ_ELF
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#define TARGET_FORMAT "elf32-spu"
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#define TARGET_ARCH bfd_arch_spu
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#define TC_KEEP_FX_OFFSET
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/* #define TC_CONS_RELOC RELOC_32 */
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/* If defined, fixS will have a member named tc_fix_data of this type. */
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#define TC_FIX_TYPE int
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#define TC_INIT_FIX_DATA(FIXP) ((FIXP)->tc_fix_data = 0)
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struct tc_fix_info {
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unsigned short arg_format;
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unsigned short insn_tag;
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};
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/* fixS will have a member named tc_fix_data of this type. */
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#define TC_FIX_TYPE struct tc_fix_info
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#define TC_INIT_FIX_DATA(FIXP) \
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do \
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{ \
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(FIXP)->tc_fix_data.arg_format = 0; \
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(FIXP)->tc_fix_data.insn_tag = 0; \
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} \
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while (0)
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/* Don't reduce function symbols to section symbols. */
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#define tc_fix_adjustable(FIXP) (!S_IS_FUNCTION ((FIXP)->fx_addsy))
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/* Keep relocs on calls. Branches to function symbols are tail or
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sibling calls. */
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#define TC_FORCE_RELOCATION(FIXP) \
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((FIXP)->tc_fix_data.insn_tag == M_BRSL \
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|| (FIXP)->tc_fix_data.insn_tag == M_BRASL \
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|| (((FIXP)->tc_fix_data.insn_tag == M_BR \
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|| (FIXP)->tc_fix_data.insn_tag == M_BRA) \
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&& (FIXP)->fx_addsy != NULL \
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&& S_IS_FUNCTION ((FIXP)->fx_addsy)) \
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|| generic_force_reloc (FIXP))
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/* Values passed to md_apply_fix don't include symbol values. */
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#define MD_APPLY_SYM_VALUE(FIX) 0
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