Add check for invalid register in AVX512 gathers
AVX512 gather instructions shouldn't accept the same register for both destination and index. gas/ 2014-01-22 Michael Zolotukhin <michael.v.zolotukhin@gmail.com> PR gas/16489 * config/tc-i386.c (check_VecOperands): Add check for invalid register set in AVX512 gathers. gas/testsuite/ 2014-01-22 Michael Zolotukhin <michael.v.zolotukhin@gmail.com> PR gas/16489 * gas/i386/vgather-check.s: Add tests for AVX512 gathers. * gas/i386/x86-64-vgather-check.s: Likewise. * gas/i386/vgather-check-error.l: Update correspondingly. * gas/i386/vgather-check-none.d: Likewise. * gas/i386/vgather-check-warn.d: Likewise. * gas/i386/vgather-check-warn.e: Likewise. * gas/i386/vgather-check.d: Likewise. * gas/i386/x86-64-vgather-check-error.l: Likewise. * gas/i386/x86-64-vgather-check-none.d: Likewise. * gas/i386/x86-64-vgather-check-warn.d: Likewise. * gas/i386/x86-64-vgather-check-warn.e: Likewise. * gas/i386/x86-64-vgather-check.d: Likewise.
This commit is contained in:
Michael Zolotukhin
H.J. Lu
parent
237b092b9f
commit
8444f82a1d
@ -1,3 +1,9 @@
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2014-01-22 Michael Zolotukhin <michael.v.zolotukhin@gmail.com>
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PR gas/16489
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* config/tc-i386.c (check_VecOperands): Add check for invalid
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register set in AVX512 gathers.
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2014-01-22 Alan Modra <amodra@gmail.com>
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* config/tc-tic4x.c (md_shortopts): s/CONST/const/.
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@ -4395,6 +4395,22 @@ check_VecOperands (const insn_template *t)
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}
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as_warn (_("mask, index, and destination registers should be distinct"));
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}
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else if (i.reg_operands == 1 && i.mask)
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{
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if ((i.types[1].bitfield.regymm
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|| i.types[1].bitfield.regzmm)
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&& (register_number (i.op[1].regs)
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== register_number (i.index_reg)))
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{
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if (operand_check == check_error)
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{
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i.error = invalid_vector_register_set;
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return 1;
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}
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if (operand_check != check_none)
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as_warn (_("index and destination registers should be distinct"));
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}
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}
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}
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/* Check if broadcast is supported by the instruction and is applied
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@ -1,3 +1,19 @@
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2014-01-22 Michael Zolotukhin <michael.v.zolotukhin@gmail.com>
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PR gas/16489
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* gas/i386/vgather-check.s: Add tests for AVX512 gathers.
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* gas/i386/x86-64-vgather-check.s: Likewise.
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* gas/i386/vgather-check-error.l: Update correspondingly.
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* gas/i386/vgather-check-none.d: Likewise.
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* gas/i386/vgather-check-warn.d: Likewise.
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* gas/i386/vgather-check-warn.e: Likewise.
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* gas/i386/vgather-check.d: Likewise.
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* gas/i386/x86-64-vgather-check-error.l: Likewise.
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* gas/i386/x86-64-vgather-check-none.d: Likewise.
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* gas/i386/x86-64-vgather-check-warn.d: Likewise.
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* gas/i386/x86-64-vgather-check-warn.e: Likewise.
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* gas/i386/x86-64-vgather-check.d: Likewise.
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2014-01-17 Will Newton <will.newton@linaro.org>
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* gas/arm/armv8-a+fp.d: Correct encoding of vcvta.s32.f64.
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@ -2,3 +2,11 @@
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.*:6: Error: .*
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.*:7: Error: .*
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.*:8: Error: .*
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.*:12: Error: .*
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.*:14: Error: .*
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.*:16: Error: .*
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.*:18: Error: .*
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.*:20: Error: .*
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.*:22: Error: .*
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.*:24: Error: .*
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.*:26: Error: .*
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@ -11,4 +11,22 @@ Disassembly of section .text:
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[ ]*[a-f0-9]+:[ ]+c4 e2 69 92 14 48[ ]+vgatherdps %xmm2,\(%eax,%xmm1,2\),%xmm2
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[ ]*[a-f0-9]+:[ ]+c4 e2 71 92 04 88[ ]+vgatherdps %xmm1,\(%eax,%xmm1,4\),%xmm0
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[ ]*[a-f0-9]+:[ ]+c4 e2 69 92 0c c8[ ]+vgatherdps %xmm2,\(%eax,%xmm1,8\),%xmm1
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00000018 <avx512vgather>:
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[ ]+[a-f0-9]+:[ ]+62 f2 fd 49 92 b4 fd 7b 00 00 00[ ]+vgatherdpd 0x7b\(%ebp,%ymm7,8\),%zmm6\{%k1\}
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[ ]+[a-f0-9]+:[ ]+62 f2 fd 49 92 b4 f5 7b 00 00 00[ ]+vgatherdpd 0x7b\(%ebp,%ymm6,8\),%zmm6\{%k1\}
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[ ]+[a-f0-9]+:[ ]+62 f2 7d 49 92 b4 fd 7b 00 00 00[ ]+vgatherdps 0x7b\(%ebp,%zmm7,8\),%zmm6\{%k1\}
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[ ]+[a-f0-9]+:[ ]+62 f2 7d 49 92 b4 f5 7b 00 00 00[ ]+vgatherdps 0x7b\(%ebp,%zmm6,8\),%zmm6\{%k1\}
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[ ]+[a-f0-9]+:[ ]+62 f2 fd 49 93 b4 fd 7b 00 00 00[ ]+vgatherqpd 0x7b\(%ebp,%zmm7,8\),%zmm6\{%k1\}
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[ ]+[a-f0-9]+:[ ]+62 f2 fd 49 93 b4 f5 7b 00 00 00[ ]+vgatherqpd 0x7b\(%ebp,%zmm6,8\),%zmm6\{%k1\}
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[ ]+[a-f0-9]+:[ ]+62 f2 7d 49 93 b4 fd 7b 00 00 00[ ]+vgatherqps 0x7b\(%ebp,%zmm7,8\),%ymm6\{%k1\}
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[ ]+[a-f0-9]+:[ ]+62 f2 7d 49 93 b4 f5 7b 00 00 00[ ]+vgatherqps 0x7b\(%ebp,%zmm6,8\),%ymm6\{%k1\}
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[ ]+[a-f0-9]+:[ ]+62 f2 7d 49 90 b4 fd 7b 00 00 00[ ]+vpgatherdd 0x7b\(%ebp,%zmm7,8\),%zmm6\{%k1\}
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[ ]+[a-f0-9]+:[ ]+62 f2 7d 49 90 b4 f5 7b 00 00 00[ ]+vpgatherdd 0x7b\(%ebp,%zmm6,8\),%zmm6\{%k1\}
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[ ]+[a-f0-9]+:[ ]+62 f2 fd 49 90 b4 fd 7b 00 00 00[ ]+vpgatherdq 0x7b\(%ebp,%ymm7,8\),%zmm6\{%k1\}
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[ ]+[a-f0-9]+:[ ]+62 f2 fd 49 90 b4 f5 7b 00 00 00[ ]+vpgatherdq 0x7b\(%ebp,%ymm6,8\),%zmm6\{%k1\}
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[ ]+[a-f0-9]+:[ ]+62 f2 7d 49 91 b4 fd 7b 00 00 00[ ]+vpgatherqd 0x7b\(%ebp,%zmm7,8\),%ymm6\{%k1\}
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[ ]+[a-f0-9]+:[ ]+62 f2 7d 49 91 b4 f5 7b 00 00 00[ ]+vpgatherqd 0x7b\(%ebp,%zmm6,8\),%ymm6\{%k1\}
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[ ]+[a-f0-9]+:[ ]+62 f2 fd 49 91 b4 fd 7b 00 00 00[ ]+vpgatherqq 0x7b\(%ebp,%zmm7,8\),%zmm6\{%k1\}
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[ ]+[a-f0-9]+:[ ]+62 f2 fd 49 91 b4 f5 7b 00 00 00[ ]+vpgatherqq 0x7b\(%ebp,%zmm6,8\),%zmm6\{%k1\}
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#pass
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@ -12,4 +12,22 @@ Disassembly of section .text:
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[ ]*[a-f0-9]+:[ ]+c4 e2 69 92 14 48[ ]+vgatherdps %xmm2,\(%eax,%xmm1,2\),%xmm2
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[ ]*[a-f0-9]+:[ ]+c4 e2 71 92 04 88[ ]+vgatherdps %xmm1,\(%eax,%xmm1,4\),%xmm0
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[ ]*[a-f0-9]+:[ ]+c4 e2 69 92 0c c8[ ]+vgatherdps %xmm2,\(%eax,%xmm1,8\),%xmm1
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00000018 <avx512vgather>:
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[ ]+[a-f0-9]+:[ ]+62 f2 fd 49 92 b4 fd 7b 00 00 00[ ]+vgatherdpd 0x7b\(%ebp,%ymm7,8\),%zmm6\{%k1\}
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[ ]+[a-f0-9]+:[ ]+62 f2 fd 49 92 b4 f5 7b 00 00 00[ ]+vgatherdpd 0x7b\(%ebp,%ymm6,8\),%zmm6\{%k1\}
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[ ]+[a-f0-9]+:[ ]+62 f2 7d 49 92 b4 fd 7b 00 00 00[ ]+vgatherdps 0x7b\(%ebp,%zmm7,8\),%zmm6\{%k1\}
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[ ]+[a-f0-9]+:[ ]+62 f2 7d 49 92 b4 f5 7b 00 00 00[ ]+vgatherdps 0x7b\(%ebp,%zmm6,8\),%zmm6\{%k1\}
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[ ]+[a-f0-9]+:[ ]+62 f2 fd 49 93 b4 fd 7b 00 00 00[ ]+vgatherqpd 0x7b\(%ebp,%zmm7,8\),%zmm6\{%k1\}
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[ ]+[a-f0-9]+:[ ]+62 f2 fd 49 93 b4 f5 7b 00 00 00[ ]+vgatherqpd 0x7b\(%ebp,%zmm6,8\),%zmm6\{%k1\}
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[ ]+[a-f0-9]+:[ ]+62 f2 7d 49 93 b4 fd 7b 00 00 00[ ]+vgatherqps 0x7b\(%ebp,%zmm7,8\),%ymm6\{%k1\}
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[ ]+[a-f0-9]+:[ ]+62 f2 7d 49 93 b4 f5 7b 00 00 00[ ]+vgatherqps 0x7b\(%ebp,%zmm6,8\),%ymm6\{%k1\}
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[ ]+[a-f0-9]+:[ ]+62 f2 7d 49 90 b4 fd 7b 00 00 00[ ]+vpgatherdd 0x7b\(%ebp,%zmm7,8\),%zmm6\{%k1\}
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[ ]+[a-f0-9]+:[ ]+62 f2 7d 49 90 b4 f5 7b 00 00 00[ ]+vpgatherdd 0x7b\(%ebp,%zmm6,8\),%zmm6\{%k1\}
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[ ]+[a-f0-9]+:[ ]+62 f2 fd 49 90 b4 fd 7b 00 00 00[ ]+vpgatherdq 0x7b\(%ebp,%ymm7,8\),%zmm6\{%k1\}
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[ ]+[a-f0-9]+:[ ]+62 f2 fd 49 90 b4 f5 7b 00 00 00[ ]+vpgatherdq 0x7b\(%ebp,%ymm6,8\),%zmm6\{%k1\}
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[ ]+[a-f0-9]+:[ ]+62 f2 7d 49 91 b4 fd 7b 00 00 00[ ]+vpgatherqd 0x7b\(%ebp,%zmm7,8\),%ymm6\{%k1\}
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[ ]+[a-f0-9]+:[ ]+62 f2 7d 49 91 b4 f5 7b 00 00 00[ ]+vpgatherqd 0x7b\(%ebp,%zmm6,8\),%ymm6\{%k1\}
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[ ]+[a-f0-9]+:[ ]+62 f2 fd 49 91 b4 fd 7b 00 00 00[ ]+vpgatherqq 0x7b\(%ebp,%zmm7,8\),%zmm6\{%k1\}
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[ ]+[a-f0-9]+:[ ]+62 f2 fd 49 91 b4 f5 7b 00 00 00[ ]+vpgatherqq 0x7b\(%ebp,%zmm6,8\),%zmm6\{%k1\}
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#pass
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@ -2,3 +2,11 @@
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.*:6: Warning: .*
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.*:7: Warning: .*
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.*:8: Warning: .*
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.*:12: Warning: .*
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.*:14: Warning: .*
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.*:16: Warning: .*
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.*:18: Warning: .*
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.*:20: Warning: .*
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.*:22: Warning: .*
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.*:24: Warning: .*
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.*:26: Warning: .*
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@ -11,4 +11,22 @@ Disassembly of section .text:
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[ ]*[a-f0-9]+:[ ]+c4 e2 69 92 14 48[ ]+vgatherdps %xmm2,\(%eax,%xmm1,2\),%xmm2
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[ ]*[a-f0-9]+:[ ]+c4 e2 71 92 04 88[ ]+vgatherdps %xmm1,\(%eax,%xmm1,4\),%xmm0
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[ ]*[a-f0-9]+:[ ]+c4 e2 69 92 0c c8[ ]+vgatherdps %xmm2,\(%eax,%xmm1,8\),%xmm1
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00000018 <avx512vgather>:
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[ ]+[a-f0-9]+:[ ]+62 f2 fd 49 92 b4 fd 7b 00 00 00[ ]+vgatherdpd 0x7b\(%ebp,%ymm7,8\),%zmm6\{%k1\}
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[ ]+[a-f0-9]+:[ ]+62 f2 fd 49 92 b4 f5 7b 00 00 00[ ]+vgatherdpd 0x7b\(%ebp,%ymm6,8\),%zmm6\{%k1\}
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[ ]+[a-f0-9]+:[ ]+62 f2 7d 49 92 b4 fd 7b 00 00 00[ ]+vgatherdps 0x7b\(%ebp,%zmm7,8\),%zmm6\{%k1\}
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[ ]+[a-f0-9]+:[ ]+62 f2 7d 49 92 b4 f5 7b 00 00 00[ ]+vgatherdps 0x7b\(%ebp,%zmm6,8\),%zmm6\{%k1\}
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[ ]+[a-f0-9]+:[ ]+62 f2 fd 49 93 b4 fd 7b 00 00 00[ ]+vgatherqpd 0x7b\(%ebp,%zmm7,8\),%zmm6\{%k1\}
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[ ]+[a-f0-9]+:[ ]+62 f2 fd 49 93 b4 f5 7b 00 00 00[ ]+vgatherqpd 0x7b\(%ebp,%zmm6,8\),%zmm6\{%k1\}
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[ ]+[a-f0-9]+:[ ]+62 f2 7d 49 93 b4 fd 7b 00 00 00[ ]+vgatherqps 0x7b\(%ebp,%zmm7,8\),%ymm6\{%k1\}
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[ ]+[a-f0-9]+:[ ]+62 f2 7d 49 93 b4 f5 7b 00 00 00[ ]+vgatherqps 0x7b\(%ebp,%zmm6,8\),%ymm6\{%k1\}
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[ ]+[a-f0-9]+:[ ]+62 f2 7d 49 90 b4 fd 7b 00 00 00[ ]+vpgatherdd 0x7b\(%ebp,%zmm7,8\),%zmm6\{%k1\}
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[ ]+[a-f0-9]+:[ ]+62 f2 7d 49 90 b4 f5 7b 00 00 00[ ]+vpgatherdd 0x7b\(%ebp,%zmm6,8\),%zmm6\{%k1\}
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[ ]+[a-f0-9]+:[ ]+62 f2 fd 49 90 b4 fd 7b 00 00 00[ ]+vpgatherdq 0x7b\(%ebp,%ymm7,8\),%zmm6\{%k1\}
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[ ]+[a-f0-9]+:[ ]+62 f2 fd 49 90 b4 f5 7b 00 00 00[ ]+vpgatherdq 0x7b\(%ebp,%ymm6,8\),%zmm6\{%k1\}
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[ ]+[a-f0-9]+:[ ]+62 f2 7d 49 91 b4 fd 7b 00 00 00[ ]+vpgatherqd 0x7b\(%ebp,%zmm7,8\),%ymm6\{%k1\}
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[ ]+[a-f0-9]+:[ ]+62 f2 7d 49 91 b4 f5 7b 00 00 00[ ]+vpgatherqd 0x7b\(%ebp,%zmm6,8\),%ymm6\{%k1\}
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[ ]+[a-f0-9]+:[ ]+62 f2 fd 49 91 b4 fd 7b 00 00 00[ ]+vpgatherqq 0x7b\(%ebp,%zmm7,8\),%zmm6\{%k1\}
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[ ]+[a-f0-9]+:[ ]+62 f2 fd 49 91 b4 f5 7b 00 00 00[ ]+vpgatherqq 0x7b\(%ebp,%zmm6,8\),%zmm6\{%k1\}
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#pass
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@ -6,3 +6,21 @@ vgather:
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vgatherdps %xmm2,(%eax,%xmm1,2),%xmm2
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vgatherdps %xmm1,(%eax,%xmm1,4),%xmm0
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vgatherdps %xmm2,(%eax,%xmm1,8),%xmm1
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avx512vgather:
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vgatherdpd 123(%ebp,%ymm7,8), %zmm6{%k1}
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vgatherdpd 123(%ebp,%ymm6,8), %zmm6{%k1}
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vgatherdps 123(%ebp,%zmm7,8), %zmm6{%k1}
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vgatherdps 123(%ebp,%zmm6,8), %zmm6{%k1}
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vgatherqpd 123(%ebp,%zmm7,8), %zmm6{%k1}
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vgatherqpd 123(%ebp,%zmm6,8), %zmm6{%k1}
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vgatherqps 123(%ebp,%zmm7,8), %ymm6{%k1}
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vgatherqps 123(%ebp,%zmm6,8), %ymm6{%k1}
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vpgatherdd 123(%ebp,%zmm7,8), %zmm6{%k1}
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vpgatherdd 123(%ebp,%zmm6,8), %zmm6{%k1}
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vpgatherdq 123(%ebp,%ymm7,8), %zmm6{%k1}
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vpgatherdq 123(%ebp,%ymm6,8), %zmm6{%k1}
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vpgatherqd 123(%ebp,%zmm7,8), %ymm6{%k1}
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vpgatherqd 123(%ebp,%zmm6,8), %ymm6{%k1}
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vpgatherqq 123(%ebp,%zmm7,8), %zmm6{%k1}
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vpgatherqq 123(%ebp,%zmm6,8), %zmm6{%k1}
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@ -2,3 +2,11 @@
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.*:6: Error: .*
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.*:8: Error: .*
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.*:10: Error: .*
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.*:15: Error: .*
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.*:17: Error: .*
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.*:19: Error: .*
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.*:21: Error: .*
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.*:23: Error: .*
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.*:25: Error: .*
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.*:27: Error: .*
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.*:29: Error: .*
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@ -14,4 +14,22 @@ Disassembly of section .text:
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[ ]*[a-f0-9]+:[ ]+c4 e2 31 92 04 88[ ]+vgatherdps %xmm9,\(%rax,%xmm1,4\),%xmm0
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[ ]*[a-f0-9]+:[ ]+c4 e2 69 92 0c c8[ ]+vgatherdps %xmm2,\(%rax,%xmm1,8\),%xmm1
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[ ]*[a-f0-9]+:[ ]+c4 62 69 92 0c c8[ ]+vgatherdps %xmm2,\(%rax,%xmm1,8\),%xmm9
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000000000000002a <avx512vgather>:
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[ ]+[a-f0-9]+:[ ]+62 e2 fd 41 92 84 cd 7b 00 00 00[ ]+vgatherdpd 0x7b\(%rbp,%ymm17,8\),%zmm16\{%k1\}
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[ ]+[a-f0-9]+:[ ]+62 e2 fd 41 92 84 c5 7b 00 00 00[ ]+vgatherdpd 0x7b\(%rbp,%ymm16,8\),%zmm16\{%k1\}
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[ ]+[a-f0-9]+:[ ]+62 e2 7d 41 92 84 cd 7b 00 00 00[ ]+vgatherdps 0x7b\(%rbp,%zmm17,8\),%zmm16\{%k1\}
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[ ]+[a-f0-9]+:[ ]+62 e2 7d 41 92 84 c5 7b 00 00 00[ ]+vgatherdps 0x7b\(%rbp,%zmm16,8\),%zmm16\{%k1\}
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[ ]+[a-f0-9]+:[ ]+62 e2 fd 41 93 84 cd 7b 00 00 00[ ]+vgatherqpd 0x7b\(%rbp,%zmm17,8\),%zmm16\{%k1\}
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[ ]+[a-f0-9]+:[ ]+62 e2 fd 41 93 84 c5 7b 00 00 00[ ]+vgatherqpd 0x7b\(%rbp,%zmm16,8\),%zmm16\{%k1\}
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[ ]+[a-f0-9]+:[ ]+62 e2 7d 41 93 84 cd 7b 00 00 00[ ]+vgatherqps 0x7b\(%rbp,%zmm17,8\),%ymm16\{%k1\}
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[ ]+[a-f0-9]+:[ ]+62 e2 7d 41 93 84 c5 7b 00 00 00[ ]+vgatherqps 0x7b\(%rbp,%zmm16,8\),%ymm16\{%k1\}
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[ ]+[a-f0-9]+:[ ]+62 e2 7d 41 90 84 cd 7b 00 00 00[ ]+vpgatherdd 0x7b\(%rbp,%zmm17,8\),%zmm16\{%k1\}
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[ ]+[a-f0-9]+:[ ]+62 e2 7d 41 90 84 c5 7b 00 00 00[ ]+vpgatherdd 0x7b\(%rbp,%zmm16,8\),%zmm16\{%k1\}
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[ ]+[a-f0-9]+:[ ]+62 e2 fd 41 90 84 cd 7b 00 00 00[ ]+vpgatherdq 0x7b\(%rbp,%ymm17,8\),%zmm16\{%k1\}
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[ ]+[a-f0-9]+:[ ]+62 e2 fd 41 90 84 c5 7b 00 00 00[ ]+vpgatherdq 0x7b\(%rbp,%ymm16,8\),%zmm16\{%k1\}
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[ ]+[a-f0-9]+:[ ]+62 e2 7d 41 91 84 cd 7b 00 00 00[ ]+vpgatherqd 0x7b\(%rbp,%zmm17,8\),%ymm16\{%k1\}
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[ ]+[a-f0-9]+:[ ]+62 e2 7d 41 91 84 c5 7b 00 00 00[ ]+vpgatherqd 0x7b\(%rbp,%zmm16,8\),%ymm16\{%k1\}
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[ ]+[a-f0-9]+:[ ]+62 e2 fd 41 91 84 cd 7b 00 00 00[ ]+vpgatherqq 0x7b\(%rbp,%zmm17,8\),%zmm16\{%k1\}
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[ ]+[a-f0-9]+:[ ]+62 e2 fd 41 91 84 c5 7b 00 00 00[ ]+vpgatherqq 0x7b\(%rbp,%zmm16,8\),%zmm16\{%k1\}
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#pass
|
||||
|
||||
@ -15,4 +15,22 @@ Disassembly of section .text:
|
||||
[ ]*[a-f0-9]+:[ ]+c4 e2 31 92 04 88[ ]+vgatherdps %xmm9,\(%rax,%xmm1,4\),%xmm0
|
||||
[ ]*[a-f0-9]+:[ ]+c4 e2 69 92 0c c8[ ]+vgatherdps %xmm2,\(%rax,%xmm1,8\),%xmm1
|
||||
[ ]*[a-f0-9]+:[ ]+c4 62 69 92 0c c8[ ]+vgatherdps %xmm2,\(%rax,%xmm1,8\),%xmm9
|
||||
|
||||
000000000000002a <avx512vgather>:
|
||||
[ ]+[a-f0-9]+:[ ]+62 e2 fd 41 92 84 cd 7b 00 00 00[ ]+vgatherdpd 0x7b\(%rbp,%ymm17,8\),%zmm16\{%k1\}
|
||||
[ ]+[a-f0-9]+:[ ]+62 e2 fd 41 92 84 c5 7b 00 00 00[ ]+vgatherdpd 0x7b\(%rbp,%ymm16,8\),%zmm16\{%k1\}
|
||||
[ ]+[a-f0-9]+:[ ]+62 e2 7d 41 92 84 cd 7b 00 00 00[ ]+vgatherdps 0x7b\(%rbp,%zmm17,8\),%zmm16\{%k1\}
|
||||
[ ]+[a-f0-9]+:[ ]+62 e2 7d 41 92 84 c5 7b 00 00 00[ ]+vgatherdps 0x7b\(%rbp,%zmm16,8\),%zmm16\{%k1\}
|
||||
[ ]+[a-f0-9]+:[ ]+62 e2 fd 41 93 84 cd 7b 00 00 00[ ]+vgatherqpd 0x7b\(%rbp,%zmm17,8\),%zmm16\{%k1\}
|
||||
[ ]+[a-f0-9]+:[ ]+62 e2 fd 41 93 84 c5 7b 00 00 00[ ]+vgatherqpd 0x7b\(%rbp,%zmm16,8\),%zmm16\{%k1\}
|
||||
[ ]+[a-f0-9]+:[ ]+62 e2 7d 41 93 84 cd 7b 00 00 00[ ]+vgatherqps 0x7b\(%rbp,%zmm17,8\),%ymm16\{%k1\}
|
||||
[ ]+[a-f0-9]+:[ ]+62 e2 7d 41 93 84 c5 7b 00 00 00[ ]+vgatherqps 0x7b\(%rbp,%zmm16,8\),%ymm16\{%k1\}
|
||||
[ ]+[a-f0-9]+:[ ]+62 e2 7d 41 90 84 cd 7b 00 00 00[ ]+vpgatherdd 0x7b\(%rbp,%zmm17,8\),%zmm16\{%k1\}
|
||||
[ ]+[a-f0-9]+:[ ]+62 e2 7d 41 90 84 c5 7b 00 00 00[ ]+vpgatherdd 0x7b\(%rbp,%zmm16,8\),%zmm16\{%k1\}
|
||||
[ ]+[a-f0-9]+:[ ]+62 e2 fd 41 90 84 cd 7b 00 00 00[ ]+vpgatherdq 0x7b\(%rbp,%ymm17,8\),%zmm16\{%k1\}
|
||||
[ ]+[a-f0-9]+:[ ]+62 e2 fd 41 90 84 c5 7b 00 00 00[ ]+vpgatherdq 0x7b\(%rbp,%ymm16,8\),%zmm16\{%k1\}
|
||||
[ ]+[a-f0-9]+:[ ]+62 e2 7d 41 91 84 cd 7b 00 00 00[ ]+vpgatherqd 0x7b\(%rbp,%zmm17,8\),%ymm16\{%k1\}
|
||||
[ ]+[a-f0-9]+:[ ]+62 e2 7d 41 91 84 c5 7b 00 00 00[ ]+vpgatherqd 0x7b\(%rbp,%zmm16,8\),%ymm16\{%k1\}
|
||||
[ ]+[a-f0-9]+:[ ]+62 e2 fd 41 91 84 cd 7b 00 00 00[ ]+vpgatherqq 0x7b\(%rbp,%zmm17,8\),%zmm16\{%k1\}
|
||||
[ ]+[a-f0-9]+:[ ]+62 e2 fd 41 91 84 c5 7b 00 00 00[ ]+vpgatherqq 0x7b\(%rbp,%zmm16,8\),%zmm16\{%k1\}
|
||||
#pass
|
||||
|
||||
@ -2,3 +2,11 @@
|
||||
.*:6: Warning: .*
|
||||
.*:8: Warning: .*
|
||||
.*:10: Warning: .*
|
||||
.*:15: Warning: .*
|
||||
.*:17: Warning: .*
|
||||
.*:19: Warning: .*
|
||||
.*:21: Warning: .*
|
||||
.*:23: Warning: .*
|
||||
.*:25: Warning: .*
|
||||
.*:27: Warning: .*
|
||||
.*:29: Warning: .*
|
||||
|
||||
@ -14,4 +14,22 @@ Disassembly of section .text:
|
||||
[ ]*[a-f0-9]+:[ ]+c4 e2 31 92 04 88[ ]+vgatherdps %xmm9,\(%rax,%xmm1,4\),%xmm0
|
||||
[ ]*[a-f0-9]+:[ ]+c4 e2 69 92 0c c8[ ]+vgatherdps %xmm2,\(%rax,%xmm1,8\),%xmm1
|
||||
[ ]*[a-f0-9]+:[ ]+c4 62 69 92 0c c8[ ]+vgatherdps %xmm2,\(%rax,%xmm1,8\),%xmm9
|
||||
|
||||
000000000000002a <avx512vgather>:
|
||||
[ ]+[a-f0-9]+:[ ]+62 e2 fd 41 92 84 cd 7b 00 00 00[ ]+vgatherdpd 0x7b\(%rbp,%ymm17,8\),%zmm16\{%k1\}
|
||||
[ ]+[a-f0-9]+:[ ]+62 e2 fd 41 92 84 c5 7b 00 00 00[ ]+vgatherdpd 0x7b\(%rbp,%ymm16,8\),%zmm16\{%k1\}
|
||||
[ ]+[a-f0-9]+:[ ]+62 e2 7d 41 92 84 cd 7b 00 00 00[ ]+vgatherdps 0x7b\(%rbp,%zmm17,8\),%zmm16\{%k1\}
|
||||
[ ]+[a-f0-9]+:[ ]+62 e2 7d 41 92 84 c5 7b 00 00 00[ ]+vgatherdps 0x7b\(%rbp,%zmm16,8\),%zmm16\{%k1\}
|
||||
[ ]+[a-f0-9]+:[ ]+62 e2 fd 41 93 84 cd 7b 00 00 00[ ]+vgatherqpd 0x7b\(%rbp,%zmm17,8\),%zmm16\{%k1\}
|
||||
[ ]+[a-f0-9]+:[ ]+62 e2 fd 41 93 84 c5 7b 00 00 00[ ]+vgatherqpd 0x7b\(%rbp,%zmm16,8\),%zmm16\{%k1\}
|
||||
[ ]+[a-f0-9]+:[ ]+62 e2 7d 41 93 84 cd 7b 00 00 00[ ]+vgatherqps 0x7b\(%rbp,%zmm17,8\),%ymm16\{%k1\}
|
||||
[ ]+[a-f0-9]+:[ ]+62 e2 7d 41 93 84 c5 7b 00 00 00[ ]+vgatherqps 0x7b\(%rbp,%zmm16,8\),%ymm16\{%k1\}
|
||||
[ ]+[a-f0-9]+:[ ]+62 e2 7d 41 90 84 cd 7b 00 00 00[ ]+vpgatherdd 0x7b\(%rbp,%zmm17,8\),%zmm16\{%k1\}
|
||||
[ ]+[a-f0-9]+:[ ]+62 e2 7d 41 90 84 c5 7b 00 00 00[ ]+vpgatherdd 0x7b\(%rbp,%zmm16,8\),%zmm16\{%k1\}
|
||||
[ ]+[a-f0-9]+:[ ]+62 e2 fd 41 90 84 cd 7b 00 00 00[ ]+vpgatherdq 0x7b\(%rbp,%ymm17,8\),%zmm16\{%k1\}
|
||||
[ ]+[a-f0-9]+:[ ]+62 e2 fd 41 90 84 c5 7b 00 00 00[ ]+vpgatherdq 0x7b\(%rbp,%ymm16,8\),%zmm16\{%k1\}
|
||||
[ ]+[a-f0-9]+:[ ]+62 e2 7d 41 91 84 cd 7b 00 00 00[ ]+vpgatherqd 0x7b\(%rbp,%zmm17,8\),%ymm16\{%k1\}
|
||||
[ ]+[a-f0-9]+:[ ]+62 e2 7d 41 91 84 c5 7b 00 00 00[ ]+vpgatherqd 0x7b\(%rbp,%zmm16,8\),%ymm16\{%k1\}
|
||||
[ ]+[a-f0-9]+:[ ]+62 e2 fd 41 91 84 cd 7b 00 00 00[ ]+vpgatherqq 0x7b\(%rbp,%zmm17,8\),%zmm16\{%k1\}
|
||||
[ ]+[a-f0-9]+:[ ]+62 e2 fd 41 91 84 c5 7b 00 00 00[ ]+vpgatherqq 0x7b\(%rbp,%zmm16,8\),%zmm16\{%k1\}
|
||||
#pass
|
||||
|
||||
@ -9,3 +9,21 @@ vgather:
|
||||
vgatherdps %xmm9,(%rax,%xmm1,4),%xmm0
|
||||
vgatherdps %xmm2,(%rax,%xmm1,8),%xmm1
|
||||
vgatherdps %xmm2,(%rax,%xmm1,8),%xmm9
|
||||
|
||||
avx512vgather:
|
||||
vgatherdpd 123(%rbp,%ymm17,8), %zmm16{%k1}
|
||||
vgatherdpd 123(%rbp,%ymm16,8), %zmm16{%k1}
|
||||
vgatherdps 123(%rbp,%zmm17,8), %zmm16{%k1}
|
||||
vgatherdps 123(%rbp,%zmm16,8), %zmm16{%k1}
|
||||
vgatherqpd 123(%rbp,%zmm17,8), %zmm16{%k1}
|
||||
vgatherqpd 123(%rbp,%zmm16,8), %zmm16{%k1}
|
||||
vgatherqps 123(%rbp,%zmm17,8), %ymm16{%k1}
|
||||
vgatherqps 123(%rbp,%zmm16,8), %ymm16{%k1}
|
||||
vpgatherdd 123(%rbp,%zmm17,8), %zmm16{%k1}
|
||||
vpgatherdd 123(%rbp,%zmm16,8), %zmm16{%k1}
|
||||
vpgatherdq 123(%rbp,%ymm17,8), %zmm16{%k1}
|
||||
vpgatherdq 123(%rbp,%ymm16,8), %zmm16{%k1}
|
||||
vpgatherqd 123(%rbp,%zmm17,8), %ymm16{%k1}
|
||||
vpgatherqd 123(%rbp,%zmm16,8), %ymm16{%k1}
|
||||
vpgatherqq 123(%rbp,%zmm17,8), %zmm16{%k1}
|
||||
vpgatherqq 123(%rbp,%zmm16,8), %zmm16{%k1}
|
||||
|
||||
Loading…
Reference in New Issue
Block a user