* ppc-tdep.h (ppc_insns_match_pattern): Update prototype.
* rs6000-tdep.c (read_insn): Add frame param, don't assume big-endian. (ppc_insns_match_pattern): Add frame param. Avoid multiple target mem reads on optional insns. * ppc-linux-tdep.c (ppc_skip_trampoline_code): Update ppc_insns_match_pattern calls. * ppc64-tdep.c (ppc64_standard_linkage2, ppc64_standard_linkage3): Add match for power7 thread safety insns, and new order of std 2,40(1) insn. Correct code shown for _dl_runtime_resolve invocation in comment, and update rest of comment. (PPC64_STANDARD_LINKAGE1_LEN, PPC64_STANDARD_LINKAGE2_LEN, PPC64_STANDARD_LINKAGE3_LEN): Delete. (ppc64_standard_linkage2_target): Update insn offsets. (ppc64_skip_trampoline_code): Use a single insn buffer. Match newer stubs first. Update calls.
This commit is contained in:
Alan Modra
parent
404e278f8d
commit
845d47080b
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@ -1,3 +1,21 @@
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2013-06-04 Alan Modra <amodra@gmail.com>
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* ppc-tdep.h (ppc_insns_match_pattern): Update prototype.
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* rs6000-tdep.c (read_insn): Add frame param, don't assume big-endian.
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(ppc_insns_match_pattern): Add frame param. Avoid multiple
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target mem reads on optional insns.
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* ppc-linux-tdep.c (ppc_skip_trampoline_code): Update
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ppc_insns_match_pattern calls.
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* ppc64-tdep.c (ppc64_standard_linkage2, ppc64_standard_linkage3):
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Add match for power7 thread safety insns, and new order of
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std 2,40(1) insn. Correct code shown for _dl_runtime_resolve
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invocation in comment, and update rest of comment.
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(PPC64_STANDARD_LINKAGE1_LEN, PPC64_STANDARD_LINKAGE2_LEN,
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PPC64_STANDARD_LINKAGE3_LEN): Delete.
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(ppc64_standard_linkage2_target): Update insn offsets.
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(ppc64_skip_trampoline_code): Use a single insn buffer. Match newer
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stubs first. Update calls.
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2013-06-04 Yao Qi <yao@codesourcery.com>
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* solib.c (solib_find): Don't need dir separator if path has
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@ -361,7 +361,7 @@ ppc_skip_trampoline_code (struct frame_info *frame, CORE_ADDR pc)
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enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
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CORE_ADDR target = 0;
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if (ppc_insns_match_pattern (pc, powerpc32_plt_stub, insnbuf))
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if (ppc_insns_match_pattern (frame, pc, powerpc32_plt_stub, insnbuf))
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{
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/* Insn pattern is
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lis r11, xxxx
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@ -373,7 +373,7 @@ ppc_skip_trampoline_code (struct frame_info *frame, CORE_ADDR pc)
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target = read_memory_unsigned_integer (target, 4, byte_order);
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}
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if (ppc_insns_match_pattern (pc, powerpc32_plt_stub_so, insnbuf))
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if (ppc_insns_match_pattern (frame, pc, powerpc32_plt_stub_so, insnbuf))
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{
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/* Insn pattern is
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lwz r11, xxxx(r30)
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@ -300,9 +300,9 @@ struct ppc_insn_pattern
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int optional; /* If non-zero, this insn may be absent. */
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};
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extern int ppc_insns_match_pattern (CORE_ADDR pc,
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extern int ppc_insns_match_pattern (struct frame_info *frame, CORE_ADDR pc,
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struct ppc_insn_pattern *pattern,
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unsigned int *insn);
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unsigned int *insns);
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extern CORE_ADDR ppc_insn_d_field (unsigned int insn);
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extern CORE_ADDR ppc_insn_ds_field (unsigned int insn);
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140
gdb/ppc64-tdep.c
140
gdb/ppc64-tdep.c
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@ -59,9 +59,10 @@ ppc64_desc_entry_point (struct gdbarch *gdbarch, CORE_ADDR desc)
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return (CORE_ADDR) read_memory_unsigned_integer (desc, 8, byte_order);
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}
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/* Pattern for the standard linkage function. These are built by
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build_plt_stub in elf64-ppc.c, whose GLINK argument is always
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zero. */
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/* Patterns for the standard linkage functions. These are built by
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build_plt_stub in bfd/elf64-ppc.c. */
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/* Old PLT call stub. */
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static struct ppc_insn_pattern ppc64_standard_linkage1[] =
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{
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@ -95,15 +96,23 @@ static struct ppc_insn_pattern ppc64_standard_linkage1[] =
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{ 0, 0, 0 }
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};
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#define PPC64_STANDARD_LINKAGE1_LEN ARRAY_SIZE (ppc64_standard_linkage1)
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/* Current PLT call stub to access PLT entries more than +/- 32k from r2.
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Also supports older stub with different placement of std 2,40(1),
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a stub that omits the std 2,40(1), and both versions of power7
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thread safety read barriers. Note that there are actually two more
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instructions following "cmpldi r2, 0", "bnectr+" and "b <glink_i>",
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but there isn't any need to match them. */
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static struct ppc_insn_pattern ppc64_standard_linkage2[] =
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{
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/* std r2, 40(r1) <optional> */
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{ -1, insn_ds (62, 2, 1, 40, 0), 1 },
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/* addis r12, r2, <any> */
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{ insn_d (-1, -1, -1, 0), insn_d (15, 12, 2, 0), 0 },
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/* std r2, 40(r1) */
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{ -1, insn_ds (62, 2, 1, 40, 0), 0 },
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/* std r2, 40(r1) <optional> */
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{ -1, insn_ds (62, 2, 1, 40, 0), 1 },
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/* ld r11, <any>(r12) */
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{ insn_ds (-1, -1, -1, 0, -1), insn_ds (58, 11, 12, 0, 0), 0 },
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@ -114,24 +123,33 @@ static struct ppc_insn_pattern ppc64_standard_linkage2[] =
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/* mtctr r11 */
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{ insn_xfx (-1, -1, -1, -1), insn_xfx (31, 11, 9, 467), 0 },
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/* xor r11, r11, r11 <optional> */
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{ -1, 0x7d6b5a78, 1 },
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/* add r12, r12, r11 <optional> */
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{ -1, 0x7d8c5a14, 1 },
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/* ld r2, <any>(r12) */
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{ insn_ds (-1, -1, -1, 0, -1), insn_ds (58, 2, 12, 0, 0), 0 },
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/* ld r11, <any>(r12) <optional> */
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{ insn_ds (-1, -1, -1, 0, -1), insn_ds (58, 11, 12, 0, 0), 1 },
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/* bctr */
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{ -1, 0x4e800420, 0 },
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/* bctr <optional> */
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{ -1, 0x4e800420, 1 },
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/* cmpldi r2, 0 <optional> */
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{ -1, 0x28220000, 1 },
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{ 0, 0, 0 }
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};
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#define PPC64_STANDARD_LINKAGE2_LEN ARRAY_SIZE (ppc64_standard_linkage2)
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/* Current PLT call stub to access PLT entries within +/- 32k of r2. */
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static struct ppc_insn_pattern ppc64_standard_linkage3[] =
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{
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/* std r2, 40(r1) */
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{ -1, insn_ds (62, 2, 1, 40, 0), 0 },
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/* std r2, 40(r1) <optional> */
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{ -1, insn_ds (62, 2, 1, 40, 0), 1 },
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/* ld r11, <any>(r2) */
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{ insn_ds (-1, -1, -1, 0, -1), insn_ds (58, 11, 2, 0, 0), 0 },
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@ -142,56 +160,71 @@ static struct ppc_insn_pattern ppc64_standard_linkage3[] =
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/* mtctr r11 */
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{ insn_xfx (-1, -1, -1, -1), insn_xfx (31, 11, 9, 467), 0 },
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/* xor r11, r11, r11 <optional> */
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{ -1, 0x7d6b5a78, 1 },
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/* add r2, r2, r11 <optional> */
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{ -1, 0x7c425a14, 1 },
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/* ld r11, <any>(r2) <optional> */
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{ insn_ds (-1, -1, -1, 0, -1), insn_ds (58, 11, 2, 0, 0), 1 },
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/* ld r2, <any>(r2) */
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{ insn_ds (-1, -1, -1, 0, -1), insn_ds (58, 2, 2, 0, 0), 0 },
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/* bctr */
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{ -1, 0x4e800420, 0 },
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/* bctr <optional> */
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{ -1, 0x4e800420, 1 },
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/* cmpldi r2, 0 <optional> */
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{ -1, 0x28220000, 1 },
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{ 0, 0, 0 }
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};
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#define PPC64_STANDARD_LINKAGE3_LEN ARRAY_SIZE (ppc64_standard_linkage3)
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/* When the dynamic linker is doing lazy symbol resolution, the first
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call to a function in another object will go like this:
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- The user's function calls the linkage function:
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100007c4: 4b ff fc d5 bl 10000498
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100007c8: e8 41 00 28 ld r2,40(r1)
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100003d4: 4b ff ff ad bl 10000380 <nnnn.plt_call.printf>
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100003d8: e8 41 00 28 ld r2,40(r1)
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- The linkage function loads the entry point (and other stuff) from
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the function descriptor in the PLT, and jumps to it:
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- The linkage function loads the entry point and toc pointer from
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the function descriptor in the PLT, and jumps to it:
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10000498: 3d 82 00 00 addis r12,r2,0
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1000049c: f8 41 00 28 std r2,40(r1)
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100004a0: e9 6c 80 98 ld r11,-32616(r12)
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100004a4: e8 4c 80 a0 ld r2,-32608(r12)
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100004a8: 7d 69 03 a6 mtctr r11
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100004ac: e9 6c 80 a8 ld r11,-32600(r12)
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100004b0: 4e 80 04 20 bctr
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<nnnn.plt_call.printf>:
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10000380: f8 41 00 28 std r2,40(r1)
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10000384: e9 62 80 78 ld r11,-32648(r2)
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10000388: 7d 69 03 a6 mtctr r11
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1000038c: e8 42 80 80 ld r2,-32640(r2)
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10000390: 28 22 00 00 cmpldi r2,0
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10000394: 4c e2 04 20 bnectr+
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10000398: 48 00 03 a0 b 10000738 <printf@plt>
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- But since this is the first time that PLT entry has been used, it
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sends control to its glink entry. That loads the number of the
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PLT entry and jumps to the common glink0 code:
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sends control to its glink entry. That loads the number of the
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PLT entry and jumps to the common glink0 code:
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10000c98: 38 00 00 00 li r0,0
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10000c9c: 4b ff ff dc b 10000c78
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<printf@plt>:
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10000738: 38 00 00 01 li r0,1
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1000073c: 4b ff ff bc b 100006f8 <__glink_PLTresolve>
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- The common glink0 code then transfers control to the dynamic
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linker's fixup code:
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linker's fixup code:
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10000c78: e8 41 00 28 ld r2,40(r1)
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10000c7c: 3d 82 00 00 addis r12,r2,0
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10000c80: e9 6c 80 80 ld r11,-32640(r12)
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10000c84: e8 4c 80 88 ld r2,-32632(r12)
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10000c88: 7d 69 03 a6 mtctr r11
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10000c8c: e9 6c 80 90 ld r11,-32624(r12)
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10000c90: 4e 80 04 20 bctr
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100006f0: 0000000000010440 .quad plt0 - (. + 16)
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<__glink_PLTresolve>:
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100006f8: 7d 88 02 a6 mflr r12
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100006fc: 42 9f 00 05 bcl 20,4*cr7+so,10000700
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10000700: 7d 68 02 a6 mflr r11
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10000704: e8 4b ff f0 ld r2,-16(r11)
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10000708: 7d 88 03 a6 mtlr r12
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1000070c: 7d 82 5a 14 add r12,r2,r11
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10000710: e9 6c 00 00 ld r11,0(r12)
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10000714: e8 4c 00 08 ld r2,8(r12)
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10000718: 7d 69 03 a6 mtctr r11
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1000071c: e9 6c 00 10 ld r11,16(r12)
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10000720: 4e 80 04 20 bctr
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Eventually, this code will figure out how to skip all of this,
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including the dynamic linker. At the moment, we just get through
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@ -234,8 +267,8 @@ ppc64_standard_linkage2_target (struct frame_info *frame,
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CORE_ADDR desc
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= ((CORE_ADDR) get_frame_register_unsigned (frame,
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tdep->ppc_gp0_regnum + 2)
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+ (ppc_insn_d_field (insn[0]) << 16)
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+ ppc_insn_ds_field (insn[2]));
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+ (ppc_insn_d_field (insn[1]) << 16)
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+ ppc_insn_ds_field (insn[3]));
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/* The first word of the descriptor is the entry point. Return that. */
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return ppc64_desc_entry_point (gdbarch, desc);
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@ -266,23 +299,20 @@ ppc64_standard_linkage3_target (struct frame_info *frame,
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CORE_ADDR
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ppc64_skip_trampoline_code (struct frame_info *frame, CORE_ADDR pc)
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{
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unsigned int ppc64_standard_linkage1_insn[PPC64_STANDARD_LINKAGE1_LEN];
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unsigned int ppc64_standard_linkage2_insn[PPC64_STANDARD_LINKAGE2_LEN];
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unsigned int ppc64_standard_linkage3_insn[PPC64_STANDARD_LINKAGE3_LEN];
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#define MAX(a,b) ((a) > (b) ? (a) : (b))
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unsigned int insns[MAX (MAX (ARRAY_SIZE (ppc64_standard_linkage1),
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ARRAY_SIZE (ppc64_standard_linkage2)),
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ARRAY_SIZE (ppc64_standard_linkage3)) - 1];
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CORE_ADDR target;
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if (ppc_insns_match_pattern (pc, ppc64_standard_linkage1,
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ppc64_standard_linkage1_insn))
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pc = ppc64_standard_linkage1_target (frame, pc,
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ppc64_standard_linkage1_insn);
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else if (ppc_insns_match_pattern (pc, ppc64_standard_linkage2,
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ppc64_standard_linkage2_insn))
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pc = ppc64_standard_linkage2_target (frame, pc,
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ppc64_standard_linkage2_insn);
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else if (ppc_insns_match_pattern (pc, ppc64_standard_linkage3,
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ppc64_standard_linkage3_insn))
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pc = ppc64_standard_linkage3_target (frame, pc,
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ppc64_standard_linkage3_insn);
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if (ppc_insns_match_pattern (frame, pc, ppc64_standard_linkage3, insns)
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&& (insns[8] != 0 || insns[9] != 0))
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pc = ppc64_standard_linkage3_target (frame, pc, insns);
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else if (ppc_insns_match_pattern (frame, pc, ppc64_standard_linkage2, insns)
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&& (insns[10] != 0 || insns[11] != 0))
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pc = ppc64_standard_linkage2_target (frame, pc, insns);
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else if (ppc_insns_match_pattern (frame, pc, ppc64_standard_linkage1, insns))
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pc = ppc64_standard_linkage1_target (frame, pc, insns);
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else
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return 0;
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@ -4238,14 +4238,15 @@ show_powerpc_exact_watchpoints (struct ui_file *file, int from_tty,
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fprintf_filtered (file, _("Use of exact watchpoints is %s.\n"), value);
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}
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/* Read a PPC instruction from memory. PPC instructions are always
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big-endian, no matter what endianness the program is running in, so
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we can hardcode BFD_ENDIAN_BIG for read_memory_unsigned_integer. */
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/* Read a PPC instruction from memory. */
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static unsigned int
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read_insn (CORE_ADDR pc)
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read_insn (struct frame_info *frame, CORE_ADDR pc)
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{
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return read_memory_unsigned_integer (pc, 4, BFD_ENDIAN_BIG);
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struct gdbarch *gdbarch = get_frame_arch (frame);
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enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
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return read_memory_unsigned_integer (pc, 4, byte_order);
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}
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/* Return non-zero if the instructions at PC match the series
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@ -4262,19 +4263,25 @@ read_insn (CORE_ADDR pc)
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i'th instruction in memory. */
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int
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ppc_insns_match_pattern (CORE_ADDR pc, struct ppc_insn_pattern *pattern,
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unsigned int *insn)
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ppc_insns_match_pattern (struct frame_info *frame, CORE_ADDR pc,
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struct ppc_insn_pattern *pattern,
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unsigned int *insns)
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{
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int i;
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unsigned int insn;
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for (i = 0; pattern[i].mask; i++)
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for (i = 0, insn = 0; pattern[i].mask; i++)
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{
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insn[i] = read_insn (pc);
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if ((insn[i] & pattern[i].mask) == pattern[i].data)
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pc += 4;
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else if (pattern[i].optional)
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insn[i] = 0;
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else
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if (insn == 0)
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insn = read_insn (frame, pc);
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insns[i] = 0;
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if ((insn & pattern[i].mask) == pattern[i].data)
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{
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insns[i] = insn;
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pc += 4;
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insn = 0;
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}
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else if (!pattern[i].optional)
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return 0;
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}
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