x86: re-arrange process_operands()
Alter the sequence of conditions evaluated, without affecting the overall result. This is going to help subsequent changes (and as a nice side effect also slightly reduces overall indentation depth). While doing this take the liberty of simplifying the calculation of the operand index of the register operand in ShortForm handling.
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@ -1,3 +1,8 @@
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2019-11-04 Jan Beulich <jbeulich@suse.com>
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* config/tc-i386.c (process_operands): Handle ShortForm insns
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later, splitting out their segment register sub-form.
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2019-10-31 H.J. Lu <hongjiu.lu@intel.com>
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2019-10-31 H.J. Lu <hongjiu.lu@intel.com>
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* testsuite/gas/i386/general.s: Add .code16gcc fldenv tests.
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* testsuite/gas/i386/general.s: Add .code16gcc fldenv tests.
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@ -7004,9 +7004,15 @@ duplicate:
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i.reg_operands++;
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i.reg_operands++;
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}
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}
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if (i.tm.opcode_modifier.shortform)
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if (i.tm.opcode_modifier.modrm)
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{
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{
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if (i.types[0].bitfield.sreg)
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/* The opcode is completed (modulo i.tm.extension_opcode which
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must be put into the modrm byte). Now, we make the modrm and
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index base bytes based on all the info we've collected. */
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default_seg = build_modrm_byte ();
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}
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else if (i.types[0].bitfield.sreg)
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{
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{
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if (flag_code != CODE_64BIT
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if (flag_code != CODE_64BIT
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? i.tm.base_opcode == POP_SEG_SHORT
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? i.tm.base_opcode == POP_SEG_SHORT
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@ -7025,17 +7031,22 @@ duplicate:
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}
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}
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i.tm.base_opcode |= (i.op[0].regs->reg_num << 3);
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i.tm.base_opcode |= (i.op[0].regs->reg_num << 3);
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}
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}
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else
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else if ((i.tm.base_opcode & ~0x3) == MOV_AX_DISP32)
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{
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default_seg = &ds;
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}
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else if (i.tm.opcode_modifier.isstring)
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{
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/* For the string instructions that allow a segment override
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on one of their operands, the default segment is ds. */
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default_seg = &ds;
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}
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else if (i.tm.opcode_modifier.shortform)
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{
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{
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/* The register or float register operand is in operand
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/* The register or float register operand is in operand
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0 or 1. */
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0 or 1. */
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unsigned int op;
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unsigned int op = !i.tm.operand_types[0].bitfield.reg;
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if ((i.types[0].bitfield.reg && i.types[0].bitfield.tbyte)
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|| operand_type_check (i.types[0], reg))
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op = 0;
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else
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op = 1;
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/* Register goes in low 3 bits of opcode. */
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/* Register goes in low 3 bits of opcode. */
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i.tm.base_opcode |= i.op[op].regs->reg_num;
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i.tm.base_opcode |= i.op[op].regs->reg_num;
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if ((i.op[op].regs->reg_flags & RegRex) != 0)
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if ((i.op[op].regs->reg_flags & RegRex) != 0)
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@ -7059,25 +7070,6 @@ duplicate:
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}
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}
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}
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}
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}
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}
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}
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else if (i.tm.opcode_modifier.modrm)
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{
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/* The opcode is completed (modulo i.tm.extension_opcode which
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must be put into the modrm byte). Now, we make the modrm and
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index base bytes based on all the info we've collected. */
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default_seg = build_modrm_byte ();
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}
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else if ((i.tm.base_opcode & ~0x3) == MOV_AX_DISP32)
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{
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default_seg = &ds;
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}
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else if (i.tm.opcode_modifier.isstring)
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{
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/* For the string instructions that allow a segment override
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on one of their operands, the default segment is ds. */
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default_seg = &ds;
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}
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if (i.tm.base_opcode == 0x8d /* lea */
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if (i.tm.base_opcode == 0x8d /* lea */
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&& i.seg[0]
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&& i.seg[0]
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