[AArch64] Add feature flags and command line for ARMv8.2 FP16 support.

ARMv8.2 adds optional support for 16-bit operations to the FP and
Adv.SIMD instructions. This patch adds a feature macro for this support
with a new command line option "+fp16" to enable/disable it.

Although the command line option is added as an architecture extension,
it only affects instructions available with when +fp or +simd is
enabled. If +fp16 is specified then it will also enable +fp.

There are currently no FP16 instructions implemented in binutils, this
patch is to enable subsequent work on supporting the extension.

gas/
2015-11-27  Matthew Wahab  <matthew.wahab@arm.com>

	* config/tc-aarch64.c (aarch64_features): Add "fp16".
	* doc/c-aarch64.texi (Architecture Extensions): Add "fp16".

include/opcode/
2015-11-27  Matthew Wahab  <matthew.wahab@arm.com>

	* aarch64.h (AARCH64_FEATURE_F16): New.
	(AARCH64_ARCH_V8_2): Add AARCH64_FEATURE_F16 to ARMv8.2
	features.

Change-Id: Id2021e0513946e16d0935c2a5b9605574cdff95a
This commit is contained in:
Matthew Wahab 2015-11-27 13:19:50 +00:00
parent b6c30ffef9
commit 870181955b
5 changed files with 18 additions and 0 deletions

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@ -1,3 +1,8 @@
2015-11-27 Matthew Wahab <matthew.wahab@arm.com>
* config/tc-aarch64.c (aarch64_features): Add "fp16".
* doc/c-aarch64.texi (Architecture Extensions): Add "fp16".
2015-11-24 Christophe Monat <christophe.monat@st.com>
* config/tc-arm.c (move_or_literal_pool): Do not transform ldr

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@ -7738,6 +7738,8 @@ static const struct aarch64_option_cpu_value_table aarch64_features[] = {
{"lor", AARCH64_FEATURE (AARCH64_FEATURE_LOR, 0)},
{"rdma", AARCH64_FEATURE (AARCH64_FEATURE_SIMD
| AARCH64_FEATURE_RDMA, 0)},
{"fp16", AARCH64_FEATURE (AARCH64_FEATURE_F16
| AARCH64_FEATURE_FP, 0)},
{NULL, AARCH64_ARCH_NONE}
};

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@ -142,6 +142,9 @@ automatically cause those extensions to be disabled.
@tab Enable Limited Ordering Regions extensions.
@item @code{rdma} @tab ARMv8-A @tab ARMv8-A or later
@tab Enable ARMv8.1 Advanced SIMD extensions. This implies @code{simd}.
@item @code{fp16} @tab ARMv8.2-A @tab ARMv8.2-A or later
@tab Enable ARMv8.2 16-bit floating-point support. This implies
@code{fp}.
@end multitable
@node AArch64 Syntax

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@ -1,3 +1,9 @@
2015-11-27 Matthew Wahab <matthew.wahab@arm.com>
* aarch64.h (AARCH64_FEATURE_F16): New.
(AARCH64_ARCH_V8_2): Add AARCH64_FEATURE_F16 to ARMv8.2
features.
2015-11-20 Matthew Wahab <matthew.wahab@arm.com>
* aarch64.h (AARCH64_FEATURE_V8_1): New.

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@ -48,6 +48,7 @@ typedef uint32_t aarch64_insn;
#define AARCH64_FEATURE_LOR 0x00400000 /* LOR instructions. */
#define AARCH64_FEATURE_RDMA 0x00800000 /* v8.1 SIMD instructions. */
#define AARCH64_FEATURE_V8_1 0x01000000 /* v8.1 features. */
#define AARCH64_FEATURE_F16 0x01000000 /* v8.2 FP16 instructions. */
/* Architectures are the sum of the base and extensions. */
#define AARCH64_ARCH_V8 AARCH64_FEATURE (AARCH64_FEATURE_V8, \
@ -63,6 +64,7 @@ typedef uint32_t aarch64_insn;
| AARCH64_FEATURE_RDMA)
#define AARCH64_ARCH_V8_2 AARCH64_FEATURE (AARCH64_FEATURE_V8, \
AARCH64_FEATURE_V8_2 \
| AARCH64_FEATURE_F16 \
| AARCH64_FEATURE_FP \
| AARCH64_FEATURE_SIMD \
| AARCH64_FEATURE_LSE \