ARM: Issue a warning when the MRRC and MRRC2 instructions are used with the same destination registers.
* config/tc-arm.c (do_co_reg2c): Added constraint. * testsuite/gas/arm/dest-unpredictable.s: New. * testsuite/gas/arm/dest-unpredictable.l: New. * testsuite/gas/arm/dest-unpredictable.d: New.
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2016-08-19 Tamar Christina <tamar.christina@arm.com>
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* config/tc-arm.c (do_co_reg2c): Added constraint.
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* testsuite/gas/arm/dest-unpredictable.s: New.
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* testsuite/gas/arm/dest-unpredictable.l: New.
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* testsuite/gas/arm/dest-unpredictable.d: New.
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2016-08-19 Nick Clifton <nickc@redhat.com>
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* testsuite/gas/i386/ilp32/x86-64-unwind.d: Adjust expected
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@ -8691,6 +8691,14 @@ do_co_reg2c (void)
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constraint (Rn == REG_PC, BAD_PC);
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}
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/* Only check the MRRC{2} variants. */
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if ((inst.instruction & 0x0FF00000) == 0x0C500000)
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{
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/* If Rd == Rn, error that the operation is
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unpredictable (example MRRC p3,#1,r1,r1,c4). */
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constraint (Rd == Rn, BAD_OVERLAP);
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}
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inst.instruction |= inst.operands[0].reg << 8;
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inst.instruction |= inst.operands[1].imm << 4;
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inst.instruction |= Rd << 12;
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@ -0,0 +1,2 @@
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# name: Unpredictable MRRC and MRRC2 instructions. - ARM
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# error-output: dest-unpredictable.l
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@ -0,0 +1,5 @@
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[^:]*: Assembler messages:
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[^:]*:6: Error: registers may not be the same -- `mrrc p0,#1,r1,r1,c4'
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[^:]*:7: Error: registers may not be the same -- `mrrc2 p0,#1,r1,r1,c4'
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[^:]*:20: Error: registers may not be the same -- `mrrc p0,#1,r1,r1,c4'
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[^:]*:21: Error: registers may not be the same -- `mrrc2 p0,#1,r1,r1,c4'
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@ -0,0 +1,29 @@
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.syntax unified
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.arm
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@ warnings
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mrrc p0,#1,r1,r1,c4 @ unpredictable
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mrrc2 p0,#1,r1,r1,c4 @ ditto
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@ normal
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mrrc p0,#1,r1,r2,c4 @ predictable
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mrrc2 p0,#1,r1,r2,c4 @ ditto
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mcrr p0,#1,r1,r2,c4 @ ditto
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mcrr2 p0,#1,r1,r2,c4 @ ditto
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mcrr p0,#1,r1,r1,c4 @ ditto
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mcrr2 p0,#1,r1,r1,c4 @ ditto
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.thumb
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@ warnings
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mrrc p0,#1,r1,r1,c4 @ unpredictable
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mrrc2 p0,#1,r1,r1,c4 @ ditto
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@ normal
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mrrc p0,#1,r1,r2,c4 @ predictable
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mrrc2 p0,#1,r1,r2,c4 @ ditto
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mcrr p0,#1,r1,r2,c4 @ ditto
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mcrr2 p0,#1,r1,r2,c4 @ ditto
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mcrr p0,#1,r1,r1,c4 @ ditto
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mcrr2 p0,#1,r1,r1,c4 @ ditto
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