[AArch64] Add ARMv8.3 instructions which are in the NOP space
This patch adds support for a subset of the ARMv8.3 pointer authentication instructions: XPACLRI, PACIA1716, PACIB1716, AUTIA1716, AUTIA1716, PACIAZ, PACIASP, PACIBZ, PACISP, AUTIAZ, AUTIASP, AUTIBZ, AUTIBSP. These are aliases to HINT #0x7, HINT #0x8, HINT #0xa, HINT #0xc, HINT #0xe, HINT #0x18, HINT #0x19, ..., HINT #0x1f respectively. For more details about pointer authentication in ARMv8.3 see https://community.arm.com/groups/processors/blog/2016/10/27/armv8-a-architecture-2016-additions opcodes/ 2016-11-11 Szabolcs Nagy <szabolcs.nagy@arm.com> * aarch64-tbl.h (aarch64_feature_v8_3, ARMV8_3, V8_3_INSN): New. (arch64_opcode_table): Add xpaclri, pacia1716, pacib1716, autia1716, autib1716, paciaz, paciasp, pacibz, pacibsp, autiaz, autiasp, autibz, autibsp. * aarch64-asm-2.c: Regenerate. * aarch64-dis-2.c: Regenerate. gas/ 2016-11-11 Szabolcs Nagy <szabolcs.nagy@arm.com> * testsuite/gas/aarch64/system-3.s: New. * testsuite/gas/aarch64/system-3.d: New. * testsuite/gas/aarch64/system.d: Update expected output.
This commit is contained in:
parent
3d731f6949
commit
8787d804e1
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@ -1,3 +1,9 @@
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2016-11-11 Szabolcs Nagy <szabolcs.nagy@arm.com>
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* testsuite/gas/aarch64/system-3.s: New.
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* testsuite/gas/aarch64/system-3.d: New.
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* testsuite/gas/aarch64/system.d: Update expected output.
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2016-11-11 Szabolcs Nagy <szabolcs.nagy@arm.com>
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* config/tc-aarch64.c (aarch64_archs): Add "armv8.3-a".
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@ -0,0 +1,34 @@
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#as: -march=armv8.3-a
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#objdump: -dr
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.*: file format .*
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Disassembly of section \.text:
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0000000000000000 <.*>:
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0: d50320ff xpaclri
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4: d50320ff xpaclri
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8: d503211f pacia1716
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c: d503211f pacia1716
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10: d503215f pacib1716
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14: d503215f pacib1716
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18: d503219f autia1716
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1c: d503219f autia1716
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20: d50321df autib1716
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24: d50321df autib1716
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28: d503231f paciaz
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2c: d503231f paciaz
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30: d503233f paciasp
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34: d503233f paciasp
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38: d503235f pacibz
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3c: d503235f pacibz
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40: d503237f pacibsp
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44: d503237f pacibsp
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48: d503239f autiaz
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4c: d503239f autiaz
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50: d50323bf autiasp
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54: d50323bf autiasp
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58: d50323df autibz
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5c: d50323df autibz
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60: d50323ff autibsp
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64: d50323ff autibsp
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@ -0,0 +1,41 @@
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/* ARMv8.3 Pointer authentication, HINT alias instructions. */
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.text
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xpaclri
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hint #0x7
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pacia1716
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hint #0x8
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pacib1716
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hint #0xa
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autia1716
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hint #0xc
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autib1716
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hint #0xe
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paciaz
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hint #0x18
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paciasp
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hint #0x19
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pacibz
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hint #0x1a
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pacibsp
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hint #0x1b
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autiaz
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hint #0x1c
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autiasp
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hint #0x1d
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autibz
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hint #0x1e
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autibsp
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hint #0x1f
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@ -19,14 +19,14 @@ Disassembly of section \.text:
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2c: d503209f sev
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30: d50320bf sevl
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34: d50320df hint #0x6
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38: d50320ff hint #0x7
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3c: d503211f hint #0x8
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38: d50320ff (hint #0x7|xpaclri)
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3c: d503211f (hint #0x8|pacia1716)
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40: d503213f hint #0x9
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44: d503215f hint #0xa
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44: d503215f (hint #0xa|pacib1716)
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48: d503217f hint #0xb
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4c: d503219f hint #0xc
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4c: d503219f (hint #0xc|autia1716)
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50: d50321bf hint #0xd
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54: d50321df hint #0xe
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54: d50321df (hint #0xe|autib1716)
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58: d50321ff hint #0xf
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5c: d503221f (hint #0x10|esb)
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60: d503223f (hint #0x11|psb csync)
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@ -36,14 +36,14 @@ Disassembly of section \.text:
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70: d50322bf hint #0x15
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74: d50322df hint #0x16
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78: d50322ff hint #0x17
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7c: d503231f hint #0x18
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80: d503233f hint #0x19
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84: d503235f hint #0x1a
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88: d503237f hint #0x1b
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8c: d503239f hint #0x1c
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90: d50323bf hint #0x1d
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94: d50323df hint #0x1e
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98: d50323ff hint #0x1f
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7c: d503231f (hint #0x18|paciaz)
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80: d503233f (hint #0x19|paciasp)
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84: d503235f (hint #0x1a|pacibz)
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88: d503237f (hint #0x1b|pacibsp)
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8c: d503239f (hint #0x1c|autiaz)
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90: d50323bf (hint #0x1d|autiasp)
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94: d50323df (hint #0x1e|autibz)
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98: d50323ff (hint #0x1f|autibsp)
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9c: d503241f hint #0x20
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a0: d503243f hint #0x21
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a4: d503245f hint #0x22
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@ -1,3 +1,12 @@
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2016-11-11 Szabolcs Nagy <szabolcs.nagy@arm.com>
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* aarch64-tbl.h (aarch64_feature_v8_3, ARMV8_3, V8_3_INSN): New.
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(arch64_opcode_table): Add xpaclri, pacia1716, pacib1716, autia1716,
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autib1716, paciaz, paciasp, pacibz, pacibsp, autiaz, autiasp, autibz,
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autibsp.
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* aarch64-asm-2.c: Regenerate.
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* aarch64-dis-2.c: Regenerate.
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2016-11-11 Szabolcs Nagy <szabolcs.nagy@arm.com>
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* aarch64-gen.c (find_alias_opcode): Increase max_num_aliases to 32.
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@ -422,8 +422,21 @@ aarch64_find_real_opcode (const aarch64_opcode *opcode)
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case 1112: /* movz */
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value = 1112; /* --> movz. */
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break;
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case 1126: /* psb */
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case 1125: /* esb */
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case 1151: /* autibsp */
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case 1150: /* autibz */
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case 1149: /* autiasp */
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case 1148: /* autiaz */
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case 1147: /* pacibsp */
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case 1146: /* pacibz */
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case 1145: /* paciasp */
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case 1144: /* paciaz */
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case 1131: /* psb */
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case 1130: /* esb */
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case 1129: /* autib1716 */
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case 1128: /* autia1716 */
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case 1127: /* pacib1716 */
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case 1126: /* pacia1716 */
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case 1125: /* xpaclri */
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case 1124: /* sevl */
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case 1123: /* sev */
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case 1122: /* wfi */
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@ -433,131 +446,131 @@ aarch64_find_real_opcode (const aarch64_opcode *opcode)
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case 1118: /* hint */
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value = 1118; /* --> hint. */
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break;
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case 1135: /* tlbi */
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case 1134: /* ic */
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case 1133: /* dc */
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case 1132: /* at */
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case 1131: /* sys */
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value = 1131; /* --> sys. */
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case 1140: /* tlbi */
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case 1139: /* ic */
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case 1138: /* dc */
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case 1137: /* at */
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case 1136: /* sys */
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value = 1136; /* --> sys. */
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break;
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case 1881: /* bic */
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case 1186: /* and */
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value = 1186; /* --> and. */
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case 1894: /* bic */
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case 1199: /* and */
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value = 1199; /* --> and. */
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break;
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case 1169: /* mov */
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case 1188: /* and */
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value = 1188; /* --> and. */
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case 1182: /* mov */
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case 1201: /* and */
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value = 1201; /* --> and. */
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break;
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case 1173: /* movs */
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case 1189: /* ands */
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value = 1189; /* --> ands. */
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case 1186: /* movs */
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case 1202: /* ands */
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value = 1202; /* --> ands. */
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break;
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case 1882: /* cmple */
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case 1224: /* cmpge */
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value = 1224; /* --> cmpge. */
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case 1895: /* cmple */
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case 1237: /* cmpge */
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value = 1237; /* --> cmpge. */
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break;
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case 1885: /* cmplt */
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case 1227: /* cmpgt */
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value = 1227; /* --> cmpgt. */
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case 1898: /* cmplt */
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case 1240: /* cmpgt */
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value = 1240; /* --> cmpgt. */
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break;
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case 1883: /* cmplo */
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case 1229: /* cmphi */
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value = 1229; /* --> cmphi. */
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case 1896: /* cmplo */
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case 1242: /* cmphi */
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value = 1242; /* --> cmphi. */
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break;
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case 1884: /* cmpls */
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case 1232: /* cmphs */
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value = 1232; /* --> cmphs. */
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case 1897: /* cmpls */
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case 1245: /* cmphs */
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value = 1245; /* --> cmphs. */
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break;
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case 1166: /* mov */
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case 1254: /* cpy */
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value = 1254; /* --> cpy. */
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case 1179: /* mov */
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case 1267: /* cpy */
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value = 1267; /* --> cpy. */
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break;
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case 1168: /* mov */
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case 1255: /* cpy */
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value = 1255; /* --> cpy. */
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case 1181: /* mov */
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case 1268: /* cpy */
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value = 1268; /* --> cpy. */
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break;
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case 1892: /* fmov */
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case 1171: /* mov */
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case 1256: /* cpy */
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value = 1256; /* --> cpy. */
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case 1905: /* fmov */
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case 1184: /* mov */
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case 1269: /* cpy */
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value = 1269; /* --> cpy. */
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break;
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case 1161: /* mov */
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case 1268: /* dup */
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value = 1268; /* --> dup. */
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case 1174: /* mov */
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case 1281: /* dup */
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value = 1281; /* --> dup. */
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break;
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case 1163: /* mov */
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case 1160: /* mov */
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case 1269: /* dup */
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value = 1269; /* --> dup. */
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case 1176: /* mov */
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case 1173: /* mov */
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case 1282: /* dup */
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value = 1282; /* --> dup. */
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break;
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case 1891: /* fmov */
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case 1165: /* mov */
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case 1270: /* dup */
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value = 1270; /* --> dup. */
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case 1904: /* fmov */
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case 1178: /* mov */
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case 1283: /* dup */
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value = 1283; /* --> dup. */
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break;
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case 1164: /* mov */
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case 1271: /* dupm */
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value = 1271; /* --> dupm. */
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case 1177: /* mov */
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case 1284: /* dupm */
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value = 1284; /* --> dupm. */
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break;
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case 1886: /* eon */
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case 1273: /* eor */
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value = 1273; /* --> eor. */
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case 1899: /* eon */
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case 1286: /* eor */
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value = 1286; /* --> eor. */
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break;
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case 1174: /* not */
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case 1275: /* eor */
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value = 1275; /* --> eor. */
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case 1187: /* not */
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case 1288: /* eor */
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value = 1288; /* --> eor. */
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break;
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case 1175: /* nots */
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case 1276: /* eors */
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value = 1276; /* --> eors. */
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case 1188: /* nots */
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case 1289: /* eors */
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value = 1289; /* --> eors. */
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break;
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case 1887: /* facle */
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case 1281: /* facge */
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value = 1281; /* --> facge. */
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case 1900: /* facle */
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case 1294: /* facge */
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value = 1294; /* --> facge. */
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break;
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case 1888: /* faclt */
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case 1282: /* facgt */
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value = 1282; /* --> facgt. */
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case 1901: /* faclt */
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case 1295: /* facgt */
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value = 1295; /* --> facgt. */
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break;
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case 1889: /* fcmle */
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case 1291: /* fcmge */
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value = 1291; /* --> fcmge. */
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case 1902: /* fcmle */
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case 1304: /* fcmge */
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value = 1304; /* --> fcmge. */
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break;
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case 1890: /* fcmlt */
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case 1293: /* fcmgt */
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value = 1293; /* --> fcmgt. */
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case 1903: /* fcmlt */
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case 1306: /* fcmgt */
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value = 1306; /* --> fcmgt. */
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break;
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case 1158: /* fmov */
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case 1299: /* fcpy */
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value = 1299; /* --> fcpy. */
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case 1171: /* fmov */
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case 1312: /* fcpy */
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value = 1312; /* --> fcpy. */
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break;
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case 1157: /* fmov */
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case 1316: /* fdup */
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value = 1316; /* --> fdup. */
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case 1170: /* fmov */
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case 1329: /* fdup */
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value = 1329; /* --> fdup. */
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break;
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case 1159: /* mov */
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case 1614: /* orr */
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value = 1614; /* --> orr. */
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case 1172: /* mov */
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case 1627: /* orr */
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value = 1627; /* --> orr. */
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break;
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case 1893: /* orn */
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case 1615: /* orr */
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value = 1615; /* --> orr. */
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case 1906: /* orn */
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case 1628: /* orr */
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value = 1628; /* --> orr. */
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break;
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case 1162: /* mov */
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case 1617: /* orr */
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value = 1617; /* --> orr. */
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case 1175: /* mov */
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case 1630: /* orr */
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value = 1630; /* --> orr. */
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break;
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case 1172: /* movs */
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case 1618: /* orrs */
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value = 1618; /* --> orrs. */
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case 1185: /* movs */
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case 1631: /* orrs */
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value = 1631; /* --> orrs. */
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break;
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case 1167: /* mov */
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case 1674: /* sel */
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value = 1674; /* --> sel. */
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case 1180: /* mov */
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case 1687: /* sel */
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value = 1687; /* --> sel. */
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break;
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case 1170: /* mov */
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case 1675: /* sel */
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value = 1675; /* --> sel. */
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case 1183: /* mov */
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case 1688: /* sel */
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value = 1688; /* --> sel. */
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break;
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default: return NULL;
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}
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File diff suppressed because it is too large
Load Diff
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@ -276,17 +276,17 @@ static const unsigned op_enum_table [] =
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382,
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404,
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406,
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1162,
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1167,
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1160,
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1159,
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1163,
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1170,
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1172,
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1173,
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1169,
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1175,
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1174,
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1180,
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1173,
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1172,
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1176,
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1183,
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1185,
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1186,
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1182,
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1188,
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1187,
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};
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/* Given the opcode enumerator OP, return the pointer to the corresponding
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@ -1904,6 +1904,8 @@ static const aarch64_feature_set aarch64_feature_stat_profile =
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AARCH64_FEATURE (AARCH64_FEATURE_PROFILE, 0);
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static const aarch64_feature_set aarch64_feature_sve =
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AARCH64_FEATURE (AARCH64_FEATURE_SVE, 0);
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static const aarch64_feature_set aarch64_feature_v8_3 =
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AARCH64_FEATURE (AARCH64_FEATURE_V8_3, 0);
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#define CORE &aarch64_feature_v8
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#define FP &aarch64_feature_fp
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@ -1919,6 +1921,7 @@ static const aarch64_feature_set aarch64_feature_sve =
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#define STAT_PROFILE &aarch64_feature_stat_profile
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#define ARMV8_2 &aarch64_feature_v8_2
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#define SVE &aarch64_feature_sve
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#define ARMV8_3 &aarch64_feature_v8_3
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#define CORE_INSN(NAME,OPCODE,MASK,CLASS,OP,OPS,QUALS,FLAGS) \
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{ NAME, OPCODE, MASK, CLASS, OP, CORE, OPS, QUALS, FLAGS, 0, NULL }
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|
@ -1945,6 +1948,8 @@ static const aarch64_feature_set aarch64_feature_sve =
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#define _SVE_INSN(NAME,OPCODE,MASK,CLASS,OP,OPS,QUALS,FLAGS,TIED) \
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{ NAME, OPCODE, MASK, CLASS, OP, SVE, OPS, QUALS, \
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||||
FLAGS | F_STRICT, TIED, NULL }
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#define V8_3_INSN(NAME,OPCODE,MASK,CLASS,OPS,QUALS,FLAGS) \
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||||
{ NAME, OPCODE, MASK, CLASS, 0, ARMV8_3, OPS, QUALS, FLAGS, 0, NULL }
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struct aarch64_opcode aarch64_opcode_table[] =
|
||||
{
|
||||
|
@ -3144,6 +3149,11 @@ struct aarch64_opcode aarch64_opcode_table[] =
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CORE_INSN ("wfi", 0xd503207f, 0xffffffff, ic_system, 0, OP0 (), {}, F_ALIAS),
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CORE_INSN ("sev", 0xd503209f, 0xffffffff, ic_system, 0, OP0 (), {}, F_ALIAS),
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||||
CORE_INSN ("sevl",0xd50320bf, 0xffffffff, ic_system, 0, OP0 (), {}, F_ALIAS),
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V8_3_INSN ("xpaclri", 0xd50320ff, 0xffffffff, ic_system, OP0 (), {}, F_ALIAS),
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V8_3_INSN ("pacia1716", 0xd503211f, 0xffffffff, ic_system, OP0 (), {}, F_ALIAS),
|
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V8_3_INSN ("pacib1716", 0xd503215f, 0xffffffff, ic_system, OP0 (), {}, F_ALIAS),
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V8_3_INSN ("autia1716", 0xd503219f, 0xffffffff, ic_system, OP0 (), {}, F_ALIAS),
|
||||
V8_3_INSN ("autib1716", 0xd50321df, 0xffffffff, ic_system, OP0 (), {}, F_ALIAS),
|
||||
{"esb", 0xd503221f, 0xffffffff, ic_system, 0, RAS, OP0 (), {}, F_ALIAS, 0, NULL},
|
||||
{"psb", 0xd503223f, 0xffffffff, ic_system, 0, STAT_PROFILE, OP1 (BARRIER_PSB), {}, F_ALIAS, 0, NULL},
|
||||
CORE_INSN ("clrex", 0xd503305f, 0xfffff0ff, ic_system, 0, OP1 (UIMM4), {}, F_OPD0_OPT | F_DEFAULT (0xF)),
|
||||
|
@ -3158,6 +3168,14 @@ struct aarch64_opcode aarch64_opcode_table[] =
|
|||
CORE_INSN ("msr", 0xd5000000, 0xffe00000, ic_system, 0, OP2 (SYSREG, Rt), QL_SRC_X, 0),
|
||||
CORE_INSN ("sysl",0xd5280000, 0xfff80000, ic_system, 0, OP5 (Rt, UIMM3_OP1, Cn, Cm, UIMM3_OP2), QL_SYSL, 0),
|
||||
CORE_INSN ("mrs", 0xd5200000, 0xffe00000, ic_system, 0, OP2 (Rt, SYSREG), QL_DST_X, 0),
|
||||
V8_3_INSN ("paciaz", 0xd503231f, 0xffffffff, ic_system, OP0 (), {}, F_ALIAS),
|
||||
V8_3_INSN ("paciasp", 0xd503233f, 0xffffffff, ic_system, OP0 (), {}, F_ALIAS),
|
||||
V8_3_INSN ("pacibz", 0xd503235f, 0xffffffff, ic_system, OP0 (), {}, F_ALIAS),
|
||||
V8_3_INSN ("pacibsp", 0xd503237f, 0xffffffff, ic_system, OP0 (), {}, F_ALIAS),
|
||||
V8_3_INSN ("autiaz", 0xd503239f, 0xffffffff, ic_system, OP0 (), {}, F_ALIAS),
|
||||
V8_3_INSN ("autiasp", 0xd50323bf, 0xffffffff, ic_system, OP0 (), {}, F_ALIAS),
|
||||
V8_3_INSN ("autibz", 0xd50323df, 0xffffffff, ic_system, OP0 (), {}, F_ALIAS),
|
||||
V8_3_INSN ("autibsp", 0xd50323ff, 0xffffffff, ic_system, OP0 (), {}, F_ALIAS),
|
||||
/* Test & branch (immediate). */
|
||||
CORE_INSN ("tbz", 0x36000000, 0x7f000000, testbranch, 0, OP3 (Rt, BIT_NUM, ADDR_PCREL14), QL_PCREL_14, 0),
|
||||
CORE_INSN ("tbnz",0x37000000, 0x7f000000, testbranch, 0, OP3 (Rt, BIT_NUM, ADDR_PCREL14), QL_PCREL_14, 0),
|
||||
|
|
Loading…
Reference in New Issue