Add docs and arch tests to BMI.

gas/
2011-01-07  Quentin Neill  <quentin.neill@amd.com>

	* config/tc-i386.c (cpu_arch): Add CPU_BMI_FLAGS.

	* doc/c-i386.texi (i386-BMI): New section.

gas/testsuite/
2011-01-07  Quentin Neill  <quentin.neill@amd.com>

	* gas/i386/arch-10.s: Add a BMI instruction.
	* gas/i386/x86-64-arch-2.s: Likewise.
	* gas/i386/arch-10.d: Add bmi flag and BMI instruction pattern.
	* gas/i386/x86-64-arch-2.d: Likewise.
	* gas/i386/arch-10-1.l: Add BMI instruction pattern.
	* gas/i386/arch-10-2.l: Likewise.
	* gas/i386/arch-10-3.l: Likewise.
	* gas/i386/arch-10-4.l: Likewise.
This commit is contained in:
Quentin Neill 2011-01-07 17:44:30 +00:00
parent ac74f77061
commit 87973e9f82
12 changed files with 55 additions and 2 deletions

View File

@ -1,3 +1,9 @@
2011-01-07 Quentin Neill <quentin.neill@amd.com>
* config/tc-i386.c (cpu_arch): Add CPU_BMI_FLAGS.
* doc/c-i386.texi (i386-BMI): New section.
2011-01-06 Paul Koning <ni1d@arrl.net>
* config/tc-pdp11.c (parse_op_no_deferred): Allow PC-relative

View File

@ -725,6 +725,8 @@ static const arch_entry cpu_arch[] =
CPU_SSE4A_FLAGS, 0, 0 },
{ STRING_COMMA_LEN (".abm"), PROCESSOR_UNKNOWN,
CPU_ABM_FLAGS, 0, 0 },
{ STRING_COMMA_LEN (".bmi"), PROCESSOR_UNKNOWN,
CPU_BMI_FLAGS, 0, 0 },
};
#ifdef I386COFF

View File

@ -35,6 +35,7 @@ extending the Intel architecture to 64-bits.
* i386-Float:: Floating Point
* i386-SIMD:: Intel's MMX and AMD's 3DNow! SIMD Operations
* i386-LWP:: AMD's Lightweight Profiling Instructions
* i386-BMI:: Bit Manipulation Instruction
* i386-16bit:: Writing 16-bit Code
* i386-Arch:: Specifying an x86 CPU architecture
* i386-Bugs:: AT&T Syntax bugs
@ -845,6 +846,21 @@ For detailed information on the LWP instruction set, see the
@cite{AMD Lightweight Profiling Specification} available at
@uref{http://developer.amd.com/cpu/LWP,Lightweight Profiling Specification}.
@node i386-BMI
@section Bit Manipulation Instructions
@cindex BMI, i386
@cindex BMI, x86-64
@code{@value{AS}} supports the Bit Manipulation (BMI) instruction set.
BMI instructions provide several instructions implementing individual
bit manipulation operations such as isolation, masking, setting, or
resetting.
@c Need to add a specification citation here when available.
@node i386-16bit
@section Writing 16-bit Code

View File

@ -1,3 +1,14 @@
2011-01-07 Quentin Neill <quentin.neill@amd.com>
* gas/i386/arch-10.s: Add a BMI instruction.
* gas/i386/x86-64-arch-2.s: Likewise.
* gas/i386/arch-10.d: Add bmi flag and BMI instruction pattern.
* gas/i386/x86-64-arch-2.d: Likewise.
* gas/i386/arch-10-1.l: Add BMI instruction pattern.
* gas/i386/arch-10-2.l: Likewise.
* gas/i386/arch-10-3.l: Likewise.
* gas/i386/arch-10-4.l: Likewise.
2011-01-06 Paul Koning <ni1d@arrl.net>
* gas/pdp11/pdp11.exp: Add run of absreloc.

View File

@ -29,6 +29,7 @@
.*:58: Error: .*
.*:60: Error: .*
.*:62: Error: .*
.*:64: Error: .*
GAS LISTING .*
@ -98,3 +99,5 @@ GAS LISTING .*
[ ]*60[ ]+xstorerng
[ ]*61[ ]+\# nop
[ ]*62[ ]+nopl \(%eax\)
[ ]*63[ ]+\# BMI
[ ]*64[ ]+blsr %ecx,%ebx

View File

@ -28,6 +28,7 @@
.*:58: Error: .*
.*:60: Error: .*
.*:62: Error: .*
.*:64: Error: .*
GAS LISTING .*
@ -97,3 +98,5 @@ GAS LISTING .*
[ ]*60[ ]+xstorerng
[ ]*61[ ]+\# nop
[ ]*62[ ]+nopl \(%eax\)
[ ]*63[ ]+\# BMI
[ ]*64[ ]+blsr %ecx,%ebx

View File

@ -21,6 +21,7 @@
.*:58: Error: .*
.*:60: Error: .*
.*:62: Error: .*
.*:64: Error: .*
GAS LISTING .*
@ -93,3 +94,5 @@ GAS LISTING .*
[ ]*60[ ]+xstorerng
[ ]*61[ ]+\# nop
[ ]*62[ ]+nopl \(%eax\)
[ ]*63[ ]+\# BMI
[ ]*64[ ]+blsr %ecx,%ebx

View File

@ -19,6 +19,7 @@
.*:58: Error: .*
.*:60: Error: .*
.*:62: Error: .*
.*:64: Error: .*
GAS LISTING .*
@ -91,3 +92,5 @@ GAS LISTING .*
[ ]*60[ ]+xstorerng
[ ]*61[ ]+\# nop
[ ]*62[ ]+nopl \(%eax\)
[ ]*63[ ]+\# BMI
[ ]*64[ ]+blsr %ecx,%ebx

View File

@ -1,4 +1,4 @@
#as: -march=i686+avx+vmx+smx+xsave+xsaveopt+aes+pclmul+fma+movbe+ept+clflush+nop+syscall+rdtscp+3dnowa+sse4a+svme+abm+padlock
#as: -march=i686+avx+vmx+smx+xsave+xsaveopt+aes+pclmul+fma+movbe+ept+clflush+nop+syscall+rdtscp+3dnowa+sse4a+svme+abm+padlock+bmi
#objdump: -dw
#name: i386 arch 10
@ -37,4 +37,5 @@ Disassembly of section .text:
[ ]*[a-f0-9]+: f3 0f bd d9 lzcnt %ecx,%ebx
[ ]*[a-f0-9]+: 0f a7 c0 xstore-rng
[ ]*[a-f0-9]+: 0f 1f 00 nopl \(%eax\)
[ ]*[a-f0-9]+: c4 e2 60 f3 c9 blsr %ecx,%ebx
#pass

View File

@ -60,3 +60,5 @@ lzcnt %ecx,%ebx
xstorerng
# nop
nopl (%eax)
# BMI
blsr %ecx,%ebx

View File

@ -1,4 +1,4 @@
#as: -march=generic64+avx+vmx+smx+xsave+xsaveopt+aes+pclmul+fma+movbe+ept+clflush+syscall+rdtscp+3dnowa+sse4a+svme+abm+padlock
#as: -march=generic64+avx+vmx+smx+xsave+xsaveopt+aes+pclmul+fma+movbe+ept+clflush+syscall+rdtscp+3dnowa+sse4a+svme+abm+padlock+bmi
#objdump: -dw
#name: x86-64 arch 2
@ -36,4 +36,5 @@ Disassembly of section .text:
[ ]*[a-f0-9]+: 0f 01 da vmload
[ ]*[a-f0-9]+: f3 0f bd d9 lzcnt %ecx,%ebx
[ ]*[a-f0-9]+: 0f a7 c0 xstore-rng
[ ]*[a-f0-9]+: c4 e2 60 f3 c9 blsr %ecx,%ebx
#pass

View File

@ -58,3 +58,5 @@ vmload
lzcnt %ecx,%ebx
# PadLock
xstorerng
# BMI
blsr %ecx,%ebx