2004-01-07 Michael Snyder <msnyder@redhat.com>
* gencode.c: Whitespace cleanup.
* interp.c: Ditto.
This commit is contained in:
Michael Snyder
parent
29ff87c561
commit
87acb4a7d1
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@ -1,5 +1,8 @@
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2004-01-07 Michael Snyder <msnyder@redhat.com>
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* gencode.c: Whitespace cleanup.
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* interp.c: Ditto.
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* gencode.c: Replace 'Hitachi' with 'Renesas'.
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(op tab): Add new instructions for sh4a, DBR, SBR.
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(expand_opcode): Add handling for new movxy combinations.
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138
sim/sh/gencode.c
138
sim/sh/gencode.c
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@ -49,7 +49,7 @@ op tab[] =
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{
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{ "n", "", "add #<imm>,<REG_N>", "0111nnnni8*1....",
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"R[n] += SEXT(i);",
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"R[n] += SEXT (i);",
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"if (i == 0) {",
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" UNDEF(n); /* see #ifdef PARANOID */",
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" break;",
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@ -85,7 +85,7 @@ op tab[] =
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{ "", "", "bf <bdisp8>", "10001011i8p1....",
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"if (!T) {",
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" SET_NIP (PC + 4 + (SEXT(i) * 2));",
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" SET_NIP (PC + 4 + (SEXT (i) * 2));",
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" cycles += 2;",
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"}",
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},
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@ -235,7 +235,7 @@ op tab[] =
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/* sh2e */
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{ "", "", "fabs <FREG_N>", "1111nnnn01011101",
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"FP_UNARY (n, fabs);",
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"/* FIXME: FR(n) &= 0x7fffffff; */",
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"/* FIXME: FR (n) &= 0x7fffffff; */",
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},
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/* sh2e */
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@ -263,7 +263,7 @@ op tab[] =
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" int i;",
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" float f;",
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" } u;",
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" u.f = DR(n);",
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" u.f = DR (n);",
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" FPUL = u.i;",
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"}",
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},
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@ -280,7 +280,7 @@ op tab[] =
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" float f;",
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" } u;",
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" u.i = FPUL;",
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" SET_DR(n, u.f);",
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" SET_DR (n, u.f);",
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"}",
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},
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@ -308,13 +308,13 @@ op tab[] =
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/* sh2e */
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{ "", "", "fldi0 <FREG_N>", "1111nnnn10001101",
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"SET_FR (n, (float)0.0);",
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"SET_FR (n, (float) 0.0);",
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"/* FIXME: check for DP and (n & 1) == 0? */",
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},
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/* sh2e */
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{ "", "", "fldi1 <FREG_N>", "1111nnnn10011101",
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"SET_FR (n, (float)1.0);",
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"SET_FR (n, (float) 1.0);",
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"/* FIXME: check for DP and (n & 1) == 0? */",
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},
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@ -325,7 +325,7 @@ op tab[] =
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" int i;",
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" float f;",
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" } u;",
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" u.f = FR(n);",
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" u.f = FR (n);",
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" FPUL = u.i;",
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},
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@ -333,16 +333,16 @@ op tab[] =
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{ "", "", "float FPUL,<FREG_N>", "1111nnnn00101101",
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/* sh4 */
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"if (FPSCR_PR)",
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" SET_DR (n, (double)FPUL);",
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" SET_DR (n, (double) FPUL);",
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"else",
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"{",
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" SET_FR (n, (float)FPUL);",
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" SET_FR (n, (float) FPUL);",
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"}",
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},
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/* sh2e */
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{ "", "", "fmac <FREG_0>,<FREG_M>,<FREG_N>", "1111nnnnmmmm1110",
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"SET_FR (n, FR(m) * FR(0) + FR(n));",
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"SET_FR (n, FR (m) * FR (0) + FR (n));",
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"/* FIXME: check for DP and (n & 1) == 0? */",
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},
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@ -370,7 +370,7 @@ op tab[] =
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"else",
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"{",
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" MA (1);",
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" WLAT (R[n], FI(m));",
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" WLAT (R[n], FI (m));",
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"}",
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},
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/* sh2e */
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@ -383,7 +383,7 @@ op tab[] =
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"else",
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"{",
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" MA (1);",
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" SET_FI(n, RLAT(R[m]));",
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" SET_FI (n, RLAT (R[m]));",
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"}",
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},
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/* sh2e */
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@ -413,7 +413,7 @@ op tab[] =
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"{",
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" MA (1);",
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" R[n] -= 4;",
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" WLAT (R[n], FI(m));",
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" WLAT (R[n], FI (m));",
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"}",
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},
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/* sh2e */
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@ -426,7 +426,7 @@ op tab[] =
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"else",
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"{",
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" MA (1);",
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" SET_FI(n, RLAT(R[0] + R[m]));",
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" SET_FI (n, RLAT (R[0] + R[m]));",
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"}",
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},
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/* sh2e */
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@ -439,7 +439,7 @@ op tab[] =
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"else",
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"{",
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" MA (1);",
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" WLAT((R[0]+R[n]), FI(m));",
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" WLAT ((R[0]+R[n]), FI (m));",
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"}",
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},
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@ -447,17 +447,17 @@ op tab[] =
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/* sh2e */
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{ "", "", "fmul <FREG_M>,<FREG_N>", "1111nnnnmmmm0010",
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"FP_OP(n, *, m);",
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"FP_OP (n, *, m);",
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},
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/* sh2e */
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{ "", "", "fneg <FREG_N>", "1111nnnn01001101",
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"FP_UNARY(n, -);",
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"FP_UNARY (n, -);",
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},
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/* sh4a */
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{ "", "", "fpchg", "1111011111111101",
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"SET_FPSCR (GET_FPSCR() ^ FPSCR_MASK_PR);",
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"SET_FPSCR (GET_FPSCR () ^ FPSCR_MASK_PR);",
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},
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/* sh4 */
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@ -465,7 +465,7 @@ op tab[] =
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"if (FPSCR_PR)",
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" RAISE_EXCEPTION (SIGILL);",
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"else",
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" SET_FPSCR (GET_FPSCR() ^ FPSCR_MASK_FR);",
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" SET_FPSCR (GET_FPSCR () ^ FPSCR_MASK_FR);",
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},
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/* sh4 */
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@ -481,12 +481,12 @@ op tab[] =
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/* sh4 */
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{ "", "", "fschg", "1111001111111101",
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"SET_FPSCR (GET_FPSCR() ^ FPSCR_MASK_SZ);",
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"SET_FPSCR (GET_FPSCR () ^ FPSCR_MASK_SZ);",
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},
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/* sh3e */
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{ "", "", "fsqrt <FREG_N>", "1111nnnn01101101",
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"FP_UNARY(n, sqrt);",
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"FP_UNARY (n, sqrt);",
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},
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/* sh4 */
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@ -499,23 +499,23 @@ op tab[] =
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/* sh2e */
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{ "", "", "fsub <FREG_M>,<FREG_N>", "1111nnnnmmmm0001",
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"FP_OP(n, -, m);",
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"FP_OP (n, -, m);",
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},
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/* sh2e */
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{ "", "", "ftrc <FREG_N>, FPUL", "1111nnnn00111101",
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/* sh4 */
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"if (FPSCR_PR) {",
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" if (DR(n) != DR(n)) /* NaN */",
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" if (DR (n) != DR (n)) /* NaN */",
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" FPUL = 0x80000000;",
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" else",
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" FPUL = (int)DR(n);",
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" FPUL = (int) DR (n);",
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"}",
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"else",
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"if (FR(n) != FR(n)) /* NaN */",
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"if (FR (n) != FR (n)) /* NaN */",
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" FPUL = 0x80000000;",
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"else",
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" FPUL = (int)FR(n);",
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" FPUL = (int) FR (n);",
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},
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/* sh4 */
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@ -643,17 +643,17 @@ op tab[] =
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},
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{ "n", "n", "lds.l @<REG_N>+,<SREG_M>", "0100nnnnssss0110",
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"MA (1);",
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"SREG (m) = RLAT(R[n]);",
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"SREG (m) = RLAT (R[n]);",
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"R[n] += 4;",
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},
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/* sh2e / sh-dsp (lds <REG_N>,DSR) */
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{ "", "n", "lds <REG_N>,FPSCR", "0100nnnn01101010",
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"SET_FPSCR(R[n]);",
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"SET_FPSCR (R[n]);",
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},
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/* sh2e / sh-dsp (lds.l @<REG_N>+,DSR) */
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{ "n", "n", "lds.l @<REG_N>+,FPSCR", "0100nnnn01100110",
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"MA (1);",
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"SET_FPSCR (RLAT(R[n]));",
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"SET_FPSCR (RLAT (R[n]));",
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"R[n] += 4;",
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},
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@ -662,15 +662,15 @@ op tab[] =
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},
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{ "nm", "nm", "mac.l @<REG_M>+,@<REG_N>+", "0000nnnnmmmm1111",
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"macl(&R0,memory,n,m);",
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"macl (&R0,memory,n,m);",
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},
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{ "nm", "nm", "mac.w @<REG_M>+,@<REG_N>+", "0100nnnnmmmm1111",
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"macw(&R0,memory,n,m,endianw);",
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"macw (&R0,memory,n,m,endianw);",
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},
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{ "n", "", "mov #<imm>,<REG_N>", "1110nnnni8*1....",
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"R[n] = SEXT(i);",
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"R[n] = SEXT (i);",
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},
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{ "n", "m", "mov <REG_M>,<REG_N>", "0110nnnnmmmm0011",
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"R[n] = R[m];",
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@ -890,13 +890,13 @@ op tab[] =
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/* muls.w - see muls */
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{ "", "mn", "muls <REG_M>,<REG_N>", "0010nnnnmmmm1111",
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"MACL = ((int)(short)R[n]) * ((int)(short)R[m]);",
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"MACL = ((int) (short) R[n]) * ((int) (short) R[m]);",
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},
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/* mulu.w - see mulu */
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{ "", "mn", "mulu <REG_M>,<REG_N>", "0010nnnnmmmm1110",
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"MACL = (((unsigned int)(unsigned short)R[n])",
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" * ((unsigned int)(unsigned short)R[m]));",
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"MACL = (((unsigned int) (unsigned short) R[n])",
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" * ((unsigned int) (unsigned short) R[m]));",
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},
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{ "n", "m", "neg <REG_M>,<REG_N>", "0110nnnnmmmm1011",
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@ -1184,9 +1184,9 @@ op tab[] =
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{ "", "n", "tas.b @<REG_N>", "0100nnnn00011011",
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"MA (1);",
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"ult = RBAT(R[n]);",
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"ult = RBAT (R[n]);",
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"SET_SR_T (ult == 0);",
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"WBAT(R[n],ult|0x80);",
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"WBAT (R[n],ult|0x80);",
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},
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{ "0", "", "trapa #<imm>", "11000011i8*1....",
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@ -1196,15 +1196,15 @@ op tab[] =
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#if 0
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"else {",
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/* SH-[12] */
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" R[15]-=4;",
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" WLAT (R[15], GET_SR());",
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" R[15]-=4;",
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" R[15] -= 4;",
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" WLAT (R[15], GET_SR ());",
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" R[15] -= 4;",
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" WLAT (R[15], PH2T (PC + 2));",
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#else
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"else if (!SR_BL) {",
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" SSR = GET_SR();",
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" SSR = GET_SR ();",
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" SPC = PH2T (PC + 2);",
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" SET_SR (GET_SR() | SR_MASK_MD | SR_MASK_BL | SR_MASK_RB);",
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" SET_SR (GET_SR () | SR_MASK_MD | SR_MASK_BL | SR_MASK_RB);",
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" /* FIXME: EXPEVT = 0x00000160; */",
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#endif
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" SET_NIP (PT2H (RLAT (VBR + (imm<<2))));",
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@ -1242,10 +1242,10 @@ op tab[] =
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#if 0
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{ "divs.l <REG_M>,<REG_N>", "0100nnnnmmmm1110",
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"divl(0,R[n],R[m]);",
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"divl (0,R[n],R[m]);",
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},
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{ "divu.l <REG_M>,<REG_N>", "0100nnnnmmmm1101",
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"divl(0,R[n],R[m]);",
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"divl (0,R[n],R[m]);",
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},
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#endif
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@ -2619,10 +2619,10 @@ gensim_caselist (p)
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case '1':
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break;
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case '2':
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printf ("<<1");
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printf (" << 1");
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break;
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case '4':
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printf ("<<2");
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printf (" << 2");
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break;
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}
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printf (";\n");
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@ -2631,27 +2631,27 @@ gensim_caselist (p)
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}
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if (sextbit > 0)
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{
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printf (" i = (i ^ (1<<%d))-(1<<%d);\n",
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printf (" i = (i ^ (1 << %d)) - (1 << %d);\n",
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sextbit - 1, sextbit - 1);
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}
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if (needm && needn)
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printf (" TB(m,n);\n");
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printf (" TB (m,n);\n");
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else if (needm)
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printf (" TL(m);\n");
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printf (" TL (m);\n");
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else if (needn)
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printf (" TL(n);\n");
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printf (" TL (n);\n");
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{
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/* Do the refs */
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char *r;
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for (r = p->refs; *r; r++)
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{
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if (*r == '0') printf(" CREF(0);\n");
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if (*r == '8') printf(" CREF(8);\n");
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if (*r == '9') printf(" CREF(9);\n");
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if (*r == 'n') printf(" CREF(n);\n");
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if (*r == 'm') printf(" CREF(m);\n");
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if (*r == '0') printf (" CREF (0);\n");
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if (*r == '8') printf (" CREF (8);\n");
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if (*r == '9') printf (" CREF (9);\n");
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if (*r == 'n') printf (" CREF (n);\n");
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if (*r == 'm') printf (" CREF (m);\n");
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}
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}
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@ -2670,9 +2670,9 @@ gensim_caselist (p)
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char *r;
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for (r = p->defs; *r; r++)
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{
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if (*r == '0') printf(" CDEF(0);\n");
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if (*r == 'n') printf(" CDEF(n);\n");
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if (*r == 'm') printf(" CDEF(m);\n");
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if (*r == '0') printf(" CDEF (0);\n");
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if (*r == 'n') printf(" CDEF (n);\n");
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if (*r == 'm') printf(" CDEF (m);\n");
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}
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}
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@ -2720,22 +2720,26 @@ gendefines ()
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char *s = p->name;
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printf ("#define OPC_");
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while (*s) {
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if (isupper(*s))
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*s = tolower(*s);
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if (isalpha(*s)) printf("%c", *s);
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if (*s == ' ') printf("_");
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if (*s == '@') printf("ind_");
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if (*s == ',') printf("_");
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if (isupper (*s))
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*s = tolower (*s);
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if (isalpha (*s))
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printf ("%c", *s);
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if (*s == ' ')
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printf ("_");
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if (*s == '@')
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printf ("ind_");
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if (*s == ',')
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printf ("_");
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s++;
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}
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printf(" %d\n",p->index);
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printf (" %d\n",p->index);
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}
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}
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static int ppi_index;
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/* Take a ppi code, expand all varying fields in it and fill all the
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right entries in 'table' with the opcode index.
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right entries in 'table' with the opcode index.
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NOTE: tail recursion optimization removed for simplicity. */
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static void
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|
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115
sim/sh/interp.c
115
sim/sh/interp.c
|
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@ -183,9 +183,9 @@ static char *myname;
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#define R0 saved_state.asregs.regs[0]
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#define Rn saved_state.asregs.regs[n]
|
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#define Rm saved_state.asregs.regs[m]
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#define UR0 (unsigned int)(saved_state.asregs.regs[0])
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#define UR (unsigned int)R
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#define UR (unsigned int)R
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#define UR0 (unsigned int) (saved_state.asregs.regs[0])
|
||||
#define UR (unsigned int) R
|
||||
#define UR (unsigned int) R
|
||||
#define SR0 saved_state.asregs.regs[0]
|
||||
#define CREG(n) (saved_state.asregs.cregs.i[(n)])
|
||||
#define GBR saved_state.asregs.cregs.named.gbr
|
||||
|
|
@ -270,9 +270,9 @@ do { \
|
|||
#define FPSCR_MASK_SZ (1 << 20)
|
||||
#define FPSCR_MASK_PR (1 << 19)
|
||||
|
||||
#define FPSCR_FR ((GET_FPSCR() & FPSCR_MASK_FR) != 0)
|
||||
#define FPSCR_SZ ((GET_FPSCR() & FPSCR_MASK_SZ) != 0)
|
||||
#define FPSCR_PR ((GET_FPSCR() & FPSCR_MASK_PR) != 0)
|
||||
#define FPSCR_FR ((GET_FPSCR () & FPSCR_MASK_FR) != 0)
|
||||
#define FPSCR_SZ ((GET_FPSCR () & FPSCR_MASK_SZ) != 0)
|
||||
#define FPSCR_PR ((GET_FPSCR () & FPSCR_MASK_PR) != 0)
|
||||
|
||||
/* Count the number of arguments in an argv. */
|
||||
static int
|
||||
|
|
@ -330,7 +330,7 @@ void
|
|||
raise_exception (x)
|
||||
int x;
|
||||
{
|
||||
RAISE_EXCEPTION(x);
|
||||
RAISE_EXCEPTION (x);
|
||||
}
|
||||
|
||||
void
|
||||
|
|
@ -405,7 +405,7 @@ do { \
|
|||
|
||||
#ifdef PARANOID
|
||||
int valid[16];
|
||||
#define CREF(x) if(!valid[x]) fail();
|
||||
#define CREF(x) if (!valid[x]) fail ();
|
||||
#define CDEF(x) valid[x] = 1;
|
||||
#define UNDEF(x) valid[x] = 0;
|
||||
#else
|
||||
|
|
@ -416,14 +416,14 @@ int valid[16];
|
|||
|
||||
static void parse_and_set_memory_size PARAMS ((char *str));
|
||||
static int IOMEM PARAMS ((int addr, int write, int value));
|
||||
static struct loop_bounds get_loop_bounds PARAMS((int, int, unsigned char *,
|
||||
unsigned char *, int, int));
|
||||
static void process_wlat_addr PARAMS((int, int));
|
||||
static void process_wwat_addr PARAMS((int, int));
|
||||
static void process_wbat_addr PARAMS((int, int));
|
||||
static int process_rlat_addr PARAMS((int));
|
||||
static int process_rwat_addr PARAMS((int));
|
||||
static int process_rbat_addr PARAMS((int));
|
||||
static struct loop_bounds get_loop_bounds PARAMS ((int, int, unsigned char *,
|
||||
unsigned char *, int, int));
|
||||
static void process_wlat_addr PARAMS ((int, int));
|
||||
static void process_wwat_addr PARAMS ((int, int));
|
||||
static void process_wbat_addr PARAMS ((int, int));
|
||||
static int process_rlat_addr PARAMS ((int));
|
||||
static int process_rwat_addr PARAMS ((int));
|
||||
static int process_rbat_addr PARAMS ((int));
|
||||
static void INLINE wlat_fast PARAMS ((unsigned char *, int, int, int));
|
||||
static void INLINE wwat_fast PARAMS ((unsigned char *, int, int, int, int));
|
||||
static void INLINE wbat_fast PARAMS ((unsigned char *, int, int, int));
|
||||
|
|
@ -522,10 +522,10 @@ set_dr (n, exp)
|
|||
if (((n) & 1) || ((m) & 1)) \
|
||||
RAISE_EXCEPTION (SIGILL); \
|
||||
else \
|
||||
SET_DR(n, (DR(n) OP DR(m))); \
|
||||
SET_DR (n, (DR (n) OP DR (m))); \
|
||||
} \
|
||||
else \
|
||||
SET_FR(n, (FR(n) OP FR(m))); \
|
||||
SET_FR (n, (FR (n) OP FR (m))); \
|
||||
} while (0)
|
||||
|
||||
#define FP_UNARY(n, OP) \
|
||||
|
|
@ -535,10 +535,10 @@ set_dr (n, exp)
|
|||
if ((n) & 1) \
|
||||
RAISE_EXCEPTION (SIGILL); \
|
||||
else \
|
||||
SET_DR(n, (OP (DR(n)))); \
|
||||
SET_DR (n, (OP (DR (n)))); \
|
||||
} \
|
||||
else \
|
||||
SET_FR(n, (OP (FR(n)))); \
|
||||
SET_FR (n, (OP (FR (n)))); \
|
||||
} while (0)
|
||||
|
||||
#define FP_CMP(n, OP, m) \
|
||||
|
|
@ -548,10 +548,10 @@ set_dr (n, exp)
|
|||
if (((n) & 1) || ((m) & 1)) \
|
||||
RAISE_EXCEPTION (SIGILL); \
|
||||
else \
|
||||
SET_SR_T (DR(n) OP DR(m)); \
|
||||
SET_SR_T (DR (n) OP DR (m)); \
|
||||
} \
|
||||
else \
|
||||
SET_SR_T (FR(n) OP FR(m)); \
|
||||
SET_SR_T (FR (n) OP FR (m)); \
|
||||
} while (0)
|
||||
|
||||
static void
|
||||
|
|
@ -580,7 +580,7 @@ wlat_fast (memory, x, value, maskl)
|
|||
unsigned char *memory;
|
||||
{
|
||||
int v = value;
|
||||
unsigned int *p = (unsigned int *)(memory + x);
|
||||
unsigned int *p = (unsigned int *) (memory + x);
|
||||
WRITE_BUSERROR (x, maskl, v, process_wlat_addr);
|
||||
*p = v;
|
||||
}
|
||||
|
|
@ -590,7 +590,7 @@ wwat_fast (memory, x, value, maskw, endianw)
|
|||
unsigned char *memory;
|
||||
{
|
||||
int v = value;
|
||||
unsigned short *p = (unsigned short *)(memory + (x ^ endianw));
|
||||
unsigned short *p = (unsigned short *) (memory + (x ^ endianw));
|
||||
WRITE_BUSERROR (x, maskw, v, process_wwat_addr);
|
||||
*p = v;
|
||||
}
|
||||
|
|
@ -611,7 +611,7 @@ static int INLINE
|
|||
rlat_fast (memory, x, maskl)
|
||||
unsigned char *memory;
|
||||
{
|
||||
unsigned int *p = (unsigned int *)(memory + x);
|
||||
unsigned int *p = (unsigned int *) (memory + x);
|
||||
READ_BUSERROR (x, maskl, process_rlat_addr);
|
||||
|
||||
return *p;
|
||||
|
|
@ -622,7 +622,7 @@ rwat_fast (memory, x, maskw, endianw)
|
|||
unsigned char *memory;
|
||||
int x, maskw, endianw;
|
||||
{
|
||||
unsigned short *p = (unsigned short *)(memory + (x ^ endianw));
|
||||
unsigned short *p = (unsigned short *) (memory + (x ^ endianw));
|
||||
READ_BUSERROR (x, maskw, process_rwat_addr);
|
||||
|
||||
return *p;
|
||||
|
|
@ -632,7 +632,7 @@ static int INLINE
|
|||
riat_fast (insn_ptr, endianw)
|
||||
unsigned char *insn_ptr;
|
||||
{
|
||||
unsigned short *p = (unsigned short *)((size_t) insn_ptr ^ endianw);
|
||||
unsigned short *p = (unsigned short *) ((size_t) insn_ptr ^ endianw);
|
||||
|
||||
return *p;
|
||||
}
|
||||
|
|
@ -655,10 +655,10 @@ rbat_fast (memory, x, maskb)
|
|||
#define WLAT(x,v) (wlat_fast (memory, x, v, maskl))
|
||||
#define WBAT(x,v) (wbat_fast (memory, x, v, maskb))
|
||||
|
||||
#define RUWAT(x) (RWAT(x) & 0xffff)
|
||||
#define RSWAT(x) ((short)(RWAT(x)))
|
||||
#define RSLAT(x) ((long)(RLAT(x)))
|
||||
#define RSBAT(x) (SEXT(RBAT(x)))
|
||||
#define RUWAT(x) (RWAT (x) & 0xffff)
|
||||
#define RSWAT(x) ((short) (RWAT (x)))
|
||||
#define RSLAT(x) ((long) (RLAT (x)))
|
||||
#define RSBAT(x) (SEXT (RBAT (x)))
|
||||
|
||||
#define RDAT(x, n) (do_rdat (memory, (x), (n), (maskl)))
|
||||
static int
|
||||
|
|
@ -763,11 +763,11 @@ process_rbat_addr (addr)
|
|||
|
||||
#define SEXT(x) (((x & 0xff) ^ (~0x7f))+0x80)
|
||||
#define SEXT12(x) (((x & 0xfff) ^ 0x800) - 0x800)
|
||||
#define SEXTW(y) ((int)((short)y))
|
||||
#define SEXTW(y) ((int) ((short) y))
|
||||
#if 0
|
||||
#define SEXT32(x) ((int)((x & 0xffffffff) ^ 0x80000000U) - 0x7fffffff - 1)
|
||||
#define SEXT32(x) ((int) ((x & 0xffffffff) ^ 0x80000000U) - 0x7fffffff - 1)
|
||||
#else
|
||||
#define SEXT32(x) ((int)(x))
|
||||
#define SEXT32(x) ((int) (x))
|
||||
#endif
|
||||
#define SIGN32(x) (SEXT32 (x) >> 31)
|
||||
|
||||
|
|
@ -806,7 +806,7 @@ do { \
|
|||
|
||||
#define L(x) thislock = x;
|
||||
#define TL(x) if ((x) == prevlock) stalls++;
|
||||
#define TB(x,y) if ((x) == prevlock || (y)==prevlock) stalls++;
|
||||
#define TB(x,y) if ((x) == prevlock || (y) == prevlock) stalls++;
|
||||
|
||||
#endif
|
||||
|
||||
|
|
@ -1004,10 +1004,11 @@ trap (i, regs, insn_ptr, memory, maskl, maskw, endianw)
|
|||
Besides, it's quite dangerous. */
|
||||
#if 0
|
||||
case SYS_execve:
|
||||
regs[0] = execve (ptr (regs[5]), (char **)ptr (regs[6]), (char **)ptr (regs[7]));
|
||||
regs[0] = execve (ptr (regs[5]), (char **) ptr (regs[6]),
|
||||
(char **) ptr (regs[7]));
|
||||
break;
|
||||
case SYS_execv:
|
||||
regs[0] = execve (ptr (regs[5]),(char **) ptr (regs[6]), 0);
|
||||
regs[0] = execve (ptr (regs[5]), (char **) ptr (regs[6]), 0);
|
||||
break;
|
||||
#endif
|
||||
case SYS_pipe:
|
||||
|
|
@ -1032,9 +1033,11 @@ trap (i, regs, insn_ptr, memory, maskl, maskw, endianw)
|
|||
case SYS_write:
|
||||
strnswap (regs[6], regs[7]);
|
||||
if (regs[5] == 1)
|
||||
regs[0] = (int)callback->write_stdout (callback, ptr(regs[6]), regs[7]);
|
||||
regs[0] = (int) callback->write_stdout (callback,
|
||||
ptr (regs[6]), regs[7]);
|
||||
else
|
||||
regs[0] = (int)callback->write (callback, regs[5], ptr (regs[6]), regs[7]);
|
||||
regs[0] = (int) callback->write (callback, regs[5],
|
||||
ptr (regs[6]), regs[7]);
|
||||
strnswap (regs[6], regs[7]);
|
||||
break;
|
||||
case SYS_lseek:
|
||||
|
|
@ -1047,7 +1050,7 @@ trap (i, regs, insn_ptr, memory, maskl, maskw, endianw)
|
|||
{
|
||||
int len = strswaplen (regs[5]);
|
||||
strnswap (regs[5], len);
|
||||
regs[0] = callback->open (callback,ptr (regs[5]), regs[6]);
|
||||
regs[0] = callback->open (callback, ptr (regs[5]), regs[6]);
|
||||
strnswap (regs[5], len);
|
||||
break;
|
||||
}
|
||||
|
|
@ -1338,11 +1341,11 @@ macw (regs, memory, n, m, endianw)
|
|||
long tempm, tempn;
|
||||
long prod, macl, sum;
|
||||
|
||||
tempm=RSWAT(regs[m]); regs[m]+=2;
|
||||
tempn=RSWAT(regs[n]); regs[n]+=2;
|
||||
tempm=RSWAT (regs[m]); regs[m]+=2;
|
||||
tempn=RSWAT (regs[n]); regs[n]+=2;
|
||||
|
||||
macl = MACL;
|
||||
prod = (long)(short) tempm * (long)(short) tempn;
|
||||
prod = (long) (short) tempm * (long) (short) tempn;
|
||||
sum = prod + macl;
|
||||
if (S)
|
||||
{
|
||||
|
|
@ -1382,10 +1385,10 @@ macl (regs, memory, n, m)
|
|||
long long m64; /* 64 bit MAC */
|
||||
}mac64;
|
||||
|
||||
tempm = RSLAT(regs[m]);
|
||||
tempm = RSLAT (regs[m]);
|
||||
regs[m] += 4;
|
||||
|
||||
tempn = RSLAT(regs[n]);
|
||||
tempn = RSLAT (regs[n]);
|
||||
regs[n] += 4;
|
||||
|
||||
mach = MACH;
|
||||
|
|
@ -1394,7 +1397,7 @@ macl (regs, memory, n, m)
|
|||
mac64.m[0] = macl;
|
||||
mac64.m[1] = mach;
|
||||
|
||||
ans = (long long)tempm * (long long)tempn; /* Multiply 32bit * 32bit */
|
||||
ans = (long long) tempm * (long long) tempn; /* Multiply 32bit * 32bit */
|
||||
|
||||
mac64.m64 += ans; /* Accumulate 64bit + 64 bit */
|
||||
|
||||
|
|
@ -1477,7 +1480,7 @@ fsrra_s (float in)
|
|||
architectural spec. */
|
||||
frac = frexp (result, &exp);
|
||||
frac = ldexp (frac, 24);
|
||||
error = 4.; /* 1 << 24-1-21 */
|
||||
error = 4.0; /* 1 << 24-1-21 */
|
||||
/* use eps to compensate for possible 1 ulp error in our 'exact' result. */
|
||||
eps = ldexp (1., -29);
|
||||
upper = floor (frac + error - eps);
|
||||
|
|
@ -1530,8 +1533,7 @@ get_loop_bounds (rs, re, memory, mem_end, maskw, endianw)
|
|||
return loop;
|
||||
}
|
||||
|
||||
static void
|
||||
ppi_insn();
|
||||
static void ppi_insn ();
|
||||
|
||||
#include "ppi.c"
|
||||
|
||||
|
|
@ -1657,7 +1659,7 @@ static void
|
|||
init_pointers ()
|
||||
{
|
||||
host_little_endian = 0;
|
||||
*(char*)&host_little_endian = 1;
|
||||
* (char*) &host_little_endian = 1;
|
||||
host_little_endian &= 1;
|
||||
|
||||
if (saved_state.asregs.msize != 1 << sim_memory_size)
|
||||
|
|
@ -1948,7 +1950,7 @@ sim_store_register (sd, rn, memory, length)
|
|||
unsigned val;
|
||||
|
||||
init_pointers ();
|
||||
val = swap (* (int *)memory);
|
||||
val = swap (* (int *) memory);
|
||||
switch (rn)
|
||||
{
|
||||
case SIM_SH_R0_REGNUM: case SIM_SH_R1_REGNUM: case SIM_SH_R2_REGNUM:
|
||||
|
|
@ -2240,7 +2242,8 @@ sim_info (sd, verbose)
|
|||
SIM_DESC sd;
|
||||
int verbose;
|
||||
{
|
||||
double timetaken = (double) saved_state.asregs.ticks / (double) now_persec ();
|
||||
double timetaken =
|
||||
(double) saved_state.asregs.ticks / (double) now_persec ();
|
||||
double virttime = saved_state.asregs.cycles / 36.0e6;
|
||||
|
||||
callback->printf_filtered (callback, "\n\n# instructions executed %10d\n",
|
||||
|
|
@ -2394,7 +2397,7 @@ sim_create_inferior (sd, prog_bfd, argv, env)
|
|||
{
|
||||
/* Clear the registers. */
|
||||
memset (&saved_state, 0,
|
||||
(char*)&saved_state.asregs.end_of_registers - (char*)&saved_state);
|
||||
(char*) &saved_state.asregs.end_of_registers - (char*) &saved_state);
|
||||
|
||||
/* Set the PC. */
|
||||
if (prog_bfd != NULL)
|
||||
|
|
@ -2420,13 +2423,15 @@ sim_do_command (sd, cmd)
|
|||
}
|
||||
|
||||
cmdsize = strlen (sms_cmd);
|
||||
if (strncmp (cmd, sms_cmd, cmdsize) == 0 && strchr (" \t", cmd[cmdsize]) != NULL)
|
||||
if (strncmp (cmd, sms_cmd, cmdsize) == 0
|
||||
&& strchr (" \t", cmd[cmdsize]) != NULL)
|
||||
{
|
||||
parse_and_set_memory_size (cmd + cmdsize + 1);
|
||||
}
|
||||
else if (strcmp (cmd, "help") == 0)
|
||||
{
|
||||
(callback->printf_filtered) (callback, "List of SH simulator commands:\n\n");
|
||||
(callback->printf_filtered) (callback,
|
||||
"List of SH simulator commands:\n\n");
|
||||
(callback->printf_filtered) (callback, "set-memory-size <n> -- Set the number of address bits to use\n");
|
||||
(callback->printf_filtered) (callback, "\n");
|
||||
}
|
||||
|
|
|
|||
Loading…
Reference in New Issue