* config/tc-mips.c (append_insn): Properly detect variant frags
that preclude swapping of relaxed branches.  Correctly swap
instructions between frags when dealing with relaxed branches.

gas/testsuite/
* gas/mips/relax-swap1-mips1.d: New test for branch relaxation
with swapping for MIPS1.
* gas/mips/relax-swap1-mips2.d: New test for branch relaxation
with swapping for MIPS2.
* gas/mips/relax-swap1.l: Stderr output for the new tests.
* gas/mips/relax-swap1.s: Source for the new tests.
* gas/mips/relax-swap2.d: New test for branch likely relaxation
with swapping.
* gas/mips/relax-swap2.l: Stderr output for the new test.
* gas/mips/relax-swap2.s: Source for the new test.
* gas/mips/mips.exp: Run the new tests.
This commit is contained in:
Maciej W. Rozycki 2004-01-14 18:01:09 +00:00
parent 63d06c5c42
commit 895921c97e
11 changed files with 1039 additions and 19 deletions

View File

@ -1,3 +1,9 @@
2004-01-14 Maciej W. Rozycki <macro@ds2.pg.gda.pl>
* config/tc-mips.c (append_insn): Properly detect variant frags
that preclude swapping of relaxed branches. Correctly swap
instructions between frags when dealing with relaxed branches.
2004-01-14 Maciej W. Rozycki <macro@ds2.pg.gda.pl>
* acinclude.m4: Quote names of macros to be defined by AC_DEFUN

View File

@ -1539,6 +1539,8 @@ append_insn (char *place, struct mips_cl_insn *ip, expressionS *address_expr,
char *f;
fixS *fixp[3];
int nops = 0;
relax_stateT prev_insn_frag_type = 0;
bfd_boolean relaxed_branch = FALSE;
bfd_boolean force_new_frag = FALSE;
/* Mark instruction labels in mips16 mode. */
@ -1919,6 +1921,10 @@ append_insn (char *place, struct mips_cl_insn *ip, expressionS *address_expr,
}
}
/* Record the frag type before frag_var. */
if (prev_insn_frag)
prev_insn_frag_type = prev_insn_frag->fr_type;
if (place == NULL
&& address_expr
&& *reloc_type == BFD_RELOC_16_PCREL_S2
@ -1932,6 +1938,7 @@ append_insn (char *place, struct mips_cl_insn *ip, expressionS *address_expr,
&& !(mips_opts.noat && mips_pic != NO_PIC)
&& !mips_opts.mips16)
{
relaxed_branch = TRUE;
f = frag_var (rs_machine_dependent,
relaxed_branch_length
(NULL, NULL,
@ -2262,12 +2269,12 @@ append_insn (char *place, struct mips_cl_insn *ip, expressionS *address_expr,
there are any branches to anything other than a
label, users must use .set noreorder. */
|| insn_labels != NULL
/* If the previous instruction is in a variant frag, we
can not do the swap. This does not apply to the
mips16, which uses variant frags for different
purposes. */
/* If the previous instruction is in a variant frag
other than this branch's one, we cannot do the swap.
This does not apply to the mips16, which uses variant
frags for different purposes. */
|| (! mips_opts.mips16
&& prev_insn_frag->fr_type == rs_machine_dependent)
&& prev_insn_frag_type == rs_machine_dependent)
/* If the branch reads the condition codes, we don't
even try to swap, because in the sequence
ctc1 $X,$31
@ -2452,9 +2459,29 @@ append_insn (char *place, struct mips_cl_insn *ip, expressionS *address_expr,
char temp[4];
prev_f = prev_insn_frag->fr_literal + prev_insn_where;
if (!relaxed_branch)
{
/* If this is not a relaxed branch, then just
swap the instructions. */
memcpy (temp, prev_f, 4);
memcpy (prev_f, f, 4);
memcpy (f, temp, 4);
}
else
{
/* If this is a relaxed branch, then we move the
instruction to be placed in the delay slot to
the current frag, shrinking the fixed part of
the originating frag. If the branch occupies
the tail of the latter, we move it backwards,
into the space freed by the moved instruction. */
f = frag_more (4);
memcpy (f, prev_f, 4);
prev_insn_frag->fr_fix -= 4;
if (prev_insn_frag->fr_type == rs_machine_dependent)
memmove (prev_f, prev_f + 4, prev_insn_frag->fr_var);
}
if (prev_insn_fixp[0])
{
prev_insn_fixp[0]->fx_frag = frag_now;
@ -2482,6 +2509,9 @@ append_insn (char *place, struct mips_cl_insn *ip, expressionS *address_expr,
frag. */
force_new_frag = TRUE;
}
if (!relaxed_branch)
{
if (fixp[0])
{
fixp[0]->fx_frag = prev_insn_frag;
@ -2498,6 +2528,16 @@ append_insn (char *place, struct mips_cl_insn *ip, expressionS *address_expr,
fixp[2]->fx_where = prev_insn_where;
}
}
else if (prev_insn_frag->fr_type == rs_machine_dependent)
{
if (fixp[0])
fixp[0]->fx_where -= 4;
if (fixp[1])
fixp[1]->fx_where -= 4;
if (fixp[2])
fixp[2]->fx_where -= 4;
}
}
else
{
char *prev_f;

View File

@ -1,3 +1,17 @@
2004-01-14 Maciej W. Rozycki <macro@ds2.pg.gda.pl>
* gas/mips/relax-swap1-mips1.d: New test for branch relaxation
with swapping for MIPS1.
* gas/mips/relax-swap1-mips2.d: New test for branch relaxation
with swapping for MIPS2.
* gas/mips/relax-swap1.l: Stderr output for the new tests.
* gas/mips/relax-swap1.s: Source for the new tests.
* gas/mips/relax-swap2.d: New test for branch likely relaxation
with swapping.
* gas/mips/relax-swap2.l: Stderr output for the new test.
* gas/mips/relax-swap2.s: Source for the new test.
* gas/mips/mips.exp: Run the new tests.
2004-01-13 Ian Lance Taylor <ian@wasabisystems.com>
* gas/mips/mips16-64.d: New test.

View File

@ -589,6 +589,9 @@ if { [istarget mips*-*-*] } then {
}
run_dump_test "relax"
run_dump_test "relax-swap1-mips1"
run_dump_test "relax-swap1-mips2"
run_dump_test "relax-swap2"
run_list_test "illegal" "-32"
run_list_test "baddata1" "-32"

View File

@ -0,0 +1,311 @@
#objdump: -dr --prefix-addresses -mmips:3000
#name: MIPS1 branch relaxation with swapping
#as: -32 -mips1 -KPIC -relax-branch
#source: relax-swap1.s
#stderr: relax-swap1.l
.*: +file format .*mips.*
Disassembly of section \.text:
0+0000 <[^>]*> b 00000000 <foo>
0+0004 <[^>]*> move v0,a0
0+0008 <[^>]*> lw at,2\(gp\)
[ ]*8: R_MIPS_GOT16 \.text
0+000c <[^>]*> nop
0+0010 <[^>]*> addiu at,at,1000
[ ]*10: R_MIPS_LO16 \.text
0+0014 <[^>]*> jr at
0+0018 <[^>]*> move v0,a0
0+001c <[^>]*> lw v0,0\(a0\)
0+0020 <[^>]*> b 00000000 <foo>
0+0024 <[^>]*> nop
0+0028 <[^>]*> lw v0,0\(a0\)
0+002c <[^>]*> lw at,2\(gp\)
[ ]*2c: R_MIPS_GOT16 \.text
0+0030 <[^>]*> nop
0+0034 <[^>]*> addiu at,at,1000
[ ]*34: R_MIPS_LO16 \.text
0+0038 <[^>]*> jr at
0+003c <[^>]*> nop
0+0040 <[^>]*> b 00000000 <foo>
0+0044 <[^>]*> sw v0,0\(a0\)
0+0048 <[^>]*> lw at,2\(gp\)
[ ]*48: R_MIPS_GOT16 \.text
0+004c <[^>]*> nop
0+0050 <[^>]*> addiu at,at,1000
[ ]*50: R_MIPS_LO16 \.text
0+0054 <[^>]*> jr at
0+0058 <[^>]*> sw v0,0\(a0\)
0+005c <[^>]*> move v0,a0
0+0060 <[^>]*> beq v0,v1,00000000 <foo>
0+0064 <[^>]*> nop
0+0068 <[^>]*> move v0,a0
0+006c <[^>]*> bne v0,v1,00000084 <foo\+0x84>
0+0070 <[^>]*> nop
0+0074 <[^>]*> lw at,2\(gp\)
[ ]*74: R_MIPS_GOT16 \.text
0+0078 <[^>]*> nop
0+007c <[^>]*> addiu at,at,1000
[ ]*7c: R_MIPS_LO16 \.text
0+0080 <[^>]*> jr at
0+0084 <[^>]*> nop
0+0088 <[^>]*> beq a0,a1,00000000 <foo>
0+008c <[^>]*> move v0,a0
0+0090 <[^>]*> bne a0,a1,000000a8 <foo\+0xa8>
0+0094 <[^>]*> nop
0+0098 <[^>]*> lw at,2\(gp\)
[ ]*98: R_MIPS_GOT16 \.text
0+009c <[^>]*> nop
0+00a0 <[^>]*> addiu at,at,1000
[ ]*a0: R_MIPS_LO16 \.text
0+00a4 <[^>]*> jr at
0+00a8 <[^>]*> move v0,a0
0+00ac <[^>]*> addiu v0,a0,1
0+00b0 <[^>]*> beq v0,v1,00000000 <foo>
0+00b4 <[^>]*> nop
0+00b8 <[^>]*> addiu v0,a0,1
0+00bc <[^>]*> bne v0,v1,000000d4 <foo\+0xd4>
0+00c0 <[^>]*> nop
0+00c4 <[^>]*> lw at,2\(gp\)
[ ]*c4: R_MIPS_GOT16 \.text
0+00c8 <[^>]*> nop
0+00cc <[^>]*> addiu at,at,1000
[ ]*cc: R_MIPS_LO16 \.text
0+00d0 <[^>]*> jr at
0+00d4 <[^>]*> nop
0+00d8 <[^>]*> beq a0,a1,00000000 <foo>
0+00dc <[^>]*> addiu v0,a0,1
0+00e0 <[^>]*> bne a0,a1,000000f8 <foo\+0xf8>
0+00e4 <[^>]*> nop
0+00e8 <[^>]*> lw at,2\(gp\)
[ ]*e8: R_MIPS_GOT16 \.text
0+00ec <[^>]*> nop
0+00f0 <[^>]*> addiu at,at,1000
[ ]*f0: R_MIPS_LO16 \.text
0+00f4 <[^>]*> jr at
0+00f8 <[^>]*> addiu v0,a0,1
0+00fc <[^>]*> lw v0,0\(a0\)
0+0100 <[^>]*> nop
0+0104 <[^>]*> beq v0,v1,00000000 <foo>
0+0108 <[^>]*> nop
0+010c <[^>]*> lw v0,0\(a0\)
0+0110 <[^>]*> nop
0+0114 <[^>]*> bne v0,v1,0000012c <foo\+0x12c>
0+0118 <[^>]*> nop
0+011c <[^>]*> lw at,2\(gp\)
[ ]*11c: R_MIPS_GOT16 \.text
0+0120 <[^>]*> nop
0+0124 <[^>]*> addiu at,at,1000
[ ]*124: R_MIPS_LO16 \.text
0+0128 <[^>]*> jr at
0+012c <[^>]*> nop
0+0130 <[^>]*> lw v0,0\(a0\)
0+0134 <[^>]*> beq a0,a1,00000000 <foo>
0+0138 <[^>]*> nop
0+013c <[^>]*> lw v0,0\(a0\)
0+0140 <[^>]*> bne a0,a1,00000158 <foo\+0x158>
0+0144 <[^>]*> nop
0+0148 <[^>]*> lw at,2\(gp\)
[ ]*148: R_MIPS_GOT16 \.text
0+014c <[^>]*> nop
0+0150 <[^>]*> addiu at,at,1000
[ ]*150: R_MIPS_LO16 \.text
0+0154 <[^>]*> jr at
0+0158 <[^>]*> nop
0+015c <[^>]*> beq v0,v1,00000000 <foo>
0+0160 <[^>]*> sw v0,0\(a0\)
0+0164 <[^>]*> bne v0,v1,0000017c <foo\+0x17c>
0+0168 <[^>]*> nop
0+016c <[^>]*> lw at,2\(gp\)
[ ]*16c: R_MIPS_GOT16 \.text
0+0170 <[^>]*> nop
0+0174 <[^>]*> addiu at,at,1000
[ ]*174: R_MIPS_LO16 \.text
0+0178 <[^>]*> jr at
0+017c <[^>]*> sw v0,0\(a0\)
0+0180 <[^>]*> beq a0,a1,00000000 <foo>
0+0184 <[^>]*> sw v0,0\(a0\)
0+0188 <[^>]*> bne a0,a1,000001a0 <foo\+0x1a0>
0+018c <[^>]*> nop
0+0190 <[^>]*> lw at,2\(gp\)
[ ]*190: R_MIPS_GOT16 \.text
0+0194 <[^>]*> nop
0+0198 <[^>]*> addiu at,at,1000
[ ]*198: R_MIPS_LO16 \.text
0+019c <[^>]*> jr at
0+01a0 <[^>]*> sw v0,0\(a0\)
0+01a4 <[^>]*> mfc1 v0,\$f0
0+01a8 <[^>]*> move a2,a3
0+01ac <[^>]*> beq v0,v1,00000000 <foo>
0+01b0 <[^>]*> nop
0+01b4 <[^>]*> mfc1 v0,\$f0
0+01b8 <[^>]*> move a2,a3
0+01bc <[^>]*> bne v0,v1,000001d4 <foo\+0x1d4>
0+01c0 <[^>]*> nop
0+01c4 <[^>]*> lw at,2\(gp\)
[ ]*1c4: R_MIPS_GOT16 \.text
0+01c8 <[^>]*> nop
0+01cc <[^>]*> addiu at,at,1000
[ ]*1cc: R_MIPS_LO16 \.text
0+01d0 <[^>]*> jr at
0+01d4 <[^>]*> nop
0+01d8 <[^>]*> mfc1 v0,\$f0
0+01dc <[^>]*> beq a0,a1,00000000 <foo>
0+01e0 <[^>]*> move a2,a3
0+01e4 <[^>]*> mfc1 v0,\$f0
0+01e8 <[^>]*> bne a0,a1,00000200 <foo\+0x200>
0+01ec <[^>]*> nop
0+01f0 <[^>]*> lw at,2\(gp\)
[ ]*1f0: R_MIPS_GOT16 \.text
0+01f4 <[^>]*> nop
0+01f8 <[^>]*> addiu at,at,1000
[ ]*1f8: R_MIPS_LO16 \.text
0+01fc <[^>]*> jr at
0+0200 <[^>]*> move a2,a3
0+0204 <[^>]*> move v0,a0
0+0208 <[^>]*> bc1t 00000000 <foo>
0+020c <[^>]*> nop
0+0210 <[^>]*> move v0,a0
0+0214 <[^>]*> bc1f 0000022c <foo\+0x22c>
0+0218 <[^>]*> nop
0+021c <[^>]*> lw at,2\(gp\)
[ ]*21c: R_MIPS_GOT16 \.text
0+0220 <[^>]*> nop
0+0224 <[^>]*> addiu at,at,1000
[ ]*224: R_MIPS_LO16 \.text
0+0228 <[^>]*> jr at
0+022c <[^>]*> nop
0+0230 <[^>]*> move v0,a0
0+0234 <[^>]*> b 00000000 <foo>
0+0238 <[^>]*> nop
0+023c <[^>]*> move v0,a0
0+0240 <[^>]*> lw at,2\(gp\)
[ ]*240: R_MIPS_GOT16 \.text
0+0244 <[^>]*> nop
0+0248 <[^>]*> addiu at,at,1000
[ ]*248: R_MIPS_LO16 \.text
0+024c <[^>]*> jr at
0+0250 <[^>]*> nop
0+0254 <[^>]*> move v0,a0
0+0258 <[^>]*> b 00000000 <foo>
0+025c <[^>]*> nop
0+0260 <[^>]*> move v0,a0
0+0264 <[^>]*> lw at,2\(gp\)
[ ]*264: R_MIPS_GOT16 \.text
0+0268 <[^>]*> nop
0+026c <[^>]*> addiu at,at,1000
[ ]*26c: R_MIPS_LO16 \.text
0+0270 <[^>]*> jr at
0+0274 <[^>]*> nop
0+0278 <[^>]*> move a2,a3
0+027c <[^>]*> move v0,a0
0+0280 <[^>]*> b 00000000 <foo>
0+0284 <[^>]*> nop
0+0288 <[^>]*> move a2,a3
0+028c <[^>]*> move v0,a0
0+0290 <[^>]*> lw at,2\(gp\)
[ ]*290: R_MIPS_GOT16 \.text
0+0294 <[^>]*> nop
0+0298 <[^>]*> addiu at,at,1000
[ ]*298: R_MIPS_LO16 \.text
0+029c <[^>]*> jr at
0+02a0 <[^>]*> nop
0+02a4 <[^>]*> lw at,0\(gp\)
[ ]*2a4: R_MIPS_GOT16 \.text
0+02a8 <[^>]*> nop
0+02ac <[^>]*> addiu at,at,692
[ ]*2ac: R_MIPS_LO16 \.text
0+02b0 <[^>]*> sw v0,0\(at\)
0+02b4 <[^>]*> b 00000000 <foo>
0+02b8 <[^>]*> nop
0+02bc <[^>]*> lw at,0\(gp\)
[ ]*2bc: R_MIPS_GOT16 \.text
0+02c0 <[^>]*> nop
0+02c4 <[^>]*> addiu at,at,716
[ ]*2c4: R_MIPS_LO16 \.text
0+02c8 <[^>]*> sw v0,0\(at\)
0+02cc <[^>]*> lw at,2\(gp\)
[ ]*2cc: R_MIPS_GOT16 \.text
0+02d0 <[^>]*> nop
0+02d4 <[^>]*> addiu at,at,1000
[ ]*2d4: R_MIPS_LO16 \.text
0+02d8 <[^>]*> jr at
0+02dc <[^>]*> nop
0+02e0 <[^>]*> lwc1 \$f0,0\(a0\)
0+02e4 <[^>]*> b 00000000 <foo>
0+02e8 <[^>]*> nop
0+02ec <[^>]*> lwc1 \$f0,0\(a0\)
0+02f0 <[^>]*> lw at,2\(gp\)
[ ]*2f0: R_MIPS_GOT16 \.text
0+02f4 <[^>]*> nop
0+02f8 <[^>]*> addiu at,at,1000
[ ]*2f8: R_MIPS_LO16 \.text
0+02fc <[^>]*> jr at
0+0300 <[^>]*> nop
0+0304 <[^>]*> cfc1 v0,\$31
0+0308 <[^>]*> b 00000000 <foo>
0+030c <[^>]*> nop
0+0310 <[^>]*> cfc1 v0,\$31
0+0314 <[^>]*> lw at,2\(gp\)
[ ]*314: R_MIPS_GOT16 \.text
0+0318 <[^>]*> nop
0+031c <[^>]*> addiu at,at,1000
[ ]*31c: R_MIPS_LO16 \.text
0+0320 <[^>]*> jr at
0+0324 <[^>]*> nop
0+0328 <[^>]*> ctc1 v0,\$31
0+032c <[^>]*> b 00000000 <foo>
0+0330 <[^>]*> nop
0+0334 <[^>]*> ctc1 v0,\$31
0+0338 <[^>]*> lw at,2\(gp\)
[ ]*338: R_MIPS_GOT16 \.text
0+033c <[^>]*> nop
0+0340 <[^>]*> addiu at,at,1000
[ ]*340: R_MIPS_LO16 \.text
0+0344 <[^>]*> jr at
0+0348 <[^>]*> nop
0+034c <[^>]*> mtc1 v0,\$f31
0+0350 <[^>]*> b 00000000 <foo>
0+0354 <[^>]*> nop
0+0358 <[^>]*> mtc1 v0,\$f31
0+035c <[^>]*> lw at,2\(gp\)
[ ]*35c: R_MIPS_GOT16 \.text
0+0360 <[^>]*> nop
0+0364 <[^>]*> addiu at,at,1000
[ ]*364: R_MIPS_LO16 \.text
0+0368 <[^>]*> jr at
0+036c <[^>]*> nop
0+0370 <[^>]*> mfhi v0
0+0374 <[^>]*> b 00000000 <foo>
0+0378 <[^>]*> nop
0+037c <[^>]*> mfhi v0
0+0380 <[^>]*> lw at,2\(gp\)
[ ]*380: R_MIPS_GOT16 \.text
0+0384 <[^>]*> nop
0+0388 <[^>]*> addiu at,at,1000
[ ]*388: R_MIPS_LO16 \.text
0+038c <[^>]*> jr at
0+0390 <[^>]*> nop
0+0394 <[^>]*> move v0,a0
0+0398 <[^>]*> jr v0
0+039c <[^>]*> nop
0+03a0 <[^>]*> jr a0
0+03a4 <[^>]*> move v0,a0
0+03a8 <[^>]*> move v0,a0
0+03ac <[^>]*> jalr v0
0+03b0 <[^>]*> nop
0+03b4 <[^>]*> jalr a0
0+03b8 <[^>]*> move v0,a0
0+03bc <[^>]*> move v0,ra
0+03c0 <[^>]*> jalr v1
0+03c4 <[^>]*> nop
0+03c8 <[^>]*> move ra,a0
0+03cc <[^>]*> jalr a1
0+03d0 <[^>]*> nop
0+03d4 <[^>]*> jalr v0,v1
0+03d8 <[^>]*> move ra,a0
0+03dc <[^>]*> move v0,ra
0+03e0 <[^>]*> jalr v0,v1
0+03e4 <[^>]*> nop
\.\.\.
\.\.\.

View File

@ -0,0 +1,280 @@
#objdump: -dr --prefix-addresses -mmips:6000
#name: MIPS2 branch relaxation with swapping
#as: -32 -mips2 -KPIC -relax-branch
#source: relax-swap1.s
#stderr: relax-swap1.l
.*: +file format .*mips.*
Disassembly of section \.text:
0+0000 <[^>]*> b 00000000 <foo>
0+0004 <[^>]*> move v0,a0
0+0008 <[^>]*> lw at,2\(gp\)
[ ]*8: R_MIPS_GOT16 \.text
0+000c <[^>]*> addiu at,at,876
[ ]*c: R_MIPS_LO16 \.text
0+0010 <[^>]*> jr at
0+0014 <[^>]*> move v0,a0
0+0018 <[^>]*> b 00000000 <foo>
0+001c <[^>]*> lw v0,0\(a0\)
0+0020 <[^>]*> lw at,2\(gp\)
[ ]*20: R_MIPS_GOT16 \.text
0+0024 <[^>]*> addiu at,at,876
[ ]*24: R_MIPS_LO16 \.text
0+0028 <[^>]*> jr at
0+002c <[^>]*> lw v0,0\(a0\)
0+0030 <[^>]*> b 00000000 <foo>
0+0034 <[^>]*> sw v0,0\(a0\)
0+0038 <[^>]*> lw at,2\(gp\)
[ ]*38: R_MIPS_GOT16 \.text
0+003c <[^>]*> addiu at,at,876
[ ]*3c: R_MIPS_LO16 \.text
0+0040 <[^>]*> jr at
0+0044 <[^>]*> sw v0,0\(a0\)
0+0048 <[^>]*> move v0,a0
0+004c <[^>]*> beq v0,v1,00000000 <foo>
0+0050 <[^>]*> nop
0+0054 <[^>]*> move v0,a0
0+0058 <[^>]*> bne v0,v1,0000006c <foo\+0x6c>
0+005c <[^>]*> nop
0+0060 <[^>]*> lw at,2\(gp\)
[ ]*60: R_MIPS_GOT16 \.text
0+0064 <[^>]*> addiu at,at,876
[ ]*64: R_MIPS_LO16 \.text
0+0068 <[^>]*> jr at
0+006c <[^>]*> nop
0+0070 <[^>]*> beq a0,a1,00000000 <foo>
0+0074 <[^>]*> move v0,a0
0+0078 <[^>]*> bne a0,a1,0000008c <foo\+0x8c>
0+007c <[^>]*> nop
0+0080 <[^>]*> lw at,2\(gp\)
[ ]*80: R_MIPS_GOT16 \.text
0+0084 <[^>]*> addiu at,at,876
[ ]*84: R_MIPS_LO16 \.text
0+0088 <[^>]*> jr at
0+008c <[^>]*> move v0,a0
0+0090 <[^>]*> addiu v0,a0,1
0+0094 <[^>]*> beq v0,v1,00000000 <foo>
0+0098 <[^>]*> nop
0+009c <[^>]*> addiu v0,a0,1
0+00a0 <[^>]*> bne v0,v1,000000b4 <foo\+0xb4>
0+00a4 <[^>]*> nop
0+00a8 <[^>]*> lw at,2\(gp\)
[ ]*a8: R_MIPS_GOT16 \.text
0+00ac <[^>]*> addiu at,at,876
[ ]*ac: R_MIPS_LO16 \.text
0+00b0 <[^>]*> jr at
0+00b4 <[^>]*> nop
0+00b8 <[^>]*> beq a0,a1,00000000 <foo>
0+00bc <[^>]*> addiu v0,a0,1
0+00c0 <[^>]*> bne a0,a1,000000d4 <foo\+0xd4>
0+00c4 <[^>]*> nop
0+00c8 <[^>]*> lw at,2\(gp\)
[ ]*c8: R_MIPS_GOT16 \.text
0+00cc <[^>]*> addiu at,at,876
[ ]*cc: R_MIPS_LO16 \.text
0+00d0 <[^>]*> jr at
0+00d4 <[^>]*> addiu v0,a0,1
0+00d8 <[^>]*> lw v0,0\(a0\)
0+00dc <[^>]*> beq v0,v1,00000000 <foo>
0+00e0 <[^>]*> nop
0+00e4 <[^>]*> lw v0,0\(a0\)
0+00e8 <[^>]*> bne v0,v1,000000fc <foo\+0xfc>
0+00ec <[^>]*> nop
0+00f0 <[^>]*> lw at,2\(gp\)
[ ]*f0: R_MIPS_GOT16 \.text
0+00f4 <[^>]*> addiu at,at,876
[ ]*f4: R_MIPS_LO16 \.text
0+00f8 <[^>]*> jr at
0+00fc <[^>]*> nop
0+0100 <[^>]*> beq a0,a1,00000000 <foo>
0+0104 <[^>]*> lw v0,0\(a0\)
0+0108 <[^>]*> bne a0,a1,0000011c <foo\+0x11c>
0+010c <[^>]*> nop
0+0110 <[^>]*> lw at,2\(gp\)
[ ]*110: R_MIPS_GOT16 \.text
0+0114 <[^>]*> addiu at,at,876
[ ]*114: R_MIPS_LO16 \.text
0+0118 <[^>]*> jr at
0+011c <[^>]*> lw v0,0\(a0\)
0+0120 <[^>]*> beq v0,v1,00000000 <foo>
0+0124 <[^>]*> sw v0,0\(a0\)
0+0128 <[^>]*> bne v0,v1,0000013c <foo\+0x13c>
0+012c <[^>]*> nop
0+0130 <[^>]*> lw at,2\(gp\)
[ ]*130: R_MIPS_GOT16 \.text
0+0134 <[^>]*> addiu at,at,876
[ ]*134: R_MIPS_LO16 \.text
0+0138 <[^>]*> jr at
0+013c <[^>]*> sw v0,0\(a0\)
0+0140 <[^>]*> beq a0,a1,00000000 <foo>
0+0144 <[^>]*> sw v0,0\(a0\)
0+0148 <[^>]*> bne a0,a1,0000015c <foo\+0x15c>
0+014c <[^>]*> nop
0+0150 <[^>]*> lw at,2\(gp\)
[ ]*150: R_MIPS_GOT16 \.text
0+0154 <[^>]*> addiu at,at,876
[ ]*154: R_MIPS_LO16 \.text
0+0158 <[^>]*> jr at
0+015c <[^>]*> sw v0,0\(a0\)
0+0160 <[^>]*> mfc1 v0,\$f0
0+0164 <[^>]*> move a2,a3
0+0168 <[^>]*> beq v0,v1,00000000 <foo>
0+016c <[^>]*> nop
0+0170 <[^>]*> mfc1 v0,\$f0
0+0174 <[^>]*> move a2,a3
0+0178 <[^>]*> bne v0,v1,0000018c <foo\+0x18c>
0+017c <[^>]*> nop
0+0180 <[^>]*> lw at,2\(gp\)
[ ]*180: R_MIPS_GOT16 \.text
0+0184 <[^>]*> addiu at,at,876
[ ]*184: R_MIPS_LO16 \.text
0+0188 <[^>]*> jr at
0+018c <[^>]*> nop
0+0190 <[^>]*> mfc1 v0,\$f0
0+0194 <[^>]*> beq a0,a1,00000000 <foo>
0+0198 <[^>]*> move a2,a3
0+019c <[^>]*> mfc1 v0,\$f0
0+01a0 <[^>]*> bne a0,a1,000001b4 <foo\+0x1b4>
0+01a4 <[^>]*> nop
0+01a8 <[^>]*> lw at,2\(gp\)
[ ]*1a8: R_MIPS_GOT16 \.text
0+01ac <[^>]*> addiu at,at,876
[ ]*1ac: R_MIPS_LO16 \.text
0+01b0 <[^>]*> jr at
0+01b4 <[^>]*> move a2,a3
0+01b8 <[^>]*> move v0,a0
0+01bc <[^>]*> bc1t 00000000 <foo>
0+01c0 <[^>]*> nop
0+01c4 <[^>]*> move v0,a0
0+01c8 <[^>]*> bc1f 000001dc <foo\+0x1dc>
0+01cc <[^>]*> nop
0+01d0 <[^>]*> lw at,2\(gp\)
[ ]*1d0: R_MIPS_GOT16 \.text
0+01d4 <[^>]*> addiu at,at,876
[ ]*1d4: R_MIPS_LO16 \.text
0+01d8 <[^>]*> jr at
0+01dc <[^>]*> nop
0+01e0 <[^>]*> move v0,a0
0+01e4 <[^>]*> b 00000000 <foo>
0+01e8 <[^>]*> nop
0+01ec <[^>]*> move v0,a0
0+01f0 <[^>]*> lw at,2\(gp\)
[ ]*1f0: R_MIPS_GOT16 \.text
0+01f4 <[^>]*> addiu at,at,876
[ ]*1f4: R_MIPS_LO16 \.text
0+01f8 <[^>]*> jr at
0+01fc <[^>]*> nop
0+0200 <[^>]*> move v0,a0
0+0204 <[^>]*> b 00000000 <foo>
0+0208 <[^>]*> nop
0+020c <[^>]*> move v0,a0
0+0210 <[^>]*> lw at,2\(gp\)
[ ]*210: R_MIPS_GOT16 \.text
0+0214 <[^>]*> addiu at,at,876
[ ]*214: R_MIPS_LO16 \.text
0+0218 <[^>]*> jr at
0+021c <[^>]*> nop
0+0220 <[^>]*> move a2,a3
0+0224 <[^>]*> move v0,a0
0+0228 <[^>]*> b 00000000 <foo>
0+022c <[^>]*> nop
0+0230 <[^>]*> move a2,a3
0+0234 <[^>]*> move v0,a0
0+0238 <[^>]*> lw at,2\(gp\)
[ ]*238: R_MIPS_GOT16 \.text
0+023c <[^>]*> addiu at,at,876
[ ]*23c: R_MIPS_LO16 \.text
0+0240 <[^>]*> jr at
0+0244 <[^>]*> nop
0+0248 <[^>]*> lw at,0\(gp\)
[ ]*248: R_MIPS_GOT16 \.text
0+024c <[^>]*> nop
0+0250 <[^>]*> addiu at,at,600
[ ]*250: R_MIPS_LO16 \.text
0+0254 <[^>]*> sw v0,0\(at\)
0+0258 <[^>]*> b 00000000 <foo>
0+025c <[^>]*> nop
0+0260 <[^>]*> lw at,0\(gp\)
[ ]*260: R_MIPS_GOT16 \.text
0+0264 <[^>]*> nop
0+0268 <[^>]*> addiu at,at,624
[ ]*268: R_MIPS_LO16 \.text
0+026c <[^>]*> sw v0,0\(at\)
0+0270 <[^>]*> lw at,2\(gp\)
[ ]*270: R_MIPS_GOT16 \.text
0+0274 <[^>]*> addiu at,at,876
[ ]*274: R_MIPS_LO16 \.text
0+0278 <[^>]*> jr at
0+027c <[^>]*> nop
0+0280 <[^>]*> b 00000000 <foo>
0+0284 <[^>]*> lwc1 \$f0,0\(a0\)
0+0288 <[^>]*> lw at,2\(gp\)
[ ]*288: R_MIPS_GOT16 \.text
0+028c <[^>]*> addiu at,at,876
[ ]*28c: R_MIPS_LO16 \.text
0+0290 <[^>]*> jr at
0+0294 <[^>]*> lwc1 \$f0,0\(a0\)
0+0298 <[^>]*> cfc1 v0,\$31
0+029c <[^>]*> b 00000000 <foo>
0+02a0 <[^>]*> nop
0+02a4 <[^>]*> cfc1 v0,\$31
0+02a8 <[^>]*> lw at,2\(gp\)
[ ]*2a8: R_MIPS_GOT16 \.text
0+02ac <[^>]*> addiu at,at,876
[ ]*2ac: R_MIPS_LO16 \.text
0+02b0 <[^>]*> jr at
0+02b4 <[^>]*> nop
0+02b8 <[^>]*> ctc1 v0,\$31
0+02bc <[^>]*> b 00000000 <foo>
0+02c0 <[^>]*> nop
0+02c4 <[^>]*> ctc1 v0,\$31
0+02c8 <[^>]*> lw at,2\(gp\)
[ ]*2c8: R_MIPS_GOT16 \.text
0+02cc <[^>]*> addiu at,at,876
[ ]*2cc: R_MIPS_LO16 \.text
0+02d0 <[^>]*> jr at
0+02d4 <[^>]*> nop
0+02d8 <[^>]*> mtc1 v0,\$f31
0+02dc <[^>]*> b 00000000 <foo>
0+02e0 <[^>]*> nop
0+02e4 <[^>]*> mtc1 v0,\$f31
0+02e8 <[^>]*> lw at,2\(gp\)
[ ]*2e8: R_MIPS_GOT16 \.text
0+02ec <[^>]*> addiu at,at,876
[ ]*2ec: R_MIPS_LO16 \.text
0+02f0 <[^>]*> jr at
0+02f4 <[^>]*> nop
0+02f8 <[^>]*> mfhi v0
0+02fc <[^>]*> b 00000000 <foo>
0+0300 <[^>]*> nop
0+0304 <[^>]*> mfhi v0
0+0308 <[^>]*> lw at,2\(gp\)
[ ]*308: R_MIPS_GOT16 \.text
0+030c <[^>]*> addiu at,at,876
[ ]*30c: R_MIPS_LO16 \.text
0+0310 <[^>]*> jr at
0+0314 <[^>]*> nop
0+0318 <[^>]*> move v0,a0
0+031c <[^>]*> jr v0
0+0320 <[^>]*> nop
0+0324 <[^>]*> jr a0
0+0328 <[^>]*> move v0,a0
0+032c <[^>]*> move v0,a0
0+0330 <[^>]*> jalr v0
0+0334 <[^>]*> nop
0+0338 <[^>]*> jalr a0
0+033c <[^>]*> move v0,a0
0+0340 <[^>]*> move v0,ra
0+0344 <[^>]*> jalr v1
0+0348 <[^>]*> nop
0+034c <[^>]*> move ra,a0
0+0350 <[^>]*> jalr a1
0+0354 <[^>]*> nop
0+0358 <[^>]*> jalr v0,v1
0+035c <[^>]*> move ra,a0
0+0360 <[^>]*> move v0,ra
0+0364 <[^>]*> jalr v0,v1
0+0368 <[^>]*> nop
\.\.\.
0+2036c <[^>]*> nop

View File

@ -0,0 +1,24 @@
.*: Assembler messages:
.*:9: Warning: relaxed out-of-range branch into a jump
.*:14: Warning: relaxed out-of-range branch into a jump
.*:19: Warning: relaxed out-of-range branch into a jump
.*:24: Warning: relaxed out-of-range branch into a jump
.*:28: Warning: relaxed out-of-range branch into a jump
.*:33: Warning: relaxed out-of-range branch into a jump
.*:37: Warning: relaxed out-of-range branch into a jump
.*:42: Warning: relaxed out-of-range branch into a jump
.*:46: Warning: relaxed out-of-range branch into a jump
.*:51: Warning: relaxed out-of-range branch into a jump
.*:55: Warning: relaxed out-of-range branch into a jump
.*:62: Warning: relaxed out-of-range branch into a jump
.*:68: Warning: relaxed out-of-range branch into a jump
.*:73: Warning: relaxed out-of-range branch into a jump
.*:79: Warning: relaxed out-of-range branch into a jump
.*:85: Warning: relaxed out-of-range branch into a jump
.*:96: Warning: relaxed out-of-range branch into a jump
.*:101: Warning: relaxed out-of-range branch into a jump
.*:106: Warning: relaxed out-of-range branch into a jump
.*:111: Warning: relaxed out-of-range branch into a jump
.*:116: Warning: relaxed out-of-range branch into a jump
.*:121: Warning: relaxed out-of-range branch into a jump
.*:126: Warning: relaxed out-of-range branch into a jump

View File

@ -0,0 +1,149 @@
# Source file used to test branch relaxation with swapping.
.text
foo:
move $2, $4
b foo
move $2, $4
b bar
lw $2, ($4)
b foo
lw $2, ($4)
b bar
sw $2, ($4)
b foo
sw $2, ($4)
b bar
move $2, $4
beq $2, $3, foo
move $2, $4
beq $2, $3, bar
move $2, $4
beq $4, $5, foo
move $2, $4
beq $4, $5, bar
addiu $2, $4, 1
beq $2, $3, foo
addiu $2, $4, 1
beq $2, $3, bar
addiu $2, $4, 1
beq $4, $5, foo
addiu $2, $4, 1
beq $4, $5, bar
lw $2, ($4)
beq $2, $3, foo
lw $2, ($4)
beq $2, $3, bar
lw $2, ($4)
beq $4, $5, foo
lw $2, ($4)
beq $4, $5, bar
sw $2, ($4)
beq $2, $3, foo
sw $2, ($4)
beq $2, $3, bar
sw $2, ($4)
beq $4, $5, foo
sw $2, ($4)
beq $4, $5, bar
mfc1 $2, $0
move $6, $7
beq $2, $3, foo
mfc1 $2, $0
move $6, $7
beq $2, $3, bar
mfc1 $2, $0
move $6, $7
beq $4, $5, foo
mfc1 $2, $0
move $6, $7
beq $4, $5, bar
move $2, $4
bc1t foo
move $2, $4
bc1t bar
.set nomove
move $2, $4
b foo
move $2, $4
b bar
.set move
move $2, $4
0: b foo
move $2, $4
0: b bar
.set noreorder
move $6, $7
.set reorder
move $2, $4
b foo
.set noreorder
move $6, $7
.set reorder
move $2, $4
b bar
sw $2, 0f
0: b foo
sw $2, 0f
0: b bar
lwc1 $0, ($4)
b foo
lwc1 $0, ($4)
b bar
cfc1 $2, $31
b foo
cfc1 $2, $31
b bar
ctc1 $2, $31
b foo
ctc1 $2, $31
b bar
mtc1 $2, $31
b foo
mtc1 $2, $31
b bar
mfhi $2
b foo
mfhi $2
b bar
move $2, $4
jr $2
move $2, $4
jr $4
move $2, $4
jalr $2
move $2, $4
jalr $4
move $2, $31
jalr $3
move $31, $4
jalr $5
move $31, $4
jalr $2, $3
move $2, $31
jalr $2, $3
.space 0x20000 # to make a 128kb loop body
bar:

View File

@ -0,0 +1,135 @@
#objdump: -dr --prefix-addresses -mmips:6000
#name: MIPS2 branch likely relaxation with swapping
#as: -32 -mips2 -KPIC -relax-branch
#source: relax-swap2.s
#stderr: relax-swap2.l
.*: +file format .*mips.*
Disassembly of section \.text:
0+0000 <[^>]*> move v0,a0
0+0004 <[^>]*> beql v0,v1,00000000 <foo>
0+0008 <[^>]*> nop
0+000c <[^>]*> move v0,a0
0+0010 <[^>]*> beql v0,v1,00000020 <foo\+0x20>
0+0014 <[^>]*> nop
0+0018 <[^>]*> beqzl zero,00000030 <foo\+0x30>
0+001c <[^>]*> nop
0+0020 <[^>]*> lw at,2\(gp\)
[ ]*20: R_MIPS_GOT16 \.text
0+0024 <[^>]*> addiu at,at,424
[ ]*24: R_MIPS_LO16 \.text
0+0028 <[^>]*> jr at
0+002c <[^>]*> nop
0+0030 <[^>]*> move v0,a0
0+0034 <[^>]*> beql a0,a1,00000000 <foo>
0+0038 <[^>]*> nop
0+003c <[^>]*> move v0,a0
0+0040 <[^>]*> beql a0,a1,00000050 <foo\+0x50>
0+0044 <[^>]*> nop
0+0048 <[^>]*> beqzl zero,00000060 <foo\+0x60>
0+004c <[^>]*> nop
0+0050 <[^>]*> lw at,2\(gp\)
[ ]*50: R_MIPS_GOT16 \.text
0+0054 <[^>]*> addiu at,at,424
[ ]*54: R_MIPS_LO16 \.text
0+0058 <[^>]*> jr at
0+005c <[^>]*> nop
0+0060 <[^>]*> addiu v0,a0,1
0+0064 <[^>]*> beql v0,v1,00000000 <foo>
0+0068 <[^>]*> nop
0+006c <[^>]*> addiu v0,a0,1
0+0070 <[^>]*> beql v0,v1,00000080 <foo\+0x80>
0+0074 <[^>]*> nop
0+0078 <[^>]*> beqzl zero,00000090 <foo\+0x90>
0+007c <[^>]*> nop
0+0080 <[^>]*> lw at,2\(gp\)
[ ]*80: R_MIPS_GOT16 \.text
0+0084 <[^>]*> addiu at,at,424
[ ]*84: R_MIPS_LO16 \.text
0+0088 <[^>]*> jr at
0+008c <[^>]*> nop
0+0090 <[^>]*> addiu v0,a0,1
0+0094 <[^>]*> beql a0,a1,00000000 <foo>
0+0098 <[^>]*> nop
0+009c <[^>]*> addiu v0,a0,1
0+00a0 <[^>]*> beql a0,a1,000000b0 <foo\+0xb0>
0+00a4 <[^>]*> nop
0+00a8 <[^>]*> beqzl zero,000000c0 <foo\+0xc0>
0+00ac <[^>]*> nop
0+00b0 <[^>]*> lw at,2\(gp\)
[ ]*b0: R_MIPS_GOT16 \.text
0+00b4 <[^>]*> addiu at,at,424
[ ]*b4: R_MIPS_LO16 \.text
0+00b8 <[^>]*> jr at
0+00bc <[^>]*> nop
0+00c0 <[^>]*> lw v0,0\(a0\)
0+00c4 <[^>]*> beql v0,v1,00000000 <foo>
0+00c8 <[^>]*> nop
0+00cc <[^>]*> lw v0,0\(a0\)
0+00d0 <[^>]*> beql v0,v1,000000e0 <foo\+0xe0>
0+00d4 <[^>]*> nop
0+00d8 <[^>]*> beqzl zero,000000f0 <foo\+0xf0>
0+00dc <[^>]*> nop
0+00e0 <[^>]*> lw at,2\(gp\)
[ ]*e0: R_MIPS_GOT16 \.text
0+00e4 <[^>]*> addiu at,at,424
[ ]*e4: R_MIPS_LO16 \.text
0+00e8 <[^>]*> jr at
0+00ec <[^>]*> nop
0+00f0 <[^>]*> lw v0,0\(a0\)
0+00f4 <[^>]*> beql a0,a1,00000000 <foo>
0+00f8 <[^>]*> nop
0+00fc <[^>]*> lw v0,0\(a0\)
0+0100 <[^>]*> beql a0,a1,00000110 <foo\+0x110>
0+0104 <[^>]*> nop
0+0108 <[^>]*> beqzl zero,00000120 <foo\+0x120>
0+010c <[^>]*> nop
0+0110 <[^>]*> lw at,2\(gp\)
[ ]*110: R_MIPS_GOT16 \.text
0+0114 <[^>]*> addiu at,at,424
[ ]*114: R_MIPS_LO16 \.text
0+0118 <[^>]*> jr at
0+011c <[^>]*> nop
0+0120 <[^>]*> sw v0,0\(a0\)
0+0124 <[^>]*> beql v0,v1,00000000 <foo>
0+0128 <[^>]*> nop
0+012c <[^>]*> sw v0,0\(a0\)
0+0130 <[^>]*> beql v0,v1,00000140 <foo\+0x140>
0+0134 <[^>]*> nop
0+0138 <[^>]*> beqzl zero,00000150 <foo\+0x150>
0+013c <[^>]*> nop
0+0140 <[^>]*> lw at,2\(gp\)
[ ]*140: R_MIPS_GOT16 \.text
0+0144 <[^>]*> addiu at,at,424
[ ]*144: R_MIPS_LO16 \.text
0+0148 <[^>]*> jr at
0+014c <[^>]*> nop
0+0150 <[^>]*> sw v0,0\(a0\)
0+0154 <[^>]*> beql a0,a1,00000000 <foo>
0+0158 <[^>]*> nop
0+015c <[^>]*> sw v0,0\(a0\)
0+0160 <[^>]*> beql a0,a1,00000170 <foo\+0x170>
0+0164 <[^>]*> nop
0+0168 <[^>]*> beqzl zero,00000180 <foo\+0x180>
0+016c <[^>]*> nop
0+0170 <[^>]*> lw at,2\(gp\)
[ ]*170: R_MIPS_GOT16 \.text
0+0174 <[^>]*> addiu at,at,424
[ ]*174: R_MIPS_LO16 \.text
0+0178 <[^>]*> jr at
0+017c <[^>]*> nop
0+0180 <[^>]*> teq v0,a0
0+0184 <[^>]*> beq a0,a1,00000000 <foo>
0+0188 <[^>]*> nop
0+018c <[^>]*> teq v0,a0
0+0190 <[^>]*> bne a0,a1,000001a4 <foo\+0x1a4>
0+0194 <[^>]*> nop
0+0198 <[^>]*> lw at,2\(gp\)
[ ]*198: R_MIPS_GOT16 \.text
0+019c <[^>]*> addiu at,at,424
[ ]*19c: R_MIPS_LO16 \.text
0+01a0 <[^>]*> jr at
0+01a4 <[^>]*> nop
\.\.\.
\.\.\.

View File

@ -0,0 +1,10 @@
.*: Assembler messages:
.*:9: Warning: relaxed out-of-range branch into a jump
.*:13: Warning: relaxed out-of-range branch into a jump
.*:18: Warning: relaxed out-of-range branch into a jump
.*:22: Warning: relaxed out-of-range branch into a jump
.*:27: Warning: relaxed out-of-range branch into a jump
.*:31: Warning: relaxed out-of-range branch into a jump
.*:36: Warning: relaxed out-of-range branch into a jump
.*:40: Warning: relaxed out-of-range branch into a jump
.*:45: Warning: relaxed out-of-range branch into a jump

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# Source file used to test branch likely relaxation with swapping.
.text
foo:
move $2, $4
beql $2, $3, foo
move $2, $4
beql $2, $3, bar
move $2, $4
beql $4, $5, foo
move $2, $4
beql $4, $5, bar
addiu $2, $4, 1
beql $2, $3, foo
addiu $2, $4, 1
beql $2, $3, bar
addiu $2, $4, 1
beql $4, $5, foo
addiu $2, $4, 1
beql $4, $5, bar
lw $2, ($4)
beql $2, $3, foo
lw $2, ($4)
beql $2, $3, bar
lw $2, ($4)
beql $4, $5, foo
lw $2, ($4)
beql $4, $5, bar
sw $2, ($4)
beql $2, $3, foo
sw $2, ($4)
beql $2, $3, bar
sw $2, ($4)
beql $4, $5, foo
sw $2, ($4)
beql $4, $5, bar
teq $2, $4
beq $4, $5, foo
teq $2, $4
beq $4, $5, bar
.space 0x20000 # to make a 128kb loop body
bar: