[Patch AArch64] Turn lr, fp, ip0 and ip1 into proper aliases

We got a report from the linux-arm-kernel folks about getting spurious
warnings when building the kernel with binutils 2.29. See
https://www.spinics.net/lists/arm-kernel/msg599929.html

which boils down to this testcase.

$> cat /tmp/tst.s
    lr .req x30
    /tmp/tst.s: Assembler messages:
    /tmp/tst.s:1: Warning: ignoring attempt to redefine built-in register 'lr'

Instead let's treat this as a proper alias at startup time thus
avoiding the problem and treating these as proper aliases
rather than new registers. This means that attempts to redefine
the alias with the same "name" will provoke no warning and attempts
to redefine the alias to something else will provoke the above mentioned
warning.

Tested make check-gas and no regressions.

Ok to apply to trunk (and backport to 2.29 branch)?

Regards
Ramana
This commit is contained in:
Ramana Radhakrishnan 2017-08-15 13:58:01 +01:00
parent bf0ec4c276
commit 8975f86409
7 changed files with 47 additions and 5 deletions

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@ -1,3 +1,13 @@
2017-08-15 Ramana Radhakrishnan <ramana.radhakrishnan@arm.com>
* config/tc-aarch64.c (REGDEF_ALIAS): Define
(reg_names): Update for ip0, ip1, fp, lr to use REGDEF_ALIAS
* doc/c-aarch64.texi: Update documentation on .req.
* testsuite/gas/diagnostic.s: Update
* testsuite/gas/diagnostic.l: Likewise
* testsuite/gas/register_aliases.s: New file.
* testsuite/gas/register_aliases.d: New file.
2017-08-11 H.J. Lu <hongjiu.lu@intel.com>
PR gas/21667

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@ -6772,6 +6772,7 @@ aarch64_canonicalize_symbol_name (char *name)
also have mixed-case names. */
#define REGDEF(s,n,t) { #s, n, REG_TYPE_##t, TRUE }
#define REGDEF_ALIAS(s, n, t) { #s, n, REG_TYPE_##t, FALSE}
#define REGNUM(p,n,t) REGDEF(p##n, n, t)
#define REGSET16(p,t) \
REGNUM(p, 0,t), REGNUM(p, 1,t), REGNUM(p, 2,t), REGNUM(p, 3,t), \
@ -6793,17 +6794,16 @@ static const reg_entry reg_names[] = {
REGSET31 (x, R_64), REGSET31 (X, R_64),
REGSET31 (w, R_32), REGSET31 (W, R_32),
REGDEF_ALIAS (ip0, 16, R_64), REGDEF_ALIAS (IP0, 16, R_64),
REGDEF_ALIAS (ip1, 17, R_64), REGDEF_ALIAS (IP1, 16, R_64),
REGDEF_ALIAS (fp, 29, R_64), REGDEF_ALIAS (FP, 29, R_64),
REGDEF_ALIAS (lr, 30, R_64), REGDEF_ALIAS (LR, 30, R_64),
REGDEF (wsp, 31, SP_32), REGDEF (WSP, 31, SP_32),
REGDEF (sp, 31, SP_64), REGDEF (SP, 31, SP_64),
REGDEF (wzr, 31, Z_32), REGDEF (WZR, 31, Z_32),
REGDEF (xzr, 31, Z_64), REGDEF (XZR, 31, Z_64),
REGDEF (ip0, 16, R_64), REGDEF (IP0, 16, R_64),
REGDEF (ip1, 17, R_64), REGDEF (IP1, 17, R_64),
REGDEF (fp, 29, R_64), REGDEF (FP, 29, R_64),
REGDEF (lr, 30, R_64), REGDEF (LR, 30, R_64),
/* Floating-point single precision registers. */
REGSET (s, FP_S), REGSET (S, FP_S),
@ -6830,6 +6830,7 @@ static const reg_entry reg_names[] = {
};
#undef REGDEF
#undef REGDEF_ALIAS
#undef REGNUM
#undef REGSET16
#undef REGSET31

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@ -363,6 +363,9 @@ example:
foo .req w0
@end smallexample
ip0, ip1, lr and fp are automatically defined to
alias to X16, X17, X30 and X29 respectively.
@c SSSSSSSSSSSSSSSSSSSSSSSSSS
@c TTTTTTTTTTTTTTTTTTTTTTTTTT

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@ -172,3 +172,7 @@
[^:]*:295: Error: invalid use of 'MUL' at operand 4 -- `orr x0,x0,#0xff,mul#1'
[^:]*:296: Error: invalid use of 'MUL' at operand 4 -- `orr x0,x0,#0xfe,mul#255'
[^:]*:297: Error: invalid use of 'MUL' at operand 4 -- `orr x0,x0,#0xfc,mul#256'
[^:]*:299: Warning: ignoring redefinition of register alias 'ip0'
[^:]*:300: Warning: ignoring redefinition of register alias 'ip1'
[^:]*:301: Warning: ignoring redefinition of register alias 'lr'
[^:]*:302: Warning: ignoring redefinition of register alias 'fp'

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@ -295,3 +295,8 @@
orr x0, x0, #0xff, mul #1
orr x0, x0, #0xfe, mul #255
orr x0, x0, #0xfc, mul #256
ip0 .req x0
ip1 .req x1
lr .req x2
fp .req x3

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@ -0,0 +1,10 @@
#objdump: -dr
.*: file format .*
Disassembly of section \.text:
0+ <.*>:
0: 8b1e0210 add x16, x16, x30
4: f90003b0 str x16, \[x29\]
8: f94003b1 ldr x17, \[x29\]

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@ -0,0 +1,9 @@
# test register aliases.
lr .req x30
fp .req x29
ip0 .req x16
ip1 .req x17
add ip0, ip0, lr
str ip0, [fp]
ldr ip1, [fp]