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PR 6825

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* ppc-opc.c (powerpc_opcodes): Enable rfci, mfpmr, mtpmr for e300.
This commit is contained in:
Alan Modra 2008-08-14 13:56:00 +00:00
parent 70df0c05f2
commit 899d85bead
2 changed files with 8 additions and 3 deletions
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5
opcodes/ChangeLog
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@ -1,3 +1,8 @@
2008-08-14 Sebastian Huber <sebastian.huber@embedded-brains.de>
PR 6825
* ppc-opc.c (powerpc_opcodes): Enable rfci, mfpmr, mtpmr for e300.
2008-08-12 H.J. Lu <hongjiu.lu@intel.com> 2008-08-12 H.J. Lu <hongjiu.lu@intel.com>
* i386-opc.tbl: Add syscall and sysret for Cpu64. * i386-opc.tbl: Add syscall and sysret for Cpu64.

6
opcodes/ppc-opc.c
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@ -3081,7 +3081,7 @@ const struct powerpc_opcode powerpc_opcodes[] = {
{"rfdi", XL(19,39), 0xffffffff, E500MC, {0}}, {"rfdi", XL(19,39), 0xffffffff, E500MC, {0}},
{"rfi", XL(19,50), 0xffffffff, COM, {0}}, {"rfi", XL(19,50), 0xffffffff, COM, {0}},
{"rfci", XL(19,51), 0xffffffff, PPC403|BOOKE, {0}}, {"rfci", XL(19,51), 0xffffffff, PPC403|BOOKE|PPCE300, {0}},
{"rfsvc", XL(19,82), 0xffffffff, POWER, {0}}, {"rfsvc", XL(19,82), 0xffffffff, POWER, {0}},
@ -3790,7 +3790,7 @@ const struct powerpc_opcode powerpc_opcodes[] = {
{"div", XO(31,331,0,0), XO_MASK, M601, {RT, RA, RB}}, {"div", XO(31,331,0,0), XO_MASK, M601, {RT, RA, RB}},
{"div.", XO(31,331,0,1), XO_MASK, M601, {RT, RA, RB}}, {"div.", XO(31,331,0,1), XO_MASK, M601, {RT, RA, RB}},
{"mfpmr", X(31,334), X_MASK, PPCPMR, {RT, PMR}}, {"mfpmr", X(31,334), X_MASK, PPCPMR|PPCE300, {RT, PMR}},
{"mfmq", XSPR(31,339, 0), XSPR_MASK, M601, {RT}}, {"mfmq", XSPR(31,339, 0), XSPR_MASK, M601, {RT}},
{"mfxer", XSPR(31,339, 1), XSPR_MASK, COM, {RT}}, {"mfxer", XSPR(31,339, 1), XSPR_MASK, COM, {RT}},
@ -4094,7 +4094,7 @@ const struct powerpc_opcode powerpc_opcodes[] = {
{"divwu", XO(31,459,0,0), XO_MASK, PPC, {RT, RA, RB}}, {"divwu", XO(31,459,0,0), XO_MASK, PPC, {RT, RA, RB}},
{"divwu.", XO(31,459,0,1), XO_MASK, PPC, {RT, RA, RB}}, {"divwu.", XO(31,459,0,1), XO_MASK, PPC, {RT, RA, RB}},
{"mtpmr", X(31,462), X_MASK, PPCPMR, {PMR, RS}}, {"mtpmr", X(31,462), X_MASK, PPCPMR|PPCE300, {PMR, RS}},
{"mtmq", XSPR(31,467, 0), XSPR_MASK, M601, {RS}}, {"mtmq", XSPR(31,467, 0), XSPR_MASK, M601, {RS}},
{"mtxer", XSPR(31,467, 1), XSPR_MASK, COM, {RS}}, {"mtxer", XSPR(31,467, 1), XSPR_MASK, COM, {RS}},