PR 6825
* ppc-opc.c (powerpc_opcodes): Enable rfci, mfpmr, mtpmr for e300.
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@ -1,3 +1,8 @@
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2008-08-14 Sebastian Huber <sebastian.huber@embedded-brains.de>
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PR 6825
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* ppc-opc.c (powerpc_opcodes): Enable rfci, mfpmr, mtpmr for e300.
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2008-08-12 H.J. Lu <hongjiu.lu@intel.com>
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* i386-opc.tbl: Add syscall and sysret for Cpu64.
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@ -3081,7 +3081,7 @@ const struct powerpc_opcode powerpc_opcodes[] = {
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{"rfdi", XL(19,39), 0xffffffff, E500MC, {0}},
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{"rfi", XL(19,50), 0xffffffff, COM, {0}},
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{"rfci", XL(19,51), 0xffffffff, PPC403|BOOKE, {0}},
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{"rfci", XL(19,51), 0xffffffff, PPC403|BOOKE|PPCE300, {0}},
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{"rfsvc", XL(19,82), 0xffffffff, POWER, {0}},
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@ -3790,7 +3790,7 @@ const struct powerpc_opcode powerpc_opcodes[] = {
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{"div", XO(31,331,0,0), XO_MASK, M601, {RT, RA, RB}},
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{"div.", XO(31,331,0,1), XO_MASK, M601, {RT, RA, RB}},
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{"mfpmr", X(31,334), X_MASK, PPCPMR, {RT, PMR}},
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{"mfpmr", X(31,334), X_MASK, PPCPMR|PPCE300, {RT, PMR}},
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{"mfmq", XSPR(31,339, 0), XSPR_MASK, M601, {RT}},
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{"mfxer", XSPR(31,339, 1), XSPR_MASK, COM, {RT}},
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@ -4094,7 +4094,7 @@ const struct powerpc_opcode powerpc_opcodes[] = {
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{"divwu", XO(31,459,0,0), XO_MASK, PPC, {RT, RA, RB}},
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{"divwu.", XO(31,459,0,1), XO_MASK, PPC, {RT, RA, RB}},
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{"mtpmr", X(31,462), X_MASK, PPCPMR, {PMR, RS}},
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{"mtpmr", X(31,462), X_MASK, PPCPMR|PPCE300, {PMR, RS}},
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{"mtmq", XSPR(31,467, 0), XSPR_MASK, M601, {RS}},
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{"mtxer", XSPR(31,467, 1), XSPR_MASK, COM, {RS}},
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