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[AArch64] Range check only resolved relocations. 

2013-05-28  Marcus Shawcroft  <marcus.shawcroft@arm.com>

        * config/tc-aarch64.c (md_apply_fix): Move value range checking
        inside fx_done condition.

2013-05-28  Marcus Shawcroft  <marcus.shawcroft@arm.com>

        * gas/aarch64/adr_1.d: New file.
        * gas/aarch64/adr_1.s: New file.
        * gas/aarch64/b_1.d: New file.
        * gas/aarch64/b_1.s: New file.
        * gas/aarch64/beq_1.d: New file.
        * gas/aarch64/beq_1.s: New file.
        * gas/aarch64/ldr_1.d: New file.
        * gas/aarch64/ldr_1.s: New file.
        * gas/aarch64/tbz_1.d: New file.
        * gas/aarch64/tbz_1.s: New file.
This commit is contained in:
Marcus Shawcroft 2013-05-28 09:43:42 +00:00
parent a73e3634d1
commit 89d2a2a39e
13 changed files with 115 additions and 26 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

5
gas/ChangeLog
View File

@ -1,3 +1,8 @@
2013-05-28 Marcus Shawcroft <marcus.shawcroft@arm.com>
* config/tc-aarch64.c (md_apply_fix): Move value range checking
inside fx_done condition.
2013-05-22 Jürgen Urban <JuergenUrban@gmx.de>
* config/tc-mips.c (macro): Handle M_LQC2_AB and M_SQC2_AB.

53
gas/config/tc-aarch64.c
View File

@ -6341,14 +6341,14 @@ md_apply_fix (fixS * fixP, valueT * valP, segT seg)
break;
case BFD_RELOC_AARCH64_LD_LO19_PCREL:
if (value & 3)
as_bad_where (fixP->fx_file, fixP->fx_line,
_("pc-relative load offset not word aligned"));
if (signed_overflow (value, 21))
as_bad_where (fixP->fx_file, fixP->fx_line,
_("pc-relative load offset out of range"));
if (fixP->fx_done || !seg->use_rela_p)
{
if (value & 3)
as_bad_where (fixP->fx_file, fixP->fx_line,
_("pc-relative load offset not word aligned"));
if (signed_overflow (value, 21))
as_bad_where (fixP->fx_file, fixP->fx_line,
_("pc-relative load offset out of range"));
insn = get_aarch64_insn (buf);
insn |= encode_ld_lit_ofs_19 (value >> 2);
put_aarch64_insn (buf, insn);
@ -6356,11 +6356,11 @@ md_apply_fix (fixS * fixP, valueT * valP, segT seg)
break;
case BFD_RELOC_AARCH64_ADR_LO21_PCREL:
if (signed_overflow (value, 21))
as_bad_where (fixP->fx_file, fixP->fx_line,
_("pc-relative address offset out of range"));
if (fixP->fx_done || !seg->use_rela_p)
{
if (signed_overflow (value, 21))
as_bad_where (fixP->fx_file, fixP->fx_line,
_("pc-relative address offset out of range"));
insn = get_aarch64_insn (buf);
insn |= encode_adr_imm (value);
put_aarch64_insn (buf, insn);
@ -6368,14 +6368,14 @@ md_apply_fix (fixS * fixP, valueT * valP, segT seg)
break;
case BFD_RELOC_AARCH64_BRANCH19:
if (value & 3)
as_bad_where (fixP->fx_file, fixP->fx_line,
_("conditional branch target not word aligned"));
if (signed_overflow (value, 21))
as_bad_where (fixP->fx_file, fixP->fx_line,
_("conditional branch out of range"));
if (fixP->fx_done || !seg->use_rela_p)
{
if (value & 3)
as_bad_where (fixP->fx_file, fixP->fx_line,
_("conditional branch target not word aligned"));
if (signed_overflow (value, 21))
as_bad_where (fixP->fx_file, fixP->fx_line,
_("conditional branch out of range"));
insn = get_aarch64_insn (buf);
insn |= encode_cond_branch_ofs_19 (value >> 2);
put_aarch64_insn (buf, insn);
@ -6383,14 +6383,14 @@ md_apply_fix (fixS * fixP, valueT * valP, segT seg)
break;
case BFD_RELOC_AARCH64_TSTBR14:
if (value & 3)
as_bad_where (fixP->fx_file, fixP->fx_line,
_("conditional branch target not word aligned"));
if (signed_overflow (value, 16))
as_bad_where (fixP->fx_file, fixP->fx_line,
_("conditional branch out of range"));
if (fixP->fx_done || !seg->use_rela_p)
{
if (value & 3)
as_bad_where (fixP->fx_file, fixP->fx_line,
_("conditional branch target not word aligned"));
if (signed_overflow (value, 16))
as_bad_where (fixP->fx_file, fixP->fx_line,
_("conditional branch out of range"));
insn = get_aarch64_insn (buf);
insn |= encode_tst_branch_ofs_14 (value >> 2);
put_aarch64_insn (buf, insn);
@ -6399,13 +6399,14 @@ md_apply_fix (fixS * fixP, valueT * valP, segT seg)
case BFD_RELOC_AARCH64_JUMP26:
case BFD_RELOC_AARCH64_CALL26:
if (value & 3)
as_bad_where (fixP->fx_file, fixP->fx_line,
_("branch target not word aligned"));
if (signed_overflow (value, 28))
as_bad_where (fixP->fx_file, fixP->fx_line, _("branch out of range"));
if (fixP->fx_done || !seg->use_rela_p)
{
if (value & 3)
as_bad_where (fixP->fx_file, fixP->fx_line,
_("branch target not word aligned"));
if (signed_overflow (value, 28))
as_bad_where (fixP->fx_file, fixP->fx_line,
_("branch out of range"));
insn = get_aarch64_insn (buf);
insn |= encode_branch_ofs_26 (value >> 2);
put_aarch64_insn (buf, insn);

13
gas/testsuite/ChangeLog
View File

@ -1,3 +1,16 @@
2013-05-28 Marcus Shawcroft <marcus.shawcroft@arm.com>
* gas/aarch64/adr_1.d: New file.
* gas/aarch64/adr_1.s: New file.
* gas/aarch64/b_1.d: New file.
* gas/aarch64/b_1.s: New file.
* gas/aarch64/beq_1.d: New file.
* gas/aarch64/beq_1.s: New file.
* gas/aarch64/ldr_1.d: New file.
* gas/aarch64/ldr_1.s: New file.
* gas/aarch64/tbz_1.d: New file.
* gas/aarch64/tbz_1.s: New file.
2013-05-24 Richard Sandiford <rsandifo@linux.vnet.ibm.com>
* gas/s390/zarch-z9-109-err.s, gas/s390/zarch-z9-109-err.l: New test.

9
gas/testsuite/gas/aarch64/adr_1.d Normal file
View File

@ -0,0 +1,9 @@
#objdump: -dr
.*: file format .*
Disassembly of section \.text:
0000000000000000 <.*>:
0: 10000001 adr x1, 0 <bar>
0: R_AARCH64_ADR_PREL_LO21 bar\+0x80000000

5
gas/testsuite/gas/aarch64/adr_1.s Normal file
View File

@ -0,0 +1,5 @@
// adr.s Test file for AArch64 adr.
.text
adr x1, bar + 0x80000000

9
gas/testsuite/gas/aarch64/b_1.d Normal file
View File

@ -0,0 +1,9 @@
#objdump: -dr
.*: file format .*
Disassembly of section \.text:
0000000000000000 <.*>:
0: 14000000 b 0 <bar>
0: R_AARCH64_JUMP26 bar\+0x8000000

5
gas/testsuite/gas/aarch64/b_1.s Normal file
View File

@ -0,0 +1,5 @@
// b.s Test file for AArch64 b.
.text
b bar + 0x8000000

9
gas/testsuite/gas/aarch64/beq_1.d Normal file
View File

@ -0,0 +1,9 @@
#objdump: -dr
.*: file format .*
Disassembly of section \.text:
0000000000000000 <.*>:
0: 54000000 b.eq 0 <bar>
0: R_AARCH64_CONDBR19 bar\+0x100000

5
gas/testsuite/gas/aarch64/beq_1.s Normal file
View File

@ -0,0 +1,5 @@
// b.s Test file for AArch64 b.
.text
beq bar + 0x100000

9
gas/testsuite/gas/aarch64/ldr_1.d Normal file
View File

@ -0,0 +1,9 @@
#objdump: -dr
.*: file format .*
Disassembly of section \.text:
0000000000000000 <.*>:
0: 58000001 ldr x1, 0 <bar>
0: R_AARCH64_LD_PREL_LO19 bar\+0x100000

5
gas/testsuite/gas/aarch64/ldr_1.s Normal file
View File

@ -0,0 +1,5 @@
// ldr.s Test file for AArch64 ldr.
.text
ldr x1, bar + 0x100000

9
gas/testsuite/gas/aarch64/tbz_1.d Normal file
View File

@ -0,0 +1,9 @@
#objdump: -dr
.*: file format .*
Disassembly of section \.text:
0000000000000000 <.*>:
0: 36080000 tbz w0, #1, 0 <bar>
0: R_AARCH64_TSTBR14 bar\+0x8000

5
gas/testsuite/gas/aarch64/tbz_1.s Normal file
View File

@ -0,0 +1,5 @@
// tbz.s Test file for AArch64 tbz.
.text
tbz x0, #1, bar + 0x8000