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sim: move MACH/MODEL types into SIM_xxx namespace

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The "MACH" and "MODEL" names are a bit generic and collide with symbols
used by other sections of code (like h8300's opcodes).  Since these are
sim-specific types, they really should have a "SIM_" prefix.
This commit is contained in:
Mike Frysinger 2015-12-25 04:12:55 -05:00
parent 91d6df784d
commit 8a0ebee658
33 changed files with 172 additions and 116 deletions
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5
sim/bfin/ChangeLog
View File

@ -1,3 +1,8 @@
2015-12-25 Mike Frysinger <vapier@gentoo.org>
* machs.c: Rename MACH to SIM_MACH, MACH_IMP_PROPERTIES to
SIM_MACH_IMP_PROPERTIES, and MODEL to SIM_MODEL.
2015-12-25 Mike Frysinger <vapier@gentoo.org>
* devices.c (device_error): Delete.

14
sim/bfin/machs.c
View File

@ -29,7 +29,7 @@
#include "dv-bfin_cec.h"
#include "dv-bfin_dmac.h"
static const MACH bfin_mach;
static const SIM_MACH bfin_mach;
struct bfin_memory_layout {
address_word addr, len;
@ -1451,7 +1451,7 @@ dv_bfin_hw_port_parse (SIM_DESC sd, const struct bfin_model_data *mdata,
static void
bfin_model_hw_tree_init (SIM_DESC sd, SIM_CPU *cpu)
{
const MODEL *model = CPU_MODEL (cpu);
const SIM_MODEL *model = CPU_MODEL (cpu);
const struct bfin_model_data *mdata = CPU_MODEL_DATA (cpu);
const struct bfin_board_data *board = STATE_BOARD_DATA (sd);
int mnum = MODEL_NUM (model);
@ -1693,7 +1693,7 @@ bfin_model_map_bfrom (SIM_DESC sd, SIM_CPU *cpu)
void
bfin_model_cpu_init (SIM_DESC sd, SIM_CPU *cpu)
{
const MODEL *model = CPU_MODEL (cpu);
const SIM_MODEL *model = CPU_MODEL (cpu);
const struct bfin_model_data *mdata = CPU_MODEL_DATA (cpu);
int mnum = MODEL_NUM (model);
size_t idx;
@ -1937,7 +1937,7 @@ bfin_prepare_run (SIM_CPU *cpu)
{
}
static const MODEL bfin_models[] =
static const SIM_MODEL bfin_models[] =
{
#define P(n) { "bf"#n, & bfin_mach, MODEL_BF##n, NULL, bfin_model_init },
#include "proc_list.def"
@ -1945,13 +1945,13 @@ static const MODEL bfin_models[] =
{ 0, NULL, 0, NULL, NULL, }
};
static const MACH_IMP_PROPERTIES bfin_imp_properties =
static const SIM_MACH_IMP_PROPERTIES bfin_imp_properties =
{
sizeof (SIM_CPU),
0,
};
static const MACH bfin_mach =
static const SIM_MACH bfin_mach =
{
"bfin", "bfin", MACH_BFIN,
32, 32, & bfin_models[0], & bfin_imp_properties,
@ -1959,7 +1959,7 @@ static const MACH bfin_mach =
bfin_prepare_run
};
const MACH *sim_machs[] =
const SIM_MACH *sim_machs[] =
{
& bfin_mach,
NULL

7
sim/common/ChangeLog
View File

@ -1,3 +1,10 @@
2015-12-25 Mike Frysinger <vapier@gentoo.org>
* sim-cpu.h: Rename MACH to SIM_MACH and MODEL to SIM_MODEL.
* sim-model.c: Likewise.
* sim-model.h: Likewise. Rename MACH_IMP_PROPERTIES to
SIM_MACH_IMP_PROPERTIES
2015-12-25 Mike Frysinger <vapier@gentoo.org>
* sim-core.c (device_error): Delete.

4
sim/common/sim-cpu.h
View File

@ -102,10 +102,10 @@ typedef struct {
#ifdef SIM_HAVE_MODEL
/* Machine tables for this cpu. See sim-model.h. */
const MACH *mach;
const SIM_MACH *mach;
#define CPU_MACH(cpu) ((cpu)->base.mach)
/* The selected model. */
const MODEL *model;
const SIM_MODEL *model;
#define CPU_MODEL(cpu) ((cpu)->base.model)
/* Model data (profiling state, etc.). */
void *model_data;

30
sim/common/sim-model.c
View File

@ -25,7 +25,7 @@ along with this program. If not, see <http://www.gnu.org/licenses/>. */
#include "sim-assert.h"
#include "bfd.h"
static void model_set (sim_cpu *, const MODEL *);
static void model_set (sim_cpu *, const SIM_MODEL *);
static DECLARE_OPTION_HANDLER (model_option_handler);
@ -59,7 +59,7 @@ model_option_handler (SIM_DESC sd, sim_cpu *cpu, int opt,
{
case OPTION_MODEL :
{
const MODEL *model = sim_model_lookup (arg);
const SIM_MODEL *model = sim_model_lookup (arg);
if (! model)
{
sim_io_eprintf (sd, "unknown model `%s'\n", arg);
@ -71,8 +71,8 @@ model_option_handler (SIM_DESC sd, sim_cpu *cpu, int opt,
case OPTION_MODEL_INFO :
{
const MACH **machp;
const MODEL *model;
const SIM_MACH **machp;
const SIM_MODEL *model;
for (machp = & sim_machs[0]; *machp != NULL; ++machp)
{
sim_io_printf (sd, "Models for architecture `%s':\n",
@ -103,7 +103,7 @@ sim_model_install (SIM_DESC sd)
/* Subroutine of sim_model_set to set the model for one cpu. */
static void
model_set (sim_cpu *cpu, const MODEL *model)
model_set (sim_cpu *cpu, const SIM_MODEL *model)
{
CPU_MACH (cpu) = MODEL_MACH (model);
CPU_MODEL (cpu) = model;
@ -115,7 +115,7 @@ model_set (sim_cpu *cpu, const MODEL *model)
If CPU is NULL, all cpus are set to MODEL. */
void
sim_model_set (SIM_DESC sd, sim_cpu *cpu, const MODEL *model)
sim_model_set (SIM_DESC sd, sim_cpu *cpu, const SIM_MODEL *model)
{
if (! cpu)
{
@ -134,11 +134,11 @@ sim_model_set (SIM_DESC sd, sim_cpu *cpu, const MODEL *model)
/* Look up model named NAME.
Result is pointer to MODEL entry or NULL if not found. */
const MODEL *
const SIM_MODEL *
sim_model_lookup (const char *name)
{
const MACH **machp;
const MODEL *model;
const SIM_MACH **machp;
const SIM_MODEL *model;
for (machp = & sim_machs[0]; *machp != NULL; ++machp)
{
@ -154,10 +154,10 @@ sim_model_lookup (const char *name)
/* Look up machine named NAME.
Result is pointer to MACH entry or NULL if not found. */
const MACH *
const SIM_MACH *
sim_mach_lookup (const char *name)
{
const MACH **machp;
const SIM_MACH **machp;
for (machp = & sim_machs[0]; *machp != NULL; ++machp)
{
@ -170,10 +170,10 @@ sim_mach_lookup (const char *name)
/* Look up a machine via its bfd name.
Result is pointer to MACH entry or NULL if not found. */
const MACH *
const SIM_MACH *
sim_mach_lookup_bfd_name (const char *name)
{
const MACH **machp;
const SIM_MACH **machp;
for (machp = & sim_machs[0]; *machp != NULL; ++machp)
{
@ -203,7 +203,7 @@ sim_model_init (SIM_DESC sd)
&& ! CPU_MACH (cpu))
{
/* Set the default model. */
const MODEL *model = sim_model_lookup (WITH_DEFAULT_MODEL);
const SIM_MODEL *model = sim_model_lookup (WITH_DEFAULT_MODEL);
SIM_ASSERT (model != NULL);
sim_model_set (sd, NULL, model);
}
@ -224,7 +224,7 @@ sim_model_init (SIM_DESC sd)
{
/* Use the default model for the selected machine.
The default model is the first one in the list. */
const MACH *mach = sim_mach_lookup_bfd_name (STATE_ARCHITECTURE (sd)->printable_name);
const SIM_MACH *mach = sim_mach_lookup_bfd_name (STATE_ARCHITECTURE (sd)->printable_name);
if (mach == NULL)
{

20
sim/common/sim-model.h
View File

@ -68,7 +68,7 @@ typedef struct {
This is zero if the SCACHE isn't in use for this variant. */
int scache_elm_size;
#define IMP_PROPS_SCACHE_ELM_SIZE(cpu_props) ((cpu_props)->scache_elm_size)
} MACH_IMP_PROPERTIES;
} SIM_MACH_IMP_PROPERTIES;
/* A machine variant. */
@ -92,7 +92,7 @@ typedef struct {
#define MACH_MODELS(m) ((m)->models)
/* Pointer to the implementation properties of this mach. */
const MACH_IMP_PROPERTIES *imp_props;
const SIM_MACH_IMP_PROPERTIES *imp_props;
#define MACH_IMP_PROPS(m) ((m)->imp_props)
/* Called by sim_model_set when the model of a cpu is set. */
@ -103,14 +103,14 @@ typedef struct {
Used by cgen simulators to initialize the insn descriptor table. */
void (* prepare_run) (sim_cpu *);
#define MACH_PREPARE_RUN(m) ((m)->prepare_run)
} MACH;
} SIM_MACH;
/* A model (implementation) of a machine. */
typedef struct model {
const char *name;
#define MODEL_NAME(m) ((m)->name)
const MACH *mach;
const SIM_MACH *mach;
#define MODEL_MACH(m) ((m)->mach)
/* An enum that distinguished the model. */
int num;
@ -120,21 +120,21 @@ typedef struct model {
#define MODEL_TIMING(m) ((m)->timing)
void (* init) (sim_cpu *);
#define MODEL_INIT(m) ((m)->init)
} MODEL;
} SIM_MODEL;
/* Tables of supported machines. */
/* ??? In a simulator of multiple architectures, will need multiple copies of
this. Have an `archs' array that contains a pointer to the machs array
for each (which in turn has a pointer to the models array for each). */
extern const MACH *sim_machs[];
extern const SIM_MACH *sim_machs[];
/* Model module handlers. */
extern MODULE_INSTALL_FN sim_model_install;
/* Support routines. */
extern void sim_model_set (SIM_DESC sd_, sim_cpu *cpu_, const MODEL *model_);
extern const MODEL * sim_model_lookup (const char *name_);
extern const MACH * sim_mach_lookup (const char *name_);
extern const MACH * sim_mach_lookup_bfd_name (const char *bfd_name_);
extern void sim_model_set (SIM_DESC sd_, sim_cpu *cpu_, const SIM_MODEL *model_);
extern const SIM_MODEL *sim_model_lookup (const char *name_);
extern const SIM_MACH *sim_mach_lookup (const char *name_);
extern const SIM_MACH *sim_mach_lookup_bfd_name (const char *bfd_name_);
#endif /* SIM_MODEL_H */

8
sim/cris/ChangeLog
View File

@ -1,3 +1,11 @@
2015-12-25 Mike Frysinger <vapier@gentoo.org>
* arch.c: Rename MACH to SIM_MACH.
* cpuall.h: Likewise.
* modelv10.c: Rename MACH to SIM_MACH, MACH_IMP_PROPERTIES to
SIM_MACH_IMP_PROPERTIES, and MODEL to SIM_MODEL.
* modelv32.c: Likewise.
2015-12-25 Mike Frysinger <vapier@gentoo.org>
* sim-main.h (WITH_SCACHE_PBB): Move from ...

2
sim/cris/arch.c
View File

@ -24,7 +24,7 @@ This file is part of the GNU simulators.
#include "sim-main.h"
#include "bfd.h"
const MACH *sim_machs[] =
const SIM_MACH *sim_machs[] =
{
#ifdef HAVE_CPU_CRISV10F
& crisv10_mach,

4
sim/cris/cpuall.h
View File

@ -56,8 +56,8 @@ This file is part of the GNU simulators.
#include "decodev32.h"
#endif
extern const MACH crisv10_mach;
extern const MACH crisv32_mach;
extern const SIM_MACH crisv10_mach;
extern const SIM_MACH crisv32_mach;
#ifndef WANT_CPU
/* The ARGBUF struct. */

6
sim/cris/modelv10.c
View File

@ -4113,7 +4113,7 @@ crisv10_model_init (SIM_CPU *cpu)
#define TIMING_DATA(td) 0
#endif
static const MODEL crisv10_models[] =
static const SIM_MODEL crisv10_models[] =
{
{ "crisv10", & crisv10_mach, MODEL_CRISV10, TIMING_DATA (& crisv10_timing[0]), crisv10_model_init },
{ 0 }
@ -4121,7 +4121,7 @@ static const MODEL crisv10_models[] =
/* The properties of this cpu's implementation. */
static const MACH_IMP_PROPERTIES crisv10f_imp_properties =
static const SIM_MACH_IMP_PROPERTIES crisv10f_imp_properties =
{
sizeof (SIM_CPU),
#if WITH_SCACHE
@ -4163,7 +4163,7 @@ crisv10_init_cpu (SIM_CPU *cpu)
#endif
}
const MACH crisv10_mach =
const SIM_MACH crisv10_mach =
{
"crisv10", "cris", MACH_CRISV10,
32, 32, & crisv10_models[0], & crisv10f_imp_properties,

6
sim/cris/modelv32.c
View File

@ -5904,7 +5904,7 @@ crisv32_model_init (SIM_CPU *cpu)
#define TIMING_DATA(td) 0
#endif
static const MODEL crisv32_models[] =
static const SIM_MODEL crisv32_models[] =
{
{ "crisv32", & crisv32_mach, MODEL_CRISV32, TIMING_DATA (& crisv32_timing[0]), crisv32_model_init },
{ 0 }
@ -5912,7 +5912,7 @@ static const MODEL crisv32_models[] =
/* The properties of this cpu's implementation. */
static const MACH_IMP_PROPERTIES crisv32f_imp_properties =
static const SIM_MACH_IMP_PROPERTIES crisv32f_imp_properties =
{
sizeof (SIM_CPU),
#if WITH_SCACHE
@ -5954,7 +5954,7 @@ crisv32_init_cpu (SIM_CPU *cpu)
#endif
}
const MACH crisv32_mach =
const SIM_MACH crisv32_mach =
{
"crisv32", "crisv32", MACH_CRISV32,
32, 32, & crisv32_models[0], & crisv32f_imp_properties,

7
sim/frv/ChangeLog
View File

@ -1,3 +1,10 @@
2015-12-25 Mike Frysinger <vapier@gentoo.org>
* arch.c: Rename MACH to SIM_MACH.
* cpuall.h: Likewise.
* model.c: Rename MACH to SIM_MACH, MACH_IMP_PROPERTIES to
SIM_MACH_IMP_PROPERTIES, and MODEL to SIM_MODEL.
2015-12-25 Mike Frysinger <vapier@gentoo.org>
* sim-main.h (WITH_SCACHE_PBB): Move from ...

2
sim/frv/arch.c
View File

@ -24,7 +24,7 @@ This file is part of the GNU simulators.
#include "sim-main.h"
#include "bfd.h"
const MACH *sim_machs[] =
const SIM_MACH *sim_machs[] =
{
#ifdef HAVE_CPU_FRVBF
& frv_mach,

14
sim/frv/cpuall.h
View File

@ -32,13 +32,13 @@ This file is part of the GNU simulators.
#include "decode.h"
#endif
extern const MACH frv_mach;
extern const MACH fr550_mach;
extern const MACH fr500_mach;
extern const MACH tomcat_mach;
extern const MACH fr400_mach;
extern const MACH fr450_mach;
extern const MACH simple_mach;
extern const SIM_MACH frv_mach;
extern const SIM_MACH fr550_mach;
extern const SIM_MACH fr500_mach;
extern const SIM_MACH tomcat_mach;
extern const SIM_MACH fr400_mach;
extern const SIM_MACH fr450_mach;
extern const SIM_MACH simple_mach;
#ifndef WANT_CPU
/* The ARGBUF struct. */

30
sim/frv/model.c
View File

@ -107352,43 +107352,43 @@ simple_model_init (SIM_CPU *cpu)
#define TIMING_DATA(td) 0
#endif
static const MODEL frv_models[] =
static const SIM_MODEL frv_models[] =
{
{ "frv", & frv_mach, MODEL_FRV, TIMING_DATA (& frv_timing[0]), frv_model_init },
{ 0 }
};
static const MODEL fr550_models[] =
static const SIM_MODEL fr550_models[] =
{
{ "fr550", & fr550_mach, MODEL_FR550, TIMING_DATA (& fr550_timing[0]), fr550_model_init },
{ 0 }
};
static const MODEL fr500_models[] =
static const SIM_MODEL fr500_models[] =
{
{ "fr500", & fr500_mach, MODEL_FR500, TIMING_DATA (& fr500_timing[0]), fr500_model_init },
{ 0 }
};
static const MODEL tomcat_models[] =
static const SIM_MODEL tomcat_models[] =
{
{ "tomcat", & tomcat_mach, MODEL_TOMCAT, TIMING_DATA (& tomcat_timing[0]), tomcat_model_init },
{ 0 }
};
static const MODEL fr400_models[] =
static const SIM_MODEL fr400_models[] =
{
{ "fr400", & fr400_mach, MODEL_FR400, TIMING_DATA (& fr400_timing[0]), fr400_model_init },
{ 0 }
};
static const MODEL fr450_models[] =
static const SIM_MODEL fr450_models[] =
{
{ "fr450", & fr450_mach, MODEL_FR450, TIMING_DATA (& fr450_timing[0]), fr450_model_init },
{ 0 }
};
static const MODEL simple_models[] =
static const SIM_MODEL simple_models[] =
{
{ "simple", & simple_mach, MODEL_SIMPLE, TIMING_DATA (& simple_timing[0]), simple_model_init },
{ 0 }
@ -107396,7 +107396,7 @@ static const MODEL simple_models[] =
/* The properties of this cpu's implementation. */
static const MACH_IMP_PROPERTIES frvbf_imp_properties =
static const SIM_MACH_IMP_PROPERTIES frvbf_imp_properties =
{
sizeof (SIM_CPU),
#if WITH_SCACHE
@ -107438,7 +107438,7 @@ frv_init_cpu (SIM_CPU *cpu)
#endif
}
const MACH frv_mach =
const SIM_MACH frv_mach =
{
"frv", "frv", MACH_FRV,
32, 32, & frv_models[0], & frvbf_imp_properties,
@ -107464,7 +107464,7 @@ fr550_init_cpu (SIM_CPU *cpu)
#endif
}
const MACH fr550_mach =
const SIM_MACH fr550_mach =
{
"fr550", "fr550", MACH_FR550,
32, 32, & fr550_models[0], & frvbf_imp_properties,
@ -107490,7 +107490,7 @@ fr500_init_cpu (SIM_CPU *cpu)
#endif
}
const MACH fr500_mach =
const SIM_MACH fr500_mach =
{
"fr500", "fr500", MACH_FR500,
32, 32, & fr500_models[0], & frvbf_imp_properties,
@ -107516,7 +107516,7 @@ tomcat_init_cpu (SIM_CPU *cpu)
#endif
}
const MACH tomcat_mach =
const SIM_MACH tomcat_mach =
{
"tomcat", "tomcat", MACH_TOMCAT,
32, 32, & tomcat_models[0], & frvbf_imp_properties,
@ -107542,7 +107542,7 @@ fr400_init_cpu (SIM_CPU *cpu)
#endif
}
const MACH fr400_mach =
const SIM_MACH fr400_mach =
{
"fr400", "fr400", MACH_FR400,
32, 32, & fr400_models[0], & frvbf_imp_properties,
@ -107568,7 +107568,7 @@ fr450_init_cpu (SIM_CPU *cpu)
#endif
}
const MACH fr450_mach =
const SIM_MACH fr450_mach =
{
"fr450", "fr450", MACH_FR450,
32, 32, & fr450_models[0], & frvbf_imp_properties,
@ -107594,7 +107594,7 @@ simple_init_cpu (SIM_CPU *cpu)
#endif
}
const MACH simple_mach =
const SIM_MACH simple_mach =
{
"simple", "simple", MACH_SIMPLE,
32, 32, & simple_models[0], & frvbf_imp_properties,

7
sim/iq2000/ChangeLog
View File

@ -1,3 +1,10 @@
2015-12-25 Mike Frysinger <vapier@gentoo.org>
* arch.c: Rename MACH to SIM_MACH.
* cpuall.h: Likewise.
* model.c: Rename MACH to SIM_MACH, MACH_IMP_PROPERTIES to
SIM_MACH_IMP_PROPERTIES, and MODEL to SIM_MODEL.
2015-12-25 Mike Frysinger <vapier@gentoo.org>
* sim-main.h (WITH_SCACHE_PBB): Move from ...

2
sim/iq2000/arch.c
View File

@ -24,7 +24,7 @@ This file is part of the GNU simulators.
#include "sim-main.h"
#include "bfd.h"
const MACH *sim_machs[] =
const SIM_MACH *sim_machs[] =
{
#ifdef HAVE_CPU_IQ2000BF
& iq2000_mach,

2
sim/iq2000/cpuall.h
View File

@ -38,7 +38,7 @@ This file is part of the GNU simulators.
#include "decode.h"
#endif
extern const MACH iq2000_mach;
extern const SIM_MACH iq2000_mach;
#ifndef WANT_CPU
/* The ARGBUF struct. */

6
sim/iq2000/model.c
View File

@ -2509,7 +2509,7 @@ iq2000_model_init (SIM_CPU *cpu)
#define TIMING_DATA(td) 0
#endif
static const MODEL iq2000_models[] =
static const SIM_MODEL iq2000_models[] =
{
{ "iq2000", & iq2000_mach, MODEL_IQ2000, TIMING_DATA (& iq2000_timing[0]), iq2000_model_init },
{ 0 }
@ -2517,7 +2517,7 @@ static const MODEL iq2000_models[] =
/* The properties of this cpu's implementation. */
static const MACH_IMP_PROPERTIES iq2000bf_imp_properties =
static const SIM_MACH_IMP_PROPERTIES iq2000bf_imp_properties =
{
sizeof (SIM_CPU),
#if WITH_SCACHE
@ -2559,7 +2559,7 @@ iq2000_init_cpu (SIM_CPU *cpu)
#endif
}
const MACH iq2000_mach =
const SIM_MACH iq2000_mach =
{
"iq2000", "iq2000", MACH_IQ2000,
32, 32, & iq2000_models[0], & iq2000bf_imp_properties,

7
sim/lm32/ChangeLog
View File

@ -1,3 +1,10 @@
2015-12-25 Mike Frysinger <vapier@gentoo.org>
* arch.c: Rename MACH to SIM_MACH.
* cpuall.h: Likewise.
* model.c: Rename MACH to SIM_MACH, MACH_IMP_PROPERTIES to
SIM_MACH_IMP_PROPERTIES, and MODEL to SIM_MODEL.
2015-12-25 Mike Frysinger <vapier@gentoo.org>
* sim-main.h (WITH_SCACHE_PBB): Move from ...

2
sim/lm32/arch.c
View File

@ -24,7 +24,7 @@ This file is part of the GNU simulators.
#include "sim-main.h"
#include "bfd.h"
const MACH *sim_machs[] =
const SIM_MACH *sim_machs[] =
{
#ifdef HAVE_CPU_LM32BF
& lm32_mach,

2
sim/lm32/cpuall.h
View File

@ -32,7 +32,7 @@ This file is part of the GNU simulators.
#include "decode.h"
#endif
extern const MACH lm32_mach;
extern const SIM_MACH lm32_mach;
#ifndef WANT_CPU
/* The ARGBUF struct. */

6
sim/lm32/model.c
View File

@ -1115,7 +1115,7 @@ lm32_model_init (SIM_CPU *cpu)
#define TIMING_DATA(td) 0
#endif
static const MODEL lm32_models[] =
static const SIM_MODEL lm32_models[] =
{
{ "lm32", & lm32_mach, MODEL_LM32, TIMING_DATA (& lm32_timing[0]), lm32_model_init },
{ 0 }
@ -1123,7 +1123,7 @@ static const MODEL lm32_models[] =
/* The properties of this cpu's implementation. */
static const MACH_IMP_PROPERTIES lm32bf_imp_properties =
static const SIM_MACH_IMP_PROPERTIES lm32bf_imp_properties =
{
sizeof (SIM_CPU),
#if WITH_SCACHE
@ -1165,7 +1165,7 @@ lm32_init_cpu (SIM_CPU *cpu)
#endif
}
const MACH lm32_mach =
const SIM_MACH lm32_mach =
{
"lm32", "lm32", MACH_LM32,
32, 32, & lm32_models[0], & lm32bf_imp_properties,

8
sim/m32r/ChangeLog
View File

@ -1,3 +1,11 @@
2015-12-25 Mike Frysinger <vapier@gentoo.org>
* arch.c: Rename MACH to SIM_MACH.
* cpuall.h: Likewise.
* model.c: Rename MACH to SIM_MACH, MACH_IMP_PROPERTIES to
SIM_MACH_IMP_PROPERTIES, and MODEL to SIM_MODEL.
* model2.c, modelx.c: Likewise.
2015-12-25 Mike Frysinger <vapier@gentoo.org>
* sim-main.h (WITH_SCACHE_PBB): Move from ...

2
sim/m32r/arch.c
View File

@ -24,7 +24,7 @@ This file is part of the GNU simulators.
#include "sim-main.h"
#include "bfd.h"
const MACH *sim_machs[] =
const SIM_MACH *sim_machs[] =
{
#ifdef HAVE_CPU_M32RBF
& m32r_mach,

6
sim/m32r/cpuall.h
View File

@ -44,9 +44,9 @@ This file is part of the GNU simulators.
#include "decode2.h"
#endif
extern const MACH m32r_mach;
extern const MACH m32rx_mach;
extern const MACH m32r2_mach;
extern const SIM_MACH m32r_mach;
extern const SIM_MACH m32rx_mach;
extern const SIM_MACH m32r2_mach;
#ifndef WANT_CPU
/* The ARGBUF struct. */

6
sim/m32r/model.c
View File

@ -4297,7 +4297,7 @@ test_model_init (SIM_CPU *cpu)
#define TIMING_DATA(td) 0
#endif
static const MODEL m32r_models[] =
static const SIM_MODEL m32r_models[] =
{
{ "m32r/d", & m32r_mach, MODEL_M32R_D, TIMING_DATA (& m32r_d_timing[0]), m32r_d_model_init },
{ "test", & m32r_mach, MODEL_TEST, TIMING_DATA (& test_timing[0]), test_model_init },
@ -4306,7 +4306,7 @@ static const MODEL m32r_models[] =
/* The properties of this cpu's implementation. */
static const MACH_IMP_PROPERTIES m32rbf_imp_properties =
static const SIM_MACH_IMP_PROPERTIES m32rbf_imp_properties =
{
sizeof (SIM_CPU),
#if WITH_SCACHE
@ -4348,7 +4348,7 @@ m32r_init_cpu (SIM_CPU *cpu)
#endif
}
const MACH m32r_mach =
const SIM_MACH m32r_mach =
{
"m32r", "m32r", MACH_M32R,
32, 32, & m32r_models[0], & m32rbf_imp_properties,

6
sim/m32r/model2.c
View File

@ -3192,7 +3192,7 @@ m32r2_model_init (SIM_CPU *cpu)
#define TIMING_DATA(td) 0
#endif
static const MODEL m32r2_models[] =
static const SIM_MODEL m32r2_models[] =
{
{ "m32r2", & m32r2_mach, MODEL_M32R2, TIMING_DATA (& m32r2_timing[0]), m32r2_model_init },
{ 0 }
@ -3200,7 +3200,7 @@ static const MODEL m32r2_models[] =
/* The properties of this cpu's implementation. */
static const MACH_IMP_PROPERTIES m32r2f_imp_properties =
static const SIM_MACH_IMP_PROPERTIES m32r2f_imp_properties =
{
sizeof (SIM_CPU),
#if WITH_SCACHE
@ -3242,7 +3242,7 @@ m32r2_init_cpu (SIM_CPU *cpu)
#endif
}
const MACH m32r2_mach =
const SIM_MACH m32r2_mach =
{
"m32r2", "m32r2", MACH_M32R2,
32, 32, & m32r2_models[0], & m32r2f_imp_properties,

6
sim/m32r/modelx.c
View File

@ -3010,7 +3010,7 @@ m32rx_model_init (SIM_CPU *cpu)
#define TIMING_DATA(td) 0
#endif
static const MODEL m32rx_models[] =
static const SIM_MODEL m32rx_models[] =
{
{ "m32rx", & m32rx_mach, MODEL_M32RX, TIMING_DATA (& m32rx_timing[0]), m32rx_model_init },
{ 0 }
@ -3018,7 +3018,7 @@ static const MODEL m32rx_models[] =
/* The properties of this cpu's implementation. */
static const MACH_IMP_PROPERTIES m32rxf_imp_properties =
static const SIM_MACH_IMP_PROPERTIES m32rxf_imp_properties =
{
sizeof (SIM_CPU),
#if WITH_SCACHE
@ -3060,7 +3060,7 @@ m32rx_init_cpu (SIM_CPU *cpu)
#endif
}
const MACH m32rx_mach =
const SIM_MACH m32rx_mach =
{
"m32rx", "m32rx", MACH_M32RX,
32, 32, & m32rx_models[0], & m32rxf_imp_properties,

7
sim/sh64/ChangeLog
View File

@ -1,3 +1,10 @@
2015-12-25 Mike Frysinger <vapier@gentoo.org>
* arch.c: Rename MACH to SIM_MACH.
* cpuall.h: Likewise.
* sh64.c: Rename MACH to SIM_MACH, MACH_IMP_PROPERTIES to
SIM_MACH_IMP_PROPERTIES, and MODEL to SIM_MODEL.
2015-12-25 Mike Frysinger <vapier@gentoo.org>
* sim-main.h (WITH_SCACHE_PBB): Move from ...

2
sim/sh64/arch.c
View File

@ -24,7 +24,7 @@ This file is part of the GNU simulators.
#include "sim-main.h"
#include "bfd.h"
const MACH *sim_machs[] =
const SIM_MACH *sim_machs[] =
{
#ifdef HAVE_CPU_SH64
& sh2_mach,

24
sim/sh64/cpuall.h
View File

@ -32,18 +32,18 @@ This file is part of the GNU simulators.
#include "decode.h"
#endif
extern const MACH sh2_mach;
extern const MACH sh2e_mach;
extern const MACH sh2a_fpu_mach;
extern const MACH sh2a_nofpu_mach;
extern const MACH sh3_mach;
extern const MACH sh3e_mach;
extern const MACH sh4_nofpu_mach;
extern const MACH sh4_mach;
extern const MACH sh4a_nofpu_mach;
extern const MACH sh4a_mach;
extern const MACH sh4al_mach;
extern const MACH sh5_mach;
extern const SIM_MACH sh2_mach;
extern const SIM_MACH sh2e_mach;
extern const SIM_MACH sh2a_fpu_mach;
extern const SIM_MACH sh2a_nofpu_mach;
extern const SIM_MACH sh3_mach;
extern const SIM_MACH sh3e_mach;
extern const SIM_MACH sh4_nofpu_mach;
extern const SIM_MACH sh4_mach;
extern const SIM_MACH sh4a_nofpu_mach;
extern const SIM_MACH sh4a_mach;
extern const SIM_MACH sh4al_mach;
extern const SIM_MACH sh5_mach;
#ifndef WANT_CPU
/* The ARGBUF struct. */

28
sim/sh64/sh64.c
View File

@ -1030,7 +1030,7 @@ sh64_model_init()
/* Do nothing. */
}
static const MODEL sh_models [] =
static const SIM_MODEL sh_models [] =
{
{ "sh2", & sh2_mach, MODEL_SH5, NULL, sh64_model_init },
{ "sh2e", & sh2e_mach, MODEL_SH5, NULL, sh64_model_init },
@ -1047,7 +1047,7 @@ static const MODEL sh_models [] =
{ 0 }
};
static const MACH_IMP_PROPERTIES sh5_imp_properties =
static const SIM_MACH_IMP_PROPERTIES sh5_imp_properties =
{
sizeof (SIM_CPU),
#if WITH_SCACHE
@ -1057,7 +1057,7 @@ static const MACH_IMP_PROPERTIES sh5_imp_properties =
#endif
};
const MACH sh2_mach =
const SIM_MACH sh2_mach =
{
"sh2", "sh2", MACH_SH5,
16, 16, &sh_models[0], &sh5_imp_properties,
@ -1065,7 +1065,7 @@ const MACH sh2_mach =
sh64_prepare_run
};
const MACH sh2e_mach =
const SIM_MACH sh2e_mach =
{
"sh2e", "sh2e", MACH_SH5,
16, 16, &sh_models[1], &sh5_imp_properties,
@ -1073,7 +1073,7 @@ const MACH sh2e_mach =
sh64_prepare_run
};
const MACH sh2a_fpu_mach =
const SIM_MACH sh2a_fpu_mach =
{
"sh2a", "sh2a", MACH_SH5,
16, 16, &sh_models[2], &sh5_imp_properties,
@ -1081,7 +1081,7 @@ const MACH sh2a_fpu_mach =
sh64_prepare_run
};
const MACH sh2a_nofpu_mach =
const SIM_MACH sh2a_nofpu_mach =
{
"sh2a_nofpu", "sh2a_nofpu", MACH_SH5,
16, 16, &sh_models[3], &sh5_imp_properties,
@ -1089,7 +1089,7 @@ const MACH sh2a_nofpu_mach =
sh64_prepare_run
};
const MACH sh3_mach =
const SIM_MACH sh3_mach =
{
"sh3", "sh3", MACH_SH5,
16, 16, &sh_models[4], &sh5_imp_properties,
@ -1097,7 +1097,7 @@ const MACH sh3_mach =
sh64_prepare_run
};
const MACH sh3e_mach =
const SIM_MACH sh3e_mach =
{
"sh3e", "sh3e", MACH_SH5,
16, 16, &sh_models[5], &sh5_imp_properties,
@ -1105,7 +1105,7 @@ const MACH sh3e_mach =
sh64_prepare_run
};
const MACH sh4_mach =
const SIM_MACH sh4_mach =
{
"sh4", "sh4", MACH_SH5,
16, 16, &sh_models[6], &sh5_imp_properties,
@ -1113,7 +1113,7 @@ const MACH sh4_mach =
sh64_prepare_run
};
const MACH sh4_nofpu_mach =
const SIM_MACH sh4_nofpu_mach =
{
"sh4_nofpu", "sh4_nofpu", MACH_SH5,
16, 16, &sh_models[7], &sh5_imp_properties,
@ -1121,7 +1121,7 @@ const MACH sh4_nofpu_mach =
sh64_prepare_run
};
const MACH sh4a_mach =
const SIM_MACH sh4a_mach =
{
"sh4a", "sh4a", MACH_SH5,
16, 16, &sh_models[8], &sh5_imp_properties,
@ -1129,7 +1129,7 @@ const MACH sh4a_mach =
sh64_prepare_run
};
const MACH sh4a_nofpu_mach =
const SIM_MACH sh4a_nofpu_mach =
{
"sh4a_nofpu", "sh4a_nofpu", MACH_SH5,
16, 16, &sh_models[9], &sh5_imp_properties,
@ -1137,7 +1137,7 @@ const MACH sh4a_nofpu_mach =
sh64_prepare_run
};
const MACH sh4al_mach =
const SIM_MACH sh4al_mach =
{
"sh4al", "sh4al", MACH_SH5,
16, 16, &sh_models[10], &sh5_imp_properties,
@ -1145,7 +1145,7 @@ const MACH sh4al_mach =
sh64_prepare_run
};
const MACH sh5_mach =
const SIM_MACH sh5_mach =
{
"sh5", "sh5", MACH_SH5,
32, 32, &sh_models[11], &sh5_imp_properties,