Arm: Change CRC from fpu feature to archititectural extension
This patch changes the CRC extension to use the core feature bits instead
of the coproc/fpu feature bits.
CRC is not an fpu feature and it causes issues with the new fpu reset
patch (f439988037). CRC can be set using
the '.arch_extension' directive, which sets bits in the coproc bitfield. When
a '.fpu' directive is encountered, the CRC feature bit gets removed and
there is no way to set it back using '.fpu'.
With this patch, CRC will be marked in the feature core bits, which prevents
it from getting removed when setting/changing the fpu options.
gas/ChangeLog:
* config/tc-arm.c (arm_ext_crc): New.
(crc_ext_armv8): Remove.
(insns): Rename crc_ext_armv8 to arm_ext_crc.
(arm_cpus): Replace CRC_EXT_ARMV8 with ARM_EXT2_CRC.
(armv8a_ext_table, armv8r_ext_table,
arm_option_extension_value_table): Redefine the crc
extension in terms of ARM_EXT2_CRC.
* gas/testsuite/gas/arm/crc-ext.s: New.
* gas/testsuite/gas/arm/crc-ext.d: New.
include/ChangeLog:
* opcode/arm.h (ARM_EXT2_CRC): New extension feature
to replace CRC_EXT_ARMV8.
(CRC_EXT_ARMV8): Remove and mark bit as unused.
(ARM_ARCH_V8A_CRC, ARM_ARCH_V8_1A, ARM_ARCH_V8_2A,
ARM_ARCH_V8_3A, ARM_ARCH_V8_4A, ARM_ARCH_V8_5A,
ARM_ARCH_V8_6A): Redefine using ARM_EXT2_CRC instead of
CRC_EXT_ARMV8.
opcodes/ChangeLog:
* opcodes/arm-dis.c (arm_opcodes, thumb32_opcodes):
Change the coproc CRC conditions to use the extension
feature set, second word, base on ARM_EXT2_CRC.
This commit is contained in:
Mihail Ionescu
Tamar Christina
parent
a2e098c378
commit
8b301fbb61
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@ -1,3 +1,15 @@
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2019-11-22 Mihail Ionescu <mihail.ionescu@arm.com>
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* config/tc-arm.c (arm_ext_crc): New.
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(crc_ext_armv8): Remove.
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(insns): Rename crc_ext_armv8 to arm_ext_crc.
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(arm_cpus): Replace CRC_EXT_ARMV8 with ARM_EXT2_CRC.
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(armv8a_ext_table, armv8r_ext_table,
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arm_option_extension_value_table): Redefine the crc
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extension in terms of ARM_EXT2_CRC.
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* gas/testsuite/gas/arm/crc-ext.s: New.
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* gas/testsuite/gas/arm/crc-ext.d: New.
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2019-11-20 Alan Modra <amodra@gmail.com>
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PR 24944
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@ -279,6 +279,8 @@ static const arm_feature_set arm_ext_bf16 =
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ARM_FEATURE_CORE_HIGH (ARM_EXT2_BF16);
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static const arm_feature_set arm_ext_i8mm =
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ARM_FEATURE_CORE_HIGH (ARM_EXT2_I8MM);
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static const arm_feature_set arm_ext_crc =
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ARM_FEATURE_CORE_HIGH (ARM_EXT2_CRC);
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static const arm_feature_set arm_arch_any = ARM_ANY;
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static const arm_feature_set fpu_any = FPU_ANY;
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@ -334,8 +336,6 @@ static const arm_feature_set fpu_neon_ext_armv8 =
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ARM_FEATURE_COPROC (FPU_NEON_EXT_ARMV8);
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static const arm_feature_set fpu_crypto_ext_armv8 =
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ARM_FEATURE_COPROC (FPU_CRYPTO_EXT_ARMV8);
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static const arm_feature_set crc_ext_armv8 =
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ARM_FEATURE_COPROC (CRC_EXT_ARMV8);
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static const arm_feature_set fpu_neon_ext_v8_1 =
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ARM_FEATURE_COPROC (FPU_NEON_EXT_RDMA);
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static const arm_feature_set fpu_neon_ext_dotprod =
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@ -24502,9 +24502,9 @@ static const struct asm_opcode insns[] =
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nUF(sha256su0, _sha2op, 2, (RNQ, RNQ), sha256su0),
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#undef ARM_VARIANT
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#define ARM_VARIANT & crc_ext_armv8
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#define ARM_VARIANT & arm_ext_crc
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#undef THUMB_VARIANT
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#define THUMB_VARIANT & crc_ext_armv8
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#define THUMB_VARIANT & arm_ext_crc
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TUEc("crc32b", 1000040, fac0f080, 3, (RR, oRR, RR), crc32b),
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TUEc("crc32h", 1200040, fac0f090, 3, (RR, oRR, RR), crc32h),
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TUEc("crc32w", 1400040, fac0f0a0, 3, (RR, oRR, RR), crc32w),
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@ -30946,25 +30946,25 @@ static const struct arm_cpu_option_table arm_cpus[] =
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ARM_ARCH_NONE,
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FPU_ARCH_NEON_VFP_V4),
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ARM_CPU_OPT ("cortex-a32", "Cortex-A32", ARM_ARCH_V8A,
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ARM_FEATURE_COPROC (CRC_EXT_ARMV8),
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ARM_FEATURE_CORE_HIGH (ARM_EXT2_CRC),
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FPU_ARCH_CRYPTO_NEON_VFP_ARMV8),
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ARM_CPU_OPT ("cortex-a35", "Cortex-A35", ARM_ARCH_V8A,
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ARM_FEATURE_COPROC (CRC_EXT_ARMV8),
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ARM_FEATURE_CORE_HIGH (ARM_EXT2_CRC),
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FPU_ARCH_CRYPTO_NEON_VFP_ARMV8),
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ARM_CPU_OPT ("cortex-a53", "Cortex-A53", ARM_ARCH_V8A,
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ARM_FEATURE_COPROC (CRC_EXT_ARMV8),
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ARM_FEATURE_CORE_HIGH (ARM_EXT2_CRC),
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FPU_ARCH_CRYPTO_NEON_VFP_ARMV8),
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ARM_CPU_OPT ("cortex-a55", "Cortex-A55", ARM_ARCH_V8_2A,
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ARM_FEATURE_CORE_HIGH (ARM_EXT2_FP16_INST),
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FPU_ARCH_CRYPTO_NEON_VFP_ARMV8_DOTPROD),
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ARM_CPU_OPT ("cortex-a57", "Cortex-A57", ARM_ARCH_V8A,
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ARM_FEATURE_COPROC (CRC_EXT_ARMV8),
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ARM_FEATURE_CORE_HIGH (ARM_EXT2_CRC),
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FPU_ARCH_CRYPTO_NEON_VFP_ARMV8),
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ARM_CPU_OPT ("cortex-a72", "Cortex-A72", ARM_ARCH_V8A,
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ARM_FEATURE_COPROC (CRC_EXT_ARMV8),
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ARM_FEATURE_CORE_HIGH (ARM_EXT2_CRC),
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FPU_ARCH_CRYPTO_NEON_VFP_ARMV8),
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ARM_CPU_OPT ("cortex-a73", "Cortex-A73", ARM_ARCH_V8A,
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ARM_FEATURE_COPROC (CRC_EXT_ARMV8),
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ARM_FEATURE_CORE_HIGH (ARM_EXT2_CRC),
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FPU_ARCH_CRYPTO_NEON_VFP_ARMV8),
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ARM_CPU_OPT ("cortex-a75", "Cortex-A75", ARM_ARCH_V8_2A,
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ARM_FEATURE_CORE_HIGH (ARM_EXT2_FP16_INST),
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@ -30997,7 +30997,7 @@ static const struct arm_cpu_option_table arm_cpus[] =
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ARM_FEATURE_CORE_LOW (ARM_EXT_ADIV),
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FPU_ARCH_VFP_V3D16),
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ARM_CPU_OPT ("cortex-r52", "Cortex-R52", ARM_ARCH_V8R,
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ARM_FEATURE_COPROC (CRC_EXT_ARMV8),
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ARM_FEATURE_CORE_HIGH (ARM_EXT2_CRC),
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FPU_ARCH_NEON_VFP_ARMV8),
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ARM_CPU_OPT ("cortex-m35p", "Cortex-M35P", ARM_ARCH_V8M_MAIN,
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ARM_FEATURE_CORE_LOW (ARM_EXT_V5ExP | ARM_EXT_V6_DSP),
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@ -31027,7 +31027,7 @@ static const struct arm_cpu_option_table arm_cpus[] =
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ARM_ARCH_NONE,
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FPU_NONE),
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ARM_CPU_OPT ("exynos-m1", "Samsung Exynos M1", ARM_ARCH_V8A,
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ARM_FEATURE_COPROC (CRC_EXT_ARMV8),
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ARM_FEATURE_CORE_HIGH (ARM_EXT2_CRC),
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FPU_ARCH_CRYPTO_NEON_VFP_ARMV8),
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ARM_CPU_OPT ("neoverse-n1", "Neoverse N1", ARM_ARCH_V8_2A,
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ARM_FEATURE_CORE_HIGH (ARM_EXT2_FP16_INST),
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@ -31066,7 +31066,7 @@ static const struct arm_cpu_option_table arm_cpus[] =
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ARM_ARCH_NONE,
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FPU_ARCH_CRYPTO_NEON_VFP_ARMV8),
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ARM_CPU_OPT ("xgene2", "APM X-Gene 2", ARM_ARCH_V8A,
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ARM_FEATURE_COPROC (CRC_EXT_ARMV8),
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ARM_FEATURE_CORE_HIGH (ARM_EXT2_CRC),
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FPU_ARCH_CRYPTO_NEON_VFP_ARMV8),
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{ NULL, 0, ARM_ARCH_NONE, ARM_ARCH_NONE, ARM_ARCH_NONE, NULL }
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@ -31186,7 +31186,7 @@ static const struct arm_ext_table armv7em_ext_table[] =
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static const struct arm_ext_table armv8a_ext_table[] =
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{
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ARM_ADD ("crc", ARCH_CRC_ARMV8),
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ARM_ADD ("crc", ARM_FEATURE_CORE_HIGH (ARM_EXT2_CRC)),
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ARM_ADD ("simd", FPU_ARCH_NEON_VFP_ARMV8),
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ARM_EXT ("crypto", FPU_ARCH_CRYPTO_NEON_VFP_ARMV8,
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ARM_FEATURE_COPROC (FPU_CRYPTO_ARMV8)),
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@ -31302,7 +31302,7 @@ static const struct arm_ext_table armv8_1m_main_ext_table[] =
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static const struct arm_ext_table armv8r_ext_table[] =
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{
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ARM_ADD ("crc", ARCH_CRC_ARMV8),
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ARM_ADD ("crc", ARM_FEATURE_CORE_HIGH (ARM_EXT2_CRC)),
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ARM_ADD ("simd", FPU_ARCH_NEON_VFP_ARMV8),
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ARM_EXT ("crypto", FPU_ARCH_CRYPTO_NEON_VFP_ARMV8,
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ARM_FEATURE_COPROC (FPU_CRYPTO_ARMV8)),
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@ -31407,7 +31407,8 @@ struct arm_option_extension_value_table
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use the context sensitive approach using arm_ext_table's. */
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static const struct arm_option_extension_value_table arm_extensions[] =
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{
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ARM_EXT_OPT ("crc", ARCH_CRC_ARMV8, ARM_FEATURE_COPROC (CRC_EXT_ARMV8),
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ARM_EXT_OPT ("crc", ARM_FEATURE_CORE_HIGH(ARM_EXT2_CRC),
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ARM_FEATURE_CORE_HIGH(ARM_EXT2_CRC),
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ARM_FEATURE_CORE_LOW (ARM_EXT_V8)),
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ARM_EXT_OPT ("crypto", FPU_ARCH_CRYPTO_NEON_VFP_ARMV8,
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ARM_FEATURE_COPROC (FPU_CRYPTO_ARMV8),
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@ -0,0 +1,14 @@
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#as: -mno-warn-deprecated
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#objdump: -dr
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.*: file format .*
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Disassembly of section \.text:
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00000000 <\.text>:
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*[0-9a-f]+: e1400042 crc32w r0, r0, r2
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*[0-9a-f]+: e1400042 crc32w r0, r0, r2
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*[0-9a-f]+: e1400042 crc32w r0, r0, r2
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*[0-9a-f]+: e1400042 crc32w r0, r0, r2
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*[0-9a-f]+: e1400042 crc32w r0, r0, r2
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*[0-9a-f]+: e1400042 crc32w r0, r0, r2
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@ -0,0 +1,19 @@
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.text
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.arch armv8-a
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.arch_extension crc
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crc32w r0,r0,r2
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.fpu crypto-neon-fp-armv8
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crc32w r0,r0,r2
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.arch armv8.1-a
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crc32w r0,r0,r2
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.cpu cortex-a53
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crc32w r0,r0,r2
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.cpu cortex-a55
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crc32w r0,r0,r2
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.cpu cortex-a57
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crc32w r0,r0,r2
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@ -1,3 +1,13 @@
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2019-11-22 Mihail Ionescu <mihail.ionescu@arm.com>
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* opcode/arm.h (ARM_EXT2_CRC): New extension feature
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to replace CRC_EXT_ARMV8.
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(CRC_EXT_ARMV8): Remove and mark bit as unused.
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(ARM_ARCH_V8A_CRC, ARM_ARCH_V8_1A, ARM_ARCH_V8_2A,
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ARM_ARCH_V8_3A, ARM_ARCH_V8_4A, ARM_ARCH_V8_5A,
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ARM_ARCH_V8_6A): Redefine using ARM_EXT2_CRC instead of
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CRC_EXT_ARMV8.
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2019-11-18 Andrew Burgess <andrew.burgess@embecosm.com>
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* dwarf2.h (DW_CIE_VERSION): Delete.
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@ -76,6 +76,7 @@
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#define ARM_EXT2_V8_6A 0x00010000 /* ARM V8.6A. */
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#define ARM_EXT2_BF16 0x00020000 /* ARMv8 bfloat16. */
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#define ARM_EXT2_I8MM 0x00040000 /* ARMv8.6A i8mm. */
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#define ARM_EXT2_CRC 0x00080000 /* ARMv8 CRC32 */
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/* Co-processor space extensions. */
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#define ARM_CEXT_XSCALE 0x00000001 /* Allow MIA etc. */
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@ -102,7 +103,7 @@
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#define FPU_VFP_EXT_ARMV8 0x00020000 /* Double-precision FP for ARMv8. */
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#define FPU_NEON_EXT_ARMV8 0x00010000 /* Neon for ARMv8. */
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#define FPU_CRYPTO_EXT_ARMV8 0x00008000 /* Crypto for ARMv8. */
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#define CRC_EXT_ARMV8 0x00004000 /* CRC32 for ARMv8. */
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/* Unused 0x00004000 */
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#define FPU_VFP_EXT_ARMV8xD 0x00002000 /* Single-precision FP for ARMv8. */
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#define FPU_NEON_EXT_RDMA 0x00001000 /* v8.1 Adv.SIMD extensions. */
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#define FPU_NEON_EXT_DOTPROD 0x00000800 /* Dot Product extension. */
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@ -273,7 +274,6 @@
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| FPU_NEON_ARMV8 \
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| FPU_VFP_ARMV8 \
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| FPU_NEON_EXT_DOTPROD)
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#define ARCH_CRC_ARMV8 ARM_FEATURE_COPROC (CRC_EXT_ARMV8)
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#define FPU_ARCH_NEON_VFP_ARMV8_1 \
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ARM_FEATURE_COPROC (FPU_NEON_ARMV8_1 \
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| FPU_VFP_ARMV8)
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@ -342,22 +342,22 @@
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#define ARM_ARCH_V7M ARM_FEATURE_CORE (ARM_AEXT_V7M, ARM_EXT2_V6T2_V8M)
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#define ARM_ARCH_V7EM ARM_FEATURE_CORE (ARM_AEXT_V7EM, ARM_EXT2_V6T2_V8M)
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#define ARM_ARCH_V8A ARM_FEATURE_CORE (ARM_AEXT_V8A, ARM_AEXT2_V8A)
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#define ARM_ARCH_V8A_CRC ARM_FEATURE (ARM_AEXT_V8A, ARM_AEXT2_V8A, \
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CRC_EXT_ARMV8)
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#define ARM_ARCH_V8_1A ARM_FEATURE (ARM_AEXT_V8A, ARM_AEXT2_V8_1A, \
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CRC_EXT_ARMV8 | FPU_NEON_EXT_RDMA)
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#define ARM_ARCH_V8_2A ARM_FEATURE (ARM_AEXT_V8A, ARM_AEXT2_V8_2A, \
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CRC_EXT_ARMV8 | FPU_NEON_EXT_RDMA)
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#define ARM_ARCH_V8_3A ARM_FEATURE (ARM_AEXT_V8A, ARM_AEXT2_V8_3A, \
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CRC_EXT_ARMV8 | FPU_NEON_EXT_RDMA)
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#define ARM_ARCH_V8_4A ARM_FEATURE (ARM_AEXT_V8A, ARM_AEXT2_V8_4A, \
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CRC_EXT_ARMV8 | FPU_NEON_EXT_RDMA \
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#define ARM_ARCH_V8A_CRC ARM_FEATURE (ARM_AEXT_V8A, \
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ARM_AEXT2_V8A | ARM_EXT2_CRC)
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#define ARM_ARCH_V8_1A ARM_FEATURE (ARM_AEXT_V8A, ARM_AEXT2_V8_1A \
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| ARM_EXT2_CRC, FPU_NEON_EXT_RDMA)
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#define ARM_ARCH_V8_2A ARM_FEATURE (ARM_AEXT_V8A, ARM_AEXT2_V8_2A \
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| ARM_EXT2_CRC, FPU_NEON_EXT_RDMA)
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#define ARM_ARCH_V8_3A ARM_FEATURE (ARM_AEXT_V8A, ARM_AEXT2_V8_3A \
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| ARM_EXT2_CRC, FPU_NEON_EXT_RDMA)
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#define ARM_ARCH_V8_4A ARM_FEATURE (ARM_AEXT_V8A, ARM_AEXT2_V8_4A \
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| ARM_EXT2_CRC, FPU_NEON_EXT_RDMA \
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| FPU_NEON_EXT_DOTPROD)
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#define ARM_ARCH_V8_5A ARM_FEATURE (ARM_AEXT_V8A, ARM_AEXT2_V8_5A, \
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CRC_EXT_ARMV8 | FPU_NEON_EXT_RDMA \
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#define ARM_ARCH_V8_5A ARM_FEATURE (ARM_AEXT_V8A, ARM_AEXT2_V8_5A \
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| ARM_EXT2_CRC, FPU_NEON_EXT_RDMA \
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| FPU_NEON_EXT_DOTPROD)
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#define ARM_ARCH_V8_6A ARM_FEATURE (ARM_AEXT_V8A, ARM_AEXT2_V8_6A, \
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CRC_EXT_ARMV8 | FPU_NEON_EXT_RDMA \
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#define ARM_ARCH_V8_6A ARM_FEATURE (ARM_AEXT_V8A, ARM_AEXT2_V8_6A \
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| ARM_EXT2_CRC, FPU_NEON_EXT_RDMA \
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| FPU_NEON_EXT_DOTPROD)
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#define ARM_ARCH_V8M_BASE ARM_FEATURE_CORE (ARM_AEXT_V8M_BASE, \
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ARM_AEXT2_V8M_BASE)
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@ -1,3 +1,9 @@
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2019-11-22 Mihail Ionescu <mihail.ionescu@arm.com>
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* opcodes/arm-dis.c (arm_opcodes, thumb32_opcodes):
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Change the coproc CRC conditions to use the extension
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feature set, second word, base on ARM_EXT2_CRC.
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2019-11-14 Jan Beulich <jbeulich@suse.com>
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* i386-opc.tbl (syscall, sysret): Drop Cpu64 forms.
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@ -3641,17 +3641,17 @@ static const struct opcode32 arm_opcodes[] =
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{ARM_FEATURE_CORE_LOW (ARM_EXT2_ATOMICS),
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0x01f00c9f, 0x0ff00fff, "ldah%c\t%12-15r, [%16-19R]"},
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/* CRC32 instructions. */
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{ARM_FEATURE_COPROC (CRC_EXT_ARMV8),
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{ARM_FEATURE_CORE_HIGH (ARM_EXT2_CRC),
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0xe1000040, 0xfff00ff0, "crc32b\t%12-15R, %16-19R, %0-3R"},
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{ARM_FEATURE_COPROC (CRC_EXT_ARMV8),
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{ARM_FEATURE_CORE_HIGH (ARM_EXT2_CRC),
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0xe1200040, 0xfff00ff0, "crc32h\t%12-15R, %16-19R, %0-3R"},
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{ARM_FEATURE_COPROC (CRC_EXT_ARMV8),
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{ARM_FEATURE_CORE_HIGH (ARM_EXT2_CRC),
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0xe1400040, 0xfff00ff0, "crc32w\t%12-15R, %16-19R, %0-3R"},
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{ARM_FEATURE_COPROC (CRC_EXT_ARMV8),
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{ARM_FEATURE_CORE_HIGH (ARM_EXT2_CRC),
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0xe1000240, 0xfff00ff0, "crc32cb\t%12-15R, %16-19R, %0-3R"},
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{ARM_FEATURE_COPROC (CRC_EXT_ARMV8),
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{ARM_FEATURE_CORE_HIGH (ARM_EXT2_CRC),
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0xe1200240, 0xfff00ff0, "crc32ch\t%12-15R, %16-19R, %0-3R"},
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{ARM_FEATURE_COPROC (CRC_EXT_ARMV8),
|
||||
{ARM_FEATURE_CORE_HIGH (ARM_EXT2_CRC),
|
||||
0xe1400240, 0xfff00ff0, "crc32cw\t%12-15R, %16-19R, %0-3R"},
|
||||
|
||||
/* Privileged Access Never extension instructions. */
|
||||
|
|
@ -4657,17 +4657,17 @@ static const struct opcode32 thumb32_opcodes[] =
|
|||
0xe8d000ff, 0xfff000ff, "ldaexd%c\t%12-15r, %8-11r, [%16-19R]"},
|
||||
|
||||
/* CRC32 instructions. */
|
||||
{ARM_FEATURE_COPROC (CRC_EXT_ARMV8),
|
||||
{ARM_FEATURE_CORE_HIGH (ARM_EXT2_CRC),
|
||||
0xfac0f080, 0xfff0f0f0, "crc32b\t%8-11R, %16-19R, %0-3R"},
|
||||
{ARM_FEATURE_COPROC (CRC_EXT_ARMV8),
|
||||
{ARM_FEATURE_CORE_HIGH (ARM_EXT2_CRC),
|
||||
0xfac0f090, 0xfff0f0f0, "crc32h\t%9-11R, %16-19R, %0-3R"},
|
||||
{ARM_FEATURE_COPROC (CRC_EXT_ARMV8),
|
||||
{ARM_FEATURE_CORE_HIGH (ARM_EXT2_CRC),
|
||||
0xfac0f0a0, 0xfff0f0f0, "crc32w\t%8-11R, %16-19R, %0-3R"},
|
||||
{ARM_FEATURE_COPROC (CRC_EXT_ARMV8),
|
||||
{ARM_FEATURE_CORE_HIGH (ARM_EXT2_CRC),
|
||||
0xfad0f080, 0xfff0f0f0, "crc32cb\t%8-11R, %16-19R, %0-3R"},
|
||||
{ARM_FEATURE_COPROC (CRC_EXT_ARMV8),
|
||||
{ARM_FEATURE_CORE_HIGH (ARM_EXT2_CRC),
|
||||
0xfad0f090, 0xfff0f0f0, "crc32ch\t%8-11R, %16-19R, %0-3R"},
|
||||
{ARM_FEATURE_COPROC (CRC_EXT_ARMV8),
|
||||
{ARM_FEATURE_CORE_HIGH (ARM_EXT2_CRC),
|
||||
0xfad0f0a0, 0xfff0f0f0, "crc32cw\t%8-11R, %16-19R, %0-3R"},
|
||||
|
||||
/* Speculation Barriers. */
|
||||
|
|
|
|||
Loading…
Reference in New Issue