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* mn10300_sim.h: Fix ordering of bits in the PSW.

This commit is contained in:
Jeff Law 1997-05-06 19:42:17 +00:00
parent 1ec53ef597
commit 8def922034
2 changed files with 6 additions and 4 deletions
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2
sim/mn10300/ChangeLog
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@ -1,5 +1,7 @@
Tue May 6 13:24:36 1997 Jeffrey A Law (law@cygnus.com)
* mn10300_sim.h: Fix ordering of bits in the PSW.
* interp.c: Improve hashing routine to avoid long list
traversals for common instructions. Add HASH_STAT support.
Rewrite opcode dispatch code using a big switch instead of

8
sim/mn10300/mn10300_sim.h
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@ -72,10 +72,10 @@ extern struct simops Simops[];
#define PC (State.regs[9])
#define PSW (State.regs[11])
#define PSW_V 0x1
#define PSW_C 0x2
#define PSW_N 0x4
#define PSW_Z 0x8
#define PSW_Z 0x1
#define PSW_N 0x2
#define PSW_C 0x4
#define PSW_V 0x8
#define REG_D0 0
#define REG_A0 4