OpenE2K
/
binutils-gdb
12
0
Fork 0
Code Issues Pull Requests Releases Wiki Activity

sim: bfin: handle large shift values with accumulator shift insns 

When the shift magnitude exceeds 32 bits, the values rotate around (since
the hardware is actually a barrel shifter).  So handle this edge case,
update the corresponding AV bit in ASTAT which was missing previously,
and tweak the AZ setting based on how the hardware behaves.

Signed-off-by: Robin Getz <robin.getz@analog.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
This commit is contained in:
Mike Frysinger 2011-06-18 20:59:54 +00:00
parent 99dcc4dc65
commit 90e13d65c1
2 changed files with 14 additions and 2 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

6
sim/bfin/ChangeLog
View File

@ -1,3 +1,9 @@
2011-06-18 Robin Getz <robin.getz@analog.com>
* bfin-sim.c (decode_dsp32shiftimm_0): When shift is greater than
32, perform a left shift. Update the corresponding AV bit. Set
AZ when the low 32bits are also zero.
2011-06-18 Robin Getz <robin.getz@analog.com>
* bfin-sim.c (decode_dsp32shiftimm_0): With left shift vector insns,

10
sim/bfin/bfin-sim.c
View File

@ -5775,11 +5775,17 @@ decode_dsp32shiftimm_0 (SIM_CPU *cpu, bu16 iw0, bu16 iw1)
if (sop == 0)
acc <<= shiftup;
else
acc >>= shiftdn;
{
if (shiftdn <= 32)
acc >>= shiftdn;
else
acc <<= 32 - (shiftdn & 0x1f);
}
SET_AREG (HLs, acc);
SET_ASTATREG (av[HLs], 0);
SET_ASTATREG (an, !!(acc & 0x8000000000ull));
SET_ASTATREG (az, acc == 0);
SET_ASTATREG (az, (acc & 0xFFFFFFFFFF) == 0);
}
else if (sop == 1 && sopcde == 1 && bit8 == 0)
{