* config/tc-mips.c (macro_build, macro, mips_ip, md_apply_fix):
Fix formatting.
This commit is contained in:
parent
95f8e6c7d9
commit
90ecf1736c
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@ -1,3 +1,8 @@
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2010-12-09 Maciej W. Rozycki <macro@codesourcery.com>
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* config/tc-mips.c (macro_build, macro, mips_ip, md_apply_fix):
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Fix formatting.
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2010-12-09 Mike Frysinger <vapier@gentoo.org>
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* .gitignore: New file.
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@ -3780,14 +3780,14 @@ macro_build (expressionS *ep, const char *name, const char *fmt, ...)
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case 'u':
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macro_read_relocs (&args, r);
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gas_assert (ep != NULL
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&& (ep->X_op == O_constant
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|| (ep->X_op == O_symbol
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&& (*r == BFD_RELOC_MIPS_HIGHEST
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|| *r == BFD_RELOC_HI16_S
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|| *r == BFD_RELOC_HI16
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|| *r == BFD_RELOC_GPREL16
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|| *r == BFD_RELOC_MIPS_GOT_HI16
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|| *r == BFD_RELOC_MIPS_CALL_HI16))));
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&& (ep->X_op == O_constant
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|| (ep->X_op == O_symbol
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&& (*r == BFD_RELOC_MIPS_HIGHEST
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|| *r == BFD_RELOC_HI16_S
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|| *r == BFD_RELOC_HI16
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|| *r == BFD_RELOC_GPREL16
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|| *r == BFD_RELOC_MIPS_GOT_HI16
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|| *r == BFD_RELOC_MIPS_CALL_HI16))));
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continue;
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case 'p':
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@ -4933,7 +4933,7 @@ macro (struct mips_cl_insn *ip)
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break;
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default:
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macro_build (NULL, "balign", "t,s,2", treg, sreg,
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(int)imm_expr.X_add_number);
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(int) imm_expr.X_add_number);
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break;
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}
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break;
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@ -4983,7 +4983,7 @@ macro (struct mips_cl_insn *ip)
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case M_BGTL_I:
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likely = 1;
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case M_BGT_I:
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/* check for > max integer */
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/* Check for > max integer. */
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maxnum = 0x7fffffff;
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if (HAVE_64BIT_GPRS && sizeof (maxnum) > 4)
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{
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@ -4997,7 +4997,7 @@ macro (struct mips_cl_insn *ip)
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&& (HAVE_32BIT_GPRS || sizeof (maxnum) > 4))
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{
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do_false:
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/* result is always false */
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/* Result is always false. */
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if (! likely)
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macro_build (NULL, "nop", "", 0);
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else
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@ -5265,7 +5265,7 @@ macro (struct mips_cl_insn *ip)
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unsigned long pos;
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unsigned long size;
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if (imm_expr.X_op != O_constant || imm2_expr.X_op != O_constant)
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if (imm_expr.X_op != O_constant || imm2_expr.X_op != O_constant)
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{
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as_bad (_("Unsupported large constant"));
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pos = size = 1;
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@ -5281,8 +5281,7 @@ macro (struct mips_cl_insn *ip)
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as_bad (_("Improper position (%lu)"), pos);
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pos = 1;
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}
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if (size == 0 || size > 64
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|| (pos + size - 1) > 63)
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if (size == 0 || size > 64 || (pos + size - 1) > 63)
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{
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as_bad (_("Improper extract size (%lu, position %lu)"),
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size, pos);
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@ -5313,7 +5312,7 @@ macro (struct mips_cl_insn *ip)
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unsigned long pos;
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unsigned long size;
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if (imm_expr.X_op != O_constant || imm2_expr.X_op != O_constant)
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if (imm_expr.X_op != O_constant || imm2_expr.X_op != O_constant)
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{
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as_bad (_("Unsupported large constant"));
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pos = size = 1;
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@ -5329,8 +5328,7 @@ macro (struct mips_cl_insn *ip)
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as_bad (_("Improper position (%lu)"), pos);
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pos = 1;
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}
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if (size == 0 || size > 64
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|| (pos + size - 1) > 63)
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if (size == 0 || size > 64 || (pos + size - 1) > 63)
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{
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as_bad (_("Improper insert size (%lu, position %lu)"),
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size, pos);
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@ -5554,7 +5552,7 @@ macro (struct mips_cl_insn *ip)
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if (dbl && HAVE_32BIT_GPRS)
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as_warn (_("dla used to load 32-bit register"));
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if (! dbl && HAVE_64BIT_OBJECTS)
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if (!dbl && HAVE_64BIT_OBJECTS)
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as_warn (_("la used to load 64-bit address"));
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if (offset_expr.X_op == O_constant
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@ -6206,13 +6204,13 @@ macro (struct mips_cl_insn *ip)
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as_warn (_("No .cprestore pseudo-op used in PIC code"));
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else
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{
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if (! mips_frame_reg_valid)
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if (!mips_frame_reg_valid)
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{
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as_warn (_("No .frame pseudo-op used in PIC code"));
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/* Quiet this warning. */
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mips_frame_reg_valid = 1;
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}
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if (! mips_cprestore_valid)
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if (!mips_cprestore_valid)
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{
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as_warn (_("No .cprestore pseudo-op used in PIC code"));
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/* Quiet this warning. */
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@ -6266,7 +6264,7 @@ macro (struct mips_cl_insn *ip)
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GOT_DISP. */
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if (HAVE_NEWABI)
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{
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if (! mips_big_got)
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if (!mips_big_got)
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{
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relax_start (offset_expr.X_add_symbol);
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macro_build (&offset_expr, ADDRESS_LOAD_INSN, "t,o(b)",
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@ -6303,7 +6301,7 @@ macro (struct mips_cl_insn *ip)
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else
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{
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relax_start (offset_expr.X_add_symbol);
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if (! mips_big_got)
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if (!mips_big_got)
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{
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macro_build (&offset_expr, ADDRESS_LOAD_INSN, "t,o(b)",
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PIC_CALL_REG, BFD_RELOC_MIPS_CALL16,
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@ -6341,13 +6339,13 @@ macro (struct mips_cl_insn *ip)
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as_warn (_("No .cprestore pseudo-op used in PIC code"));
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else
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{
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if (! mips_frame_reg_valid)
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if (!mips_frame_reg_valid)
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{
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as_warn (_("No .frame pseudo-op used in PIC code"));
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/* Quiet this warning. */
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mips_frame_reg_valid = 1;
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}
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if (! mips_cprestore_valid)
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if (!mips_cprestore_valid)
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{
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as_warn (_("No .cprestore pseudo-op used in PIC code"));
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/* Quiet this warning. */
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@ -6896,10 +6894,10 @@ macro (struct mips_cl_insn *ip)
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else
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{
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gas_assert (offset_expr.X_op == O_symbol
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&& strcmp (segment_name (S_GET_SEGMENT
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(offset_expr.X_add_symbol)),
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".lit4") == 0
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&& offset_expr.X_add_number == 0);
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&& strcmp (segment_name (S_GET_SEGMENT
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(offset_expr.X_add_symbol)),
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".lit4") == 0
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&& offset_expr.X_add_number == 0);
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macro_build (&offset_expr, "lwc1", "T,o(b)", treg,
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BFD_RELOC_MIPS_LITERAL, mips_gp_register);
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break;
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@ -7011,7 +7009,7 @@ macro (struct mips_cl_insn *ip)
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}
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gas_assert (offset_expr.X_op == O_symbol
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&& offset_expr.X_add_number == 0);
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&& offset_expr.X_add_number == 0);
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s = segment_name (S_GET_SEGMENT (offset_expr.X_add_symbol));
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if (strcmp (s, ".lit8") == 0)
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{
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@ -7143,11 +7141,10 @@ macro (struct mips_cl_insn *ip)
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to adjust when loading from memory. We set coproc if we must
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load $fn+1 first. */
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/* Itbl support may require additional care here. */
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if (! target_big_endian)
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if (!target_big_endian)
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coproc = 0;
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if (mips_pic == NO_PIC
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|| offset_expr.X_op == O_constant)
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if (mips_pic == NO_PIC || offset_expr.X_op == O_constant)
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{
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/* If this is a reference to a GP relative symbol, we want
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<op> $treg,<sym>($gp) (BFD_RELOC_GPREL16)
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@ -7999,10 +7996,10 @@ macro (struct mips_cl_insn *ip)
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used_at = 1;
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if (offset_expr.X_add_number >= 0x7fff)
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as_bad (_("operand overflow"));
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if (! target_big_endian)
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if (!target_big_endian)
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++offset_expr.X_add_number;
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macro_build (&offset_expr, s, "t,o(b)", AT, BFD_RELOC_LO16, breg);
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if (! target_big_endian)
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if (!target_big_endian)
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--offset_expr.X_add_number;
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else
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++offset_expr.X_add_number;
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@ -8030,16 +8027,16 @@ macro (struct mips_cl_insn *ip)
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used_at = 1;
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tempreg = AT;
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}
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if (! target_big_endian)
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if (!target_big_endian)
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offset_expr.X_add_number += off;
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macro_build (&offset_expr, s, "t,o(b)", tempreg, BFD_RELOC_LO16, breg);
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if (! target_big_endian)
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if (!target_big_endian)
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offset_expr.X_add_number -= off;
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else
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offset_expr.X_add_number += off;
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macro_build (&offset_expr, s2, "t,o(b)", tempreg, BFD_RELOC_LO16, breg);
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/* If necessary, move the result in tempreg the final destination. */
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/* If necessary, move the result in tempreg to the final destination. */
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if (treg == tempreg)
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break;
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/* Protect second load's delay slot. */
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@ -8061,12 +8058,12 @@ macro (struct mips_cl_insn *ip)
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load_address (AT, &offset_expr, &used_at);
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if (breg != 0)
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macro_build (NULL, ADDRESS_ADD_INSN, "d,v,t", AT, AT, breg);
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if (! target_big_endian)
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if (!target_big_endian)
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expr1.X_add_number = off;
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else
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expr1.X_add_number = 0;
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macro_build (&expr1, s, "t,o(b)", treg, BFD_RELOC_LO16, AT);
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if (! target_big_endian)
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if (!target_big_endian)
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expr1.X_add_number = 0;
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else
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expr1.X_add_number = off;
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@ -8119,10 +8116,10 @@ macro (struct mips_cl_insn *ip)
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usw:
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if (offset_expr.X_add_number >= 0x8000 - off)
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as_bad (_("operand overflow"));
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if (! target_big_endian)
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if (!target_big_endian)
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offset_expr.X_add_number += off;
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macro_build (&offset_expr, s, "t,o(b)", treg, BFD_RELOC_LO16, breg);
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if (! target_big_endian)
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if (!target_big_endian)
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offset_expr.X_add_number -= off;
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else
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offset_expr.X_add_number += off;
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@ -8143,12 +8140,12 @@ macro (struct mips_cl_insn *ip)
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load_address (AT, &offset_expr, &used_at);
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if (breg != 0)
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macro_build (NULL, ADDRESS_ADD_INSN, "d,v,t", AT, AT, breg);
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if (! target_big_endian)
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if (!target_big_endian)
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expr1.X_add_number = off;
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else
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expr1.X_add_number = 0;
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macro_build (&expr1, s, "t,o(b)", treg, BFD_RELOC_LO16, AT);
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if (! target_big_endian)
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if (!target_big_endian)
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expr1.X_add_number = 0;
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else
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expr1.X_add_number = off;
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@ -8160,16 +8157,16 @@ macro (struct mips_cl_insn *ip)
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load_address (AT, &offset_expr, &used_at);
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if (breg != 0)
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macro_build (NULL, ADDRESS_ADD_INSN, "d,v,t", AT, AT, breg);
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if (! target_big_endian)
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if (!target_big_endian)
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expr1.X_add_number = 0;
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macro_build (&expr1, "sb", "t,o(b)", treg, BFD_RELOC_LO16, AT);
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macro_build (NULL, "srl", "d,w,<", treg, treg, 8);
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if (! target_big_endian)
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if (!target_big_endian)
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expr1.X_add_number = 1;
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else
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expr1.X_add_number = 0;
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macro_build (&expr1, "sb", "t,o(b)", treg, BFD_RELOC_LO16, AT);
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if (! target_big_endian)
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if (!target_big_endian)
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expr1.X_add_number = 0;
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else
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expr1.X_add_number = 1;
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@ -8743,7 +8740,7 @@ mips_ip (char *str, struct mips_cl_insn *ip)
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return;
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break;
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case '2': /* dsp 2-bit unsigned immediate in bit 11 */
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case '2': /* DSP 2-bit unsigned immediate in bit 11. */
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my_getExpression (&imm_expr, s);
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check_absolute_expr (ip, &imm_expr);
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if ((unsigned long) imm_expr.X_add_number != 1
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@ -8757,7 +8754,7 @@ mips_ip (char *str, struct mips_cl_insn *ip)
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s = expr_end;
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continue;
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case '3': /* dsp 3-bit unsigned immediate in bit 21 */
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case '3': /* DSP 3-bit unsigned immediate in bit 21. */
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my_getExpression (&imm_expr, s);
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check_absolute_expr (ip, &imm_expr);
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if (imm_expr.X_add_number & ~OP_MASK_SA3)
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@ -8770,7 +8767,7 @@ mips_ip (char *str, struct mips_cl_insn *ip)
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s = expr_end;
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continue;
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case '4': /* dsp 4-bit unsigned immediate in bit 21 */
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case '4': /* DSP 4-bit unsigned immediate in bit 21. */
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my_getExpression (&imm_expr, s);
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check_absolute_expr (ip, &imm_expr);
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if (imm_expr.X_add_number & ~OP_MASK_SA4)
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@ -8783,7 +8780,7 @@ mips_ip (char *str, struct mips_cl_insn *ip)
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s = expr_end;
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continue;
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case '5': /* dsp 8-bit unsigned immediate in bit 16 */
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case '5': /* DSP 8-bit unsigned immediate in bit 16. */
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my_getExpression (&imm_expr, s);
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check_absolute_expr (ip, &imm_expr);
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if (imm_expr.X_add_number & ~OP_MASK_IMM8)
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@ -8796,7 +8793,7 @@ mips_ip (char *str, struct mips_cl_insn *ip)
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s = expr_end;
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continue;
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case '6': /* dsp 5-bit unsigned immediate in bit 21 */
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case '6': /* DSP 5-bit unsigned immediate in bit 21. */
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my_getExpression (&imm_expr, s);
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check_absolute_expr (ip, &imm_expr);
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if (imm_expr.X_add_number & ~OP_MASK_RS)
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@ -8809,7 +8806,7 @@ mips_ip (char *str, struct mips_cl_insn *ip)
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s = expr_end;
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continue;
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case '7': /* four dsp accumulators in bits 11,12 */
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case '7': /* Four DSP accumulators in bits 11,12. */
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if (s[0] == '$' && s[1] == 'a' && s[2] == 'c' &&
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s[3] >= '0' && s[3] <= '3')
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{
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@ -8822,7 +8819,7 @@ mips_ip (char *str, struct mips_cl_insn *ip)
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as_bad (_("Invalid dsp acc register"));
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break;
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case '8': /* dsp 6-bit unsigned immediate in bit 11 */
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case '8': /* DSP 6-bit unsigned immediate in bit 11. */
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my_getExpression (&imm_expr, s);
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check_absolute_expr (ip, &imm_expr);
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if (imm_expr.X_add_number & ~OP_MASK_WRDSP)
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@ -8836,7 +8833,7 @@ mips_ip (char *str, struct mips_cl_insn *ip)
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s = expr_end;
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continue;
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case '9': /* four dsp accumulators in bits 21,22 */
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case '9': /* Four DSP accumulators in bits 21,22. */
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if (s[0] == '$' && s[1] == 'a' && s[2] == 'c' &&
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s[3] >= '0' && s[3] <= '3')
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{
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@ -8849,7 +8846,7 @@ mips_ip (char *str, struct mips_cl_insn *ip)
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as_bad (_("Invalid dsp acc register"));
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break;
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case '0': /* dsp 6-bit signed immediate in bit 20 */
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case '0': /* DSP 6-bit signed immediate in bit 20. */
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my_getExpression (&imm_expr, s);
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check_absolute_expr (ip, &imm_expr);
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min_range = -((OP_MASK_DSPSFT + 1) >> 1);
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@ -8866,7 +8863,7 @@ mips_ip (char *str, struct mips_cl_insn *ip)
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s = expr_end;
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continue;
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case '\'': /* dsp 6-bit unsigned immediate in bit 16 */
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case '\'': /* DSP 6-bit unsigned immediate in bit 16. */
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my_getExpression (&imm_expr, s);
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check_absolute_expr (ip, &imm_expr);
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if (imm_expr.X_add_number & ~OP_MASK_RDDSP)
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@ -8880,7 +8877,7 @@ mips_ip (char *str, struct mips_cl_insn *ip)
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s = expr_end;
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continue;
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case ':': /* dsp 7-bit signed immediate in bit 19 */
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case ':': /* DSP 7-bit signed immediate in bit 19. */
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my_getExpression (&imm_expr, s);
|
||||
check_absolute_expr (ip, &imm_expr);
|
||||
min_range = -((OP_MASK_DSPSFT_7 + 1) >> 1);
|
||||
|
@ -8897,7 +8894,7 @@ mips_ip (char *str, struct mips_cl_insn *ip)
|
|||
s = expr_end;
|
||||
continue;
|
||||
|
||||
case '@': /* dsp 10-bit signed immediate in bit 16 */
|
||||
case '@': /* DSP 10-bit signed immediate in bit 16. */
|
||||
my_getExpression (&imm_expr, s);
|
||||
check_absolute_expr (ip, &imm_expr);
|
||||
min_range = -((OP_MASK_IMM10 + 1) >> 1);
|
||||
|
@ -8936,7 +8933,7 @@ mips_ip (char *str, struct mips_cl_insn *ip)
|
|||
s = expr_end;
|
||||
continue;
|
||||
|
||||
case '*': /* four dsp accumulators in bits 18,19 */
|
||||
case '*': /* Four DSP accumulators in bits 18,19. */
|
||||
if (s[0] == '$' && s[1] == 'a' && s[2] == 'c' &&
|
||||
s[3] >= '0' && s[3] <= '3')
|
||||
{
|
||||
|
@ -8949,7 +8946,7 @@ mips_ip (char *str, struct mips_cl_insn *ip)
|
|||
as_bad (_("Invalid dsp/smartmips acc register"));
|
||||
break;
|
||||
|
||||
case '&': /* four dsp accumulators in bits 13,14 */
|
||||
case '&': /* Four DSP accumulators in bits 13,14. */
|
||||
if (s[0] == '$' && s[1] == 'a' && s[2] == 'c' &&
|
||||
s[3] >= '0' && s[3] <= '3')
|
||||
{
|
||||
|
@ -8999,7 +8996,7 @@ mips_ip (char *str, struct mips_cl_insn *ip)
|
|||
if (*s == '\0')
|
||||
return;
|
||||
|
||||
case ')': /* these must match exactly */
|
||||
case ')': /* These must match exactly. */
|
||||
case '[':
|
||||
case ']':
|
||||
if (*s++ == *args)
|
||||
|
@ -9028,7 +9025,7 @@ mips_ip (char *str, struct mips_cl_insn *ip)
|
|||
imm->desc ? imm->desc : ip->insn_mo->name,
|
||||
(unsigned long) imm_expr.X_add_number,
|
||||
(unsigned long) imm_expr.X_add_number);
|
||||
imm_expr.X_add_number &= imm->mask;
|
||||
imm_expr.X_add_number &= imm->mask;
|
||||
}
|
||||
ip->insn_opcode |= ((unsigned long) imm_expr.X_add_number
|
||||
<< imm->shift);
|
||||
|
@ -9036,7 +9033,7 @@ mips_ip (char *str, struct mips_cl_insn *ip)
|
|||
s = expr_end;
|
||||
}
|
||||
continue;
|
||||
|
||||
|
||||
case 'A': /* ins/ext position, becomes LSB. */
|
||||
limlo = 0;
|
||||
limhi = 31;
|
||||
|
@ -9045,7 +9042,7 @@ mips_ip (char *str, struct mips_cl_insn *ip)
|
|||
limlo = 32;
|
||||
limhi = 63;
|
||||
goto do_lsb;
|
||||
do_lsb:
|
||||
do_lsb:
|
||||
my_getExpression (&imm_expr, s);
|
||||
check_absolute_expr (ip, &imm_expr);
|
||||
if ((unsigned long) imm_expr.X_add_number < limlo
|
||||
|
@ -9069,7 +9066,7 @@ do_lsb:
|
|||
limlo = 33;
|
||||
limhi = 64;
|
||||
goto do_msb;
|
||||
do_msb:
|
||||
do_msb:
|
||||
my_getExpression (&imm_expr, s);
|
||||
check_absolute_expr (ip, &imm_expr);
|
||||
/* Check for negative input so that small negative numbers
|
||||
|
@ -9105,7 +9102,7 @@ do_msb:
|
|||
limlo = 33;
|
||||
limhi = 64;
|
||||
goto do_msbd;
|
||||
do_msbd:
|
||||
do_msbd:
|
||||
my_getExpression (&imm_expr, s);
|
||||
check_absolute_expr (ip, &imm_expr);
|
||||
/* Check for negative input so that small negative numbers
|
||||
|
@ -9282,8 +9279,9 @@ do_msbd:
|
|||
continue;
|
||||
|
||||
default:
|
||||
as_bad (_("internal: bad mips opcode (unknown extension operand type `+%c'): %s %s"),
|
||||
*args, insn->name, insn->args);
|
||||
as_bad (_("Internal: bad mips opcode "
|
||||
"(unknown extension operand type `+%c'): %s %s"),
|
||||
*args, insn->name, insn->args);
|
||||
/* Further processing is fruitless. */
|
||||
return;
|
||||
}
|
||||
|
@ -9317,9 +9315,9 @@ do_msbd:
|
|||
s = expr_end;
|
||||
continue;
|
||||
|
||||
case 'k': /* cache code */
|
||||
case 'h': /* prefx code */
|
||||
case '1': /* sync type */
|
||||
case 'k': /* CACHE code. */
|
||||
case 'h': /* PREFX code. */
|
||||
case '1': /* SYNC type. */
|
||||
my_getExpression (&imm_expr, s);
|
||||
check_absolute_expr (ip, &imm_expr);
|
||||
if ((unsigned long) imm_expr.X_add_number > 31)
|
||||
|
@ -9355,7 +9353,7 @@ do_msbd:
|
|||
s = expr_end;
|
||||
continue;
|
||||
|
||||
case 'c': /* break code */
|
||||
case 'c': /* BREAK code. */
|
||||
my_getExpression (&imm_expr, s);
|
||||
check_absolute_expr (ip, &imm_expr);
|
||||
if ((unsigned long) imm_expr.X_add_number > OP_MASK_CODE)
|
||||
|
@ -9367,7 +9365,7 @@ do_msbd:
|
|||
s = expr_end;
|
||||
continue;
|
||||
|
||||
case 'q': /* lower break code */
|
||||
case 'q': /* Lower BREAK code. */
|
||||
my_getExpression (&imm_expr, s);
|
||||
check_absolute_expr (ip, &imm_expr);
|
||||
if ((unsigned long) imm_expr.X_add_number > OP_MASK_CODE2)
|
||||
|
@ -9379,7 +9377,7 @@ do_msbd:
|
|||
s = expr_end;
|
||||
continue;
|
||||
|
||||
case 'B': /* 20-bit syscall/break code. */
|
||||
case 'B': /* 20-bit SYSCALL/BREAK code. */
|
||||
my_getExpression (&imm_expr, s);
|
||||
check_absolute_expr (ip, &imm_expr);
|
||||
if ((unsigned long) imm_expr.X_add_number > OP_MASK_CODE20)
|
||||
|
@ -9391,7 +9389,7 @@ do_msbd:
|
|||
s = expr_end;
|
||||
continue;
|
||||
|
||||
case 'C': /* Coprocessor code */
|
||||
case 'C': /* Coprocessor code. */
|
||||
my_getExpression (&imm_expr, s);
|
||||
check_absolute_expr (ip, &imm_expr);
|
||||
if ((unsigned long) imm_expr.X_add_number > OP_MASK_COPZ)
|
||||
|
@ -9405,7 +9403,7 @@ do_msbd:
|
|||
s = expr_end;
|
||||
continue;
|
||||
|
||||
case 'J': /* 19-bit wait code. */
|
||||
case 'J': /* 19-bit WAIT code. */
|
||||
my_getExpression (&imm_expr, s);
|
||||
check_absolute_expr (ip, &imm_expr);
|
||||
if ((unsigned long) imm_expr.X_add_number > OP_MASK_CODE19)
|
||||
|
@ -9444,20 +9442,20 @@ do_msbd:
|
|||
else
|
||||
break;
|
||||
|
||||
case 'b': /* base register */
|
||||
case 'd': /* destination register */
|
||||
case 's': /* source register */
|
||||
case 't': /* target register */
|
||||
case 'r': /* both target and source */
|
||||
case 'v': /* both dest and source */
|
||||
case 'w': /* both dest and target */
|
||||
case 'E': /* coprocessor target register */
|
||||
case 'K': /* 'rdhwr' destination register */
|
||||
case 'x': /* ignore register name */
|
||||
case 'z': /* must be zero register */
|
||||
case 'U': /* destination register (clo/clz). */
|
||||
case 'g': /* coprocessor destination register */
|
||||
s_reset = s;
|
||||
case 'b': /* Base register. */
|
||||
case 'd': /* Destination register. */
|
||||
case 's': /* Source register. */
|
||||
case 't': /* Target register. */
|
||||
case 'r': /* Both target and source. */
|
||||
case 'v': /* Both dest and source. */
|
||||
case 'w': /* Both dest and target. */
|
||||
case 'E': /* Coprocessor target register. */
|
||||
case 'K': /* RDHWR destination register. */
|
||||
case 'x': /* Ignore register name. */
|
||||
case 'z': /* Must be zero register. */
|
||||
case 'U': /* Destination register (CLO/CLZ). */
|
||||
case 'g': /* Coprocessor destination register. */
|
||||
s_reset = s;
|
||||
if (*args == 'E' || *args == 'K')
|
||||
ok = reg_lookup (&s, RTYPE_NUM, ®no);
|
||||
else
|
||||
|
@ -9493,18 +9491,20 @@ do_msbd:
|
|||
if (c == 's' && !strncmp (ip->insn_mo->name, "jalr", 4))
|
||||
{
|
||||
if (regno == lastregno)
|
||||
{
|
||||
insn_error = _("source and destination must be different");
|
||||
{
|
||||
insn_error
|
||||
= _("source and destination must be different");
|
||||
continue;
|
||||
}
|
||||
}
|
||||
if (regno == 31 && lastregno == 0xffffffff)
|
||||
{
|
||||
insn_error = _("a destination register must be supplied");
|
||||
{
|
||||
insn_error
|
||||
= _("a destination register must be supplied");
|
||||
continue;
|
||||
}
|
||||
}
|
||||
}
|
||||
/* Now that we have assembled one operand, we use the args string
|
||||
* to figure out where it goes in the instruction. */
|
||||
/* Now that we have assembled one operand, we use the args
|
||||
string to figure out where it goes in the instruction. */
|
||||
switch (c)
|
||||
{
|
||||
case 'r':
|
||||
|
@ -9598,10 +9598,10 @@ do_msbd:
|
|||
case 'Y': /* MDMX source register. */
|
||||
case 'Z': /* MDMX target register. */
|
||||
is_mdmx = 1;
|
||||
case 'D': /* floating point destination register */
|
||||
case 'S': /* floating point source register */
|
||||
case 'T': /* floating point target register */
|
||||
case 'R': /* floating point source register */
|
||||
case 'D': /* Floating point destination register. */
|
||||
case 'S': /* Floating point source register. */
|
||||
case 'T': /* Floating point target register. */
|
||||
case 'R': /* Floating point source register. */
|
||||
case 'V':
|
||||
case 'W':
|
||||
rtype = RTYPE_FPU;
|
||||
|
@ -9619,7 +9619,7 @@ do_msbd:
|
|||
{
|
||||
if ((regno & 1) != 0
|
||||
&& HAVE_32BIT_FPRS
|
||||
&& ! mips_oddfpreg_ok (ip->insn_mo, argnum))
|
||||
&& !mips_oddfpreg_ok (ip->insn_mo, argnum))
|
||||
as_warn (_("Float register should be even, was %d"),
|
||||
regno);
|
||||
|
||||
|
@ -9680,7 +9680,7 @@ do_msbd:
|
|||
ip->insn_opcode |= (MDMX_FMTSEL_VEC_OB <<
|
||||
OP_SH_VSEL);
|
||||
}
|
||||
/* Fall through */
|
||||
/* Fall through. */
|
||||
case 'W':
|
||||
case 'T':
|
||||
case 'Z':
|
||||
|
@ -9787,35 +9787,35 @@ do_msbd:
|
|||
|| (temp[2] == 0 && temp[3] == 0))))
|
||||
{
|
||||
imm_expr.X_op = O_constant;
|
||||
if (! target_big_endian)
|
||||
if (!target_big_endian)
|
||||
imm_expr.X_add_number = bfd_getl32 (temp);
|
||||
else
|
||||
imm_expr.X_add_number = bfd_getb32 (temp);
|
||||
}
|
||||
else if (length > 4
|
||||
&& ! mips_disable_float_construction
|
||||
&& !mips_disable_float_construction
|
||||
/* Constants can only be constructed in GPRs and
|
||||
copied to FPRs if the GPRs are at least as wide
|
||||
as the FPRs. Force the constant into memory if
|
||||
we are using 64-bit FPRs but the GPRs are only
|
||||
32 bits wide. */
|
||||
&& (using_gprs
|
||||
|| ! (HAVE_64BIT_FPRS && HAVE_32BIT_GPRS))
|
||||
|| !(HAVE_64BIT_FPRS && HAVE_32BIT_GPRS))
|
||||
&& ((temp[0] == 0 && temp[1] == 0)
|
||||
|| (temp[2] == 0 && temp[3] == 0))
|
||||
&& ((temp[4] == 0 && temp[5] == 0)
|
||||
|| (temp[6] == 0 && temp[7] == 0)))
|
||||
{
|
||||
/* The value is simple enough to load with a couple of
|
||||
instructions. If using 32-bit registers, set
|
||||
imm_expr to the high order 32 bits and offset_expr to
|
||||
the low order 32 bits. Otherwise, set imm_expr to
|
||||
the entire 64 bit constant. */
|
||||
instructions. If using 32-bit registers, set
|
||||
imm_expr to the high order 32 bits and offset_expr to
|
||||
the low order 32 bits. Otherwise, set imm_expr to
|
||||
the entire 64 bit constant. */
|
||||
if (using_gprs ? HAVE_32BIT_GPRS : HAVE_32BIT_FPRS)
|
||||
{
|
||||
imm_expr.X_op = O_constant;
|
||||
offset_expr.X_op = O_constant;
|
||||
if (! target_big_endian)
|
||||
if (!target_big_endian)
|
||||
{
|
||||
imm_expr.X_add_number = bfd_getl32 (temp + 4);
|
||||
offset_expr.X_add_number = bfd_getl32 (temp);
|
||||
|
@ -9831,7 +9831,7 @@ do_msbd:
|
|||
else if (sizeof (imm_expr.X_add_number) > 4)
|
||||
{
|
||||
imm_expr.X_op = O_constant;
|
||||
if (! target_big_endian)
|
||||
if (!target_big_endian)
|
||||
imm_expr.X_add_number = bfd_getl64 (temp);
|
||||
else
|
||||
imm_expr.X_add_number = bfd_getb64 (temp);
|
||||
|
@ -9840,7 +9840,7 @@ do_msbd:
|
|||
{
|
||||
imm_expr.X_op = O_big;
|
||||
imm_expr.X_add_number = 4;
|
||||
if (! target_big_endian)
|
||||
if (!target_big_endian)
|
||||
{
|
||||
generic_bignum[0] = bfd_getl16 (temp);
|
||||
generic_bignum[1] = bfd_getl16 (temp + 2);
|
||||
|
@ -9911,8 +9911,8 @@ do_msbd:
|
|||
}
|
||||
continue;
|
||||
|
||||
case 'i': /* 16 bit unsigned immediate */
|
||||
case 'j': /* 16 bit signed immediate */
|
||||
case 'i': /* 16-bit unsigned immediate. */
|
||||
case 'j': /* 16-bit signed immediate. */
|
||||
*imm_reloc = BFD_RELOC_LO16;
|
||||
if (my_getSmallExpression (&imm_expr, imm_reloc, s) == 0)
|
||||
{
|
||||
|
@ -9958,7 +9958,7 @@ do_msbd:
|
|||
s = expr_end;
|
||||
continue;
|
||||
|
||||
case 'o': /* 16 bit offset */
|
||||
case 'o': /* 16-bit offset. */
|
||||
offset_reloc[0] = BFD_RELOC_LO16;
|
||||
offset_reloc[1] = BFD_RELOC_UNUSED;
|
||||
offset_reloc[2] = BFD_RELOC_UNUSED;
|
||||
|
@ -9988,13 +9988,13 @@ do_msbd:
|
|||
s = expr_end;
|
||||
continue;
|
||||
|
||||
case 'p': /* pc relative offset */
|
||||
case 'p': /* PC-relative offset. */
|
||||
*offset_reloc = BFD_RELOC_16_PCREL_S2;
|
||||
my_getExpression (&offset_expr, s);
|
||||
s = expr_end;
|
||||
continue;
|
||||
|
||||
case 'u': /* upper 16 bits */
|
||||
case 'u': /* Upper 16 bits. */
|
||||
if (my_getSmallExpression (&imm_expr, imm_reloc, s) == 0
|
||||
&& imm_expr.X_op == O_constant
|
||||
&& (imm_expr.X_add_number < 0
|
||||
|
@ -10003,29 +10003,31 @@ do_msbd:
|
|||
s = expr_end;
|
||||
continue;
|
||||
|
||||
case 'a': /* 26 bit address */
|
||||
case 'a': /* 26-bit address. */
|
||||
my_getExpression (&offset_expr, s);
|
||||
s = expr_end;
|
||||
*offset_reloc = BFD_RELOC_MIPS_JMP;
|
||||
continue;
|
||||
|
||||
case 'N': /* 3 bit branch condition code */
|
||||
case 'M': /* 3 bit compare condition code */
|
||||
case 'N': /* 3-bit branch condition code. */
|
||||
case 'M': /* 3-bit compare condition code. */
|
||||
rtype = RTYPE_CCC;
|
||||
if (ip->insn_mo->pinfo & (FP_D| FP_S))
|
||||
if (ip->insn_mo->pinfo & (FP_D | FP_S))
|
||||
rtype |= RTYPE_FCC;
|
||||
if (!reg_lookup (&s, rtype, ®no))
|
||||
break;
|
||||
if ((strcmp(str + strlen(str) - 3, ".ps") == 0
|
||||
|| strcmp(str + strlen(str) - 5, "any2f") == 0
|
||||
|| strcmp(str + strlen(str) - 5, "any2t") == 0)
|
||||
if ((strcmp (str + strlen (str) - 3, ".ps") == 0
|
||||
|| strcmp (str + strlen (str) - 5, "any2f") == 0
|
||||
|| strcmp (str + strlen (str) - 5, "any2t") == 0)
|
||||
&& (regno & 1) != 0)
|
||||
as_warn (_("Condition code register should be even for %s, was %d"),
|
||||
as_warn (_("Condition code register should be even for %s, "
|
||||
"was %d"),
|
||||
str, regno);
|
||||
if ((strcmp(str + strlen(str) - 5, "any4f") == 0
|
||||
|| strcmp(str + strlen(str) - 5, "any4t") == 0)
|
||||
if ((strcmp (str + strlen (str) - 5, "any4f") == 0
|
||||
|| strcmp (str + strlen (str) - 5, "any4t") == 0)
|
||||
&& (regno & 3) != 0)
|
||||
as_warn (_("Condition code register should be 0 or 4 for %s, was %d"),
|
||||
as_warn (_("Condition code register should be 0 or 4 for %s, "
|
||||
"was %d"),
|
||||
str, regno);
|
||||
if (*args == 'N')
|
||||
INSERT_OPERAND (BCC, *ip, regno);
|
||||
|
@ -12265,13 +12267,13 @@ md_apply_fix (fixS *fixP, valueT *valP, segT seg ATTRIBUTE_UNUSED)
|
|||
return;
|
||||
|
||||
gas_assert (fixP->fx_size == 4
|
||||
|| fixP->fx_r_type == BFD_RELOC_16
|
||||
|| fixP->fx_r_type == BFD_RELOC_64
|
||||
|| fixP->fx_r_type == BFD_RELOC_CTOR
|
||||
|| fixP->fx_r_type == BFD_RELOC_MIPS_SUB
|
||||
|| fixP->fx_r_type == BFD_RELOC_VTABLE_INHERIT
|
||||
|| fixP->fx_r_type == BFD_RELOC_VTABLE_ENTRY
|
||||
|| fixP->fx_r_type == BFD_RELOC_MIPS_TLS_DTPREL64);
|
||||
|| fixP->fx_r_type == BFD_RELOC_16
|
||||
|| fixP->fx_r_type == BFD_RELOC_64
|
||||
|| fixP->fx_r_type == BFD_RELOC_CTOR
|
||||
|| fixP->fx_r_type == BFD_RELOC_MIPS_SUB
|
||||
|| fixP->fx_r_type == BFD_RELOC_VTABLE_INHERIT
|
||||
|| fixP->fx_r_type == BFD_RELOC_VTABLE_ENTRY
|
||||
|| fixP->fx_r_type == BFD_RELOC_MIPS_TLS_DTPREL64);
|
||||
|
||||
buf = (bfd_byte *) (fixP->fx_frag->fr_literal + fixP->fx_where);
|
||||
|
||||
|
|
Loading…
Reference in New Issue