* hppa-dis.c (extract_16): New function.
(print_insn_hppa): Fix incorrect handling of 'fe'. Added handling of
new operand types l,y,&,fe,fE,fx.
This commit is contained in:
Jeff Law
parent
98e5953c9c
commit
91b1cc5d0b
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@ -1,3 +1,9 @@
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Fri Apr 21 16:03:39 2000 Jason Eckhardt <jle@cygnus.com>
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* hppa-dis.c (extract_16): New function.
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(print_insn_hppa): Fix incorrect handling of 'fe'. Added handling of
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new operand types l,y,&,fe,fE,fx.
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Fri Apr 21 13:20:53 2000 Richard Henderson <rth@cygnus.com>
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David Mosberger <davidm@hpl.hp.com>
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Timothy Wall <twall@cygnus.com>
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@ -42,12 +42,13 @@ static const char *const fp_reg_names[] =
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typedef unsigned int CORE_ADDR;
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/* Get at various relevent fields of an instruction word. */
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/* Get at various relevent fields of an instruction word. */
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#define MASK_5 0x1f
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#define MASK_10 0x3ff
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#define MASK_11 0x7ff
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#define MASK_14 0x3fff
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#define MASK_16 0xffff
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#define MASK_21 0x1fffff
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/* This macro gets bit fields using HP's numbering (MSB = 0) */
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@ -132,7 +133,7 @@ static const char *const read_write_names[] = {",r", ",w"};
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static const char *const add_compl_names[] = { 0, "", ",l", ",tsv" };
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/* For a bunch of different instructions form an index into a
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completer name table. */
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completer name table. */
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#define GET_COMPL(insn) (GET_FIELD (insn, 26, 26) | \
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GET_FIELD (insn, 18, 18) << 1)
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@ -181,7 +182,7 @@ fput_creg (reg, info)
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(*info->fprintf_func) (info->stream, control_reg[reg]);
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}
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/* print constants with sign */
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/* Print constants with sign. */
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static void
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fput_const (num, info)
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@ -195,9 +196,9 @@ fput_const (num, info)
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}
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/* Routines to extract various sized constants out of hppa
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instructions. */
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instructions. */
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/* extract a 3-bit space register number from a be, ble, mtsp or mfsp */
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/* Extract a 3-bit space register number from a be, ble, mtsp or mfsp. */
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static int
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extract_3 (word)
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unsigned word;
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@ -212,7 +213,7 @@ extract_5_load (word)
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return low_sign_extend (word >> 16 & MASK_5, 5);
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}
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/* extract the immediate field from a st{bhw}s instruction */
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/* Extract the immediate field from a st{bhw}s instruction. */
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static int
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extract_5_store (word)
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unsigned word;
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@ -220,7 +221,7 @@ extract_5_store (word)
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return low_sign_extend (word & MASK_5, 5);
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}
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/* extract the immediate field from a break instruction */
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/* Extract the immediate field from a break instruction. */
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static unsigned
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extract_5r_store (word)
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unsigned word;
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@ -228,7 +229,7 @@ extract_5r_store (word)
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return (word & MASK_5);
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}
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/* extract the immediate field from a {sr}sm instruction */
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/* Extract the immediate field from a {sr}sm instruction. */
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static unsigned
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extract_5R_store (word)
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unsigned word;
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@ -236,7 +237,7 @@ extract_5R_store (word)
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return (word >> 16 & MASK_5);
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}
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/* extract the 10 bit immediate field from a {sr}sm instruction */
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/* Extract the 10 bit immediate field from a {sr}sm instruction. */
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static unsigned
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extract_10U_store (word)
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unsigned word;
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@ -244,7 +245,7 @@ extract_10U_store (word)
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return (word >> 16 & MASK_10);
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}
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/* extract the immediate field from a bb instruction */
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/* Extract the immediate field from a bb instruction. */
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static unsigned
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extract_5Q_store (word)
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unsigned word;
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@ -252,7 +253,7 @@ extract_5Q_store (word)
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return (word >> 21 & MASK_5);
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}
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/* extract an 11 bit immediate field */
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/* Extract an 11 bit immediate field. */
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static int
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extract_11 (word)
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unsigned word;
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@ -260,7 +261,7 @@ extract_11 (word)
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return low_sign_extend (word & MASK_11, 11);
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}
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/* extract a 14 bit immediate field */
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/* Extract a 14 bit immediate field. */
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static int
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extract_14 (word)
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unsigned word;
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@ -268,7 +269,21 @@ extract_14 (word)
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return low_sign_extend (word & MASK_14, 14);
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}
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/* extract a 21 bit constant */
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/* Extract a 16 bit immediate field (PA2.0 wide only). */
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static int
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extract_16 (word)
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unsigned word;
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{
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int m15, m0, m1;
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m0 = GET_BIT (word, 16);
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m1 = GET_BIT (word, 17);
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m15 = GET_BIT (word, 31);
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word = (word >> 1) & 0x1fff;
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word = word | (m15 << 15) | ((m15 ^ m0) << 14) | ((m15 ^ m1) << 13);
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return sign_extend (word, 16);
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}
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/* Extract a 21 bit constant. */
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static int
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extract_21 (word)
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@ -290,7 +305,7 @@ extract_21 (word)
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return sign_extend (val, 21) << 11;
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}
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/* extract a 12 bit constant from branch instructions */
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/* Extract a 12 bit constant from branch instructions. */
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static int
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extract_12 (word)
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@ -301,8 +316,8 @@ extract_12 (word)
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(word & 0x1) << 11, 12) << 2;
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}
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/* extract a 17 bit constant from branch instructions, returning the
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19 bit signed value. */
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/* Extract a 17 bit constant from branch instructions, returning the
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19 bit signed value. */
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static int
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extract_17 (word)
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@ -352,7 +367,10 @@ print_insn_hppa (memaddr, info)
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if ((insn & opcode->mask) == opcode->match)
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{
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register const char *s;
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#ifndef BFD64
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if (opcode->arch == pa20w)
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continue;
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#endif
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(*info->fprintf_func) (info->stream, "%s", opcode->name);
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if (!strchr ("cfCY?-+nHNZFIuv", opcode->args[0]))
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@ -473,13 +491,25 @@ print_insn_hppa (memaddr, info)
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fput_fp_reg (reg, info);
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break;
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}
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/* 'fe' will not generate a space before the register
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name. Normally that is fine. Except that it
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causes problems with fstw fe,y(b) which has no FP
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format completer. */
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case 'E':
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fputs_filtered (" ", info);
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/* FALLTHRU */
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case 'e':
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if (GET_FIELD (insn, 25, 25))
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if (GET_FIELD (insn, 30, 30))
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fput_fp_reg_r (GET_FIELD (insn, 11, 15), info);
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else
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fput_fp_reg (GET_FIELD (insn, 11, 15), info);
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break;
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case 'x':
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fput_fp_reg (GET_FIELD (insn, 11, 15), info);
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break;
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}
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break;
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@ -835,6 +865,10 @@ print_insn_hppa (memaddr, info)
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case 'k':
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fput_const (extract_21 (insn), info);
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break;
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case 'l':
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/* 16-bit long disp., PA2.0 wide only. */
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fput_const (extract_16 (insn), info);
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break;
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case 'n':
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if (insn & 0x2)
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(*info->fprintf_func) (info->stream, ",n ");
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@ -1041,6 +1075,24 @@ print_insn_hppa (memaddr, info)
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break;
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}
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case 'y':
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{
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/* 16-bit long disp., PA2.0 wide only. */
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int disp = extract_16 (insn);
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disp &= ~3;
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fput_const (disp, info);
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break;
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}
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case '&':
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{
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/* 16-bit long disp., PA2.0 wide only. */
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int disp = extract_16 (insn);
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disp &= ~7;
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fput_const (disp, info);
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break;
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}
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/* ?!? FIXME */
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case '_':
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case '{':
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