MIPS/GAS: Clear the ASE_MIPS16E2_MT flag for recalculation
Correct a commit 25499ac7ee
("MIPS16e2: Add MIPS16e2 ASE support") GAS
bug with the handling of the ASE_MIPS16E2_MT combination ASE flag, which
is not correctly calculated as `.set nomips16e2' and `.set nomt'
pseudo-ops are processed. This leads to code like:
$ cat foo.s
.set nomt
evpe
.align 4, 0
$ cat bar.s
.set nomips16e2
dvpe
.align 4, 0
$
to successfully assemble where it should not:
$ as -32 -mips32r3 -mmt -mips16 -mmips16e2 -o foo.o foo.s
$ as -32 -mips32r3 -mmt -mips16 -mmips16e2 -o bar.o bar.s
$ objdump -m mips:16 -d foo.o
foo.o: file format elf32-tradbigmips
Disassembly of section .text:
00000000 <.text>:
0: f027 6700 evpe
...
bar.o: file format elf32-tradbigmips
Disassembly of section .text:
00000000 <.text>:
0: f026 6700 dvpe
...
$
This happens because ASE_MIPS16E2_MT once set in `mips_set_ase' is never
cleared. Fix the problem by clearing it there before it is calculated
based on the ASE_MT and ASE_MIPS16E2 flags, making assembly fail as
expected:
$ as -32 -mips32r3 -mmt -mips16 -mmips16e2 -o foo.o foo.s
foo.s: Assembler messages:
foo.s:2: Error: opcode not supported on this processor: mips32r3 (mips32r3) `evpe'
$ as -32 -mips32r3 -mmt -mips16 -mmips16e2 -o bar.o bar.s
bar.s: Assembler messages:
bar.s:2: Error: opcode not supported on this processor: mips32r3 (mips32r3) `dvpe'
$
gas/
* config/tc-mips.c (mips_set_ase): Clear the ASE_MIPS16E2_MT
flag before recalculating.
* testsuite/gas/mips/mips16e2-mt-err.d: New test.
* testsuite/gas/mips/mips16e2-mt-err.l: New stderr output.
* testsuite/gas/mips/mips16e2-mt-err.s: New test source.
* testsuite/gas/mips/mips.exp: Run the new test.
This commit is contained in:
parent
3df5cd1394
commit
92cebb3dbe
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@ -1,3 +1,12 @@
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2017-06-29 Maciej W. Rozycki <macro@imgtec.com>
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* config/tc-mips.c (mips_set_ase): Clear the ASE_MIPS16E2_MT
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flag before recalculating.
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* testsuite/gas/mips/mips16e2-mt-err.d: New test.
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* testsuite/gas/mips/mips16e2-mt-err.l: New stderr output.
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* testsuite/gas/mips/mips16e2-mt-err.s: New test source.
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* testsuite/gas/mips/mips.exp: Run the new test.
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2017-06-28 Tamar Christina <tamar.christina@arm.com>
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* config/tc-aarch64.c (aarch64_reg_parse_32_64): Accept 4B.
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@ -2130,6 +2130,11 @@ mips_set_ase (const struct mips_ase *ase, struct mips_set_options *opts,
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mask = mips_ase_mask (ase->flags);
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opts->ase &= ~mask;
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/* Clear combination ASE flags, which need to be recalculated based on
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updated regular ASE settings. */
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opts->ase &= ~ASE_MIPS16E2_MT;
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if (enabled_p)
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opts->ase |= ase->flags;
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@ -1403,6 +1403,7 @@ if { [istarget mips*-*-vxworks*] } {
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run_dump_test "mips16e-jrc"
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run_dump_test "mips16e2-lui"
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run_dump_test "mips16e2-mt-err"
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run_dump_test "mips16e2-copy"
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run_dump_test "mips16e2-copy-err"
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@ -0,0 +1,3 @@
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#name: MIPS16e2 MT ASE instruction errors
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#as: -32 -mips16 -mips32r2 -mmips16e2 -mmt
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#error-output: mips16e2-mt-err.l
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@ -0,0 +1,3 @@
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.*: Assembler messages:
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.*:8: Error: opcode not supported on this processor: mips32r2 \(mips32r2\) `dvpe'
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.*:12: Error: opcode not supported on this processor: mips32r2 \(mips32r2\) `dvpe'
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@ -0,0 +1,14 @@
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# Verify that switching off either `mips16e2' or `mt' causes an assembly
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# error with a MIPS16e2 MT ASE instruction, which requires both at a time.
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.text
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foo:
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evpe
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.set nomips16e2
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dvpe
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.set mips16e2
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evpe
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.set nomt
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dvpe
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.set mt
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evpe
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