[sim/rx]
* README.txt: New. * config.h (CYCLE_ACCURATE, CYCLE_STATS): New. * configure.in (--enable-cycle-accurate, --enable-cycle-stats): New. Default to enabled. * configure: Regenerate. * cpu.h (regs_type): Add cycle tracking info. (reset_pipeline_stats): Declare. (halt_pipeline_stats): Declare. (pipeline_stats): Declare. * main.c (done): Call pipeline_stats(). * mem.h (rx_mem_ptr): Moved to here ... * mem.c (mem_ptr): ... from here. Rename throughout. (mem_put_byte): Move LEDs to Port A. Add Port B to control cycle statistics. Move UART to SCI4. (mem_put_hi): Add TPU 1-2. TPU 1 and 2 count CPU cycles. * reg.c (init_regs): Set Rt reg to -1 (no reg). * rx.c: Add cycle counting and statistics throughout. (rx_get_byte): Optimize for speed. (decode_opcode): Likewise. (reset_pipeline_stats): New. (halt_pipeline_stats): New. (pipeline_stats): New. * trace.c (sim_disasm_one): Print cycle count. [include/opcode] * rx.h (RX_Opcode_ID): Add nop2 and nop3 for statistics.
This commit is contained in:
DJ Delorie
parent
d61e002c14
commit
933786524e
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@ -1,3 +1,7 @@
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2010-07-27 DJ Delorie <dj@redhat.com>
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* rx.h (RX_Opcode_ID): Add nop2 and nop3 for statistics.
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2010-07-23 Naveen.H.S <naveen.S@kpitcummins.com>
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Ina Pandit <ina.pandit@kpitcummins.com>
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@ -57,7 +57,6 @@ typedef enum
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RXO_movbir, /* [s,s2] = d (signed) */
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RXO_pushm, /* s..s2 */
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RXO_popm, /* s..s2 */
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RXO_pusha, /* &s */
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RXO_xchg, /* s <-> d */
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RXO_stcc, /* d = s if cond(s2) */
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RXO_rtsd, /* rtsd, 1=imm, 2-0 = reg if reg type */
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@ -98,6 +97,8 @@ typedef enum
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RXO_jsrrel, /* pc += d */
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RXO_rts,
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RXO_nop,
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RXO_nop2,
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RXO_nop3,
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RXO_scmpu,
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RXO_smovu,
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@ -1,3 +1,30 @@
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2010-07-27 DJ Delorie <dj@redhat.com>
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* README.txt: New.
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* config.h (CYCLE_ACCURATE, CYCLE_STATS): New.
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* configure.in (--enable-cycle-accurate, --enable-cycle-stats):
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New. Default to enabled.
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* configure: Regenerate.
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* cpu.h (regs_type): Add cycle tracking info.
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(reset_pipeline_stats): Declare.
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(halt_pipeline_stats): Declare.
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(pipeline_stats): Declare.
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* main.c (done): Call pipeline_stats().
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* mem.h (rx_mem_ptr): Moved to here ...
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* mem.c (mem_ptr): ... from here. Rename throughout.
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(mem_put_byte): Move LEDs to Port A. Add Port B to control cycle
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statistics. Move UART to SCI4.
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(mem_put_hi): Add TPU 1-2. TPU 1 and 2 count CPU cycles.
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* reg.c (init_regs): Set Rt reg to -1 (no reg).
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* rx.c: Add cycle counting and statistics throughout.
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(rx_get_byte): Optimize for speed.
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(decode_opcode): Likewise.
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(reset_pipeline_stats): New.
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(halt_pipeline_stats): New.
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(pipeline_stats): New.
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* trace.c (sim_disasm_one): Print cycle count.
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2010-07-07 Kevin Buettner <kevinb@redhat.com>
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* gdb-if.c (sim_store_register): Add case for sim_rx_acc_regnum.
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@ -0,0 +1,121 @@
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The RX simulator offers two rx-specific configure options:
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--enable-cycle-accurate (default)
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--disable-cycle-accurate
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If enabled, the simulator will keep track of how many cycles each
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instruction takes. While not 100% accurate, it is very close,
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including modelling fetch stalls and register latency.
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--enable-cycle-stats (default)
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--disable-cycle-stats
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If enabled, specifying "-v" twice on the simulator command line causes
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the simulator to print statistics on how much time was used by each
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type of opcode, and what pairs of opcodes tend to happen most
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frequently, as well as how many times various pipeline stalls
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happened.
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The RX simulator offers many command line options:
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-v - verbose output. This prints some information about where the
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program is being loaded and its starting address, as well as
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information about how much memory was used and how many instructions
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were executed during the run. If specified twice, pipeline and cycle
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information are added to the report.
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-d - disassemble output. Each instruction executed is printed.
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-t - trace output. Causes a *lot* of printed information about what
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every instruction is doing, from math results down to register
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changes.
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--ignore-*
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--warn-*
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--error-*
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The RX simulator can detect certain types of memory corruption, and
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either ignore them, warn the user about them, or error and exit.
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Note that valid GCC code may trigger some of these, for example,
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writing a bitfield involves reading the existing value, which may
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not have been set yet. The options for * are:
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null-deref - memory access to address zero. You must modify your
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linker script to avoid putting anything at location zero, of
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course.
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unwritten-pages - attempts to read a page of memory (see below)
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before it is written. This is much faster than the next option.
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unwritten-bytes - attempts to read individual bytes before they're
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written.
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corrupt-stack - On return from a subroutine, the memory location
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where $pc was stored is checked to see if anything other than
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$pc had been written to it most recently.
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-i -w -e - these three options change the settings for all of the
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above. For example, "-i" tells the simulator to ignore all memory
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corruption.
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-E - end of options. Any remaining options (after the program name)
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are considered to be options for the simulated program, although
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such functionality is not supported.
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The RX simulator simulates a small number of peripherals, mostly in
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order to provide I/O capabilities for testing and such. The supported
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peripherals, and their limitations, are documented here.
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Memory
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Memory for the simulator is stored in a hierarchical tree, much like
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the i386's page directory and page tables. The simulator can allocate
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memory to individual pages as needed, allowing the simulated program
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to act as if it had a full 4 Gb of RAM at its disposal, without
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actually allocating more memory from the host operating system than
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the simulated program actually uses. Note that for each page of
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memory, there's a corresponding page of memory *types* (for tracking
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memory corruption). Memory is initially filled with all zeros.
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GPIO Port A
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PA.DR is configured as an output-only port (regardless of PA.DDR).
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When written to, a row of colored @ and * symbols are printed,
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reflecting a row of eight LEDs being either on or off.
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GPIO Port B
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PB.DR controls the pipeline statistics. Writing a 0 to PB.DR disables
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statistics gathering. Writing a non-0 to PB.DR resets all counters
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and enables (even if already enabled) statistics gathering. The
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simulator starts with statistics enabled, so writing to PB.DR is not
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needed if you want statistics on the entire program's run.
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SCI4
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SCI4.TDR is connected to the simulator's stdout. Any byte written to
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SCI4.TDR is written to stdout. If the simulated program writes the
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bytes 3, 3, and N in sequence, the simulator exits with an exit value
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of N.
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SCI4.SSR always returns "transmitter empty".
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TPU1.TCNT
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TPU2.TCNT
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TPU1 and TPU2 are configured as a chained 32-bit counter which counts
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machine cycles. It always runs at "ICLK speed", regardless of the
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clock control settings. Writing to either of these 16-bit registers
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zeros the counter, regardless of the value written. Reading from
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these registers returns the elapsed cycle count, with TPU1 holding the
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most significant word and TPU2 holding the least significant word.
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Note that, much like the hardware, these values may (TPU2.CNT *will*)
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change between reads, so you must read TPU1.CNT, then TPU2.CNT, and
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then TPU1.CNT again, and only trust the values if both reads of
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TPU1.CNT were the same.
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@ -105,3 +105,9 @@
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/* Define to 1 if you have the ANSI C header files. */
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#undef STDC_HEADERS
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/* --enable-cycle-accurate */
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#undef CYCLE_ACCURATE
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/* --enable-cycle-stats */
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#undef CYCLE_STATS
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File diff suppressed because it is too large
Load Diff
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@ -25,6 +25,36 @@ AC_CHECK_HEADERS(getopt.h)
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sinclude(../common/aclocal.m4)
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AC_ARG_ENABLE(cycle-accurate,
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[ --disable-cycle-accurate ],
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[case "${enableval}" in
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yes | no) ;;
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*) AC_MSG_ERROR(bad value ${enableval} given for --enable-cycle-accurate option) ;;
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esac])
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AC_ARG_ENABLE(cycle-stats,
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[ --disable-cycle-stats ],
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[case "${enableval}" in
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yes | no) ;;
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*) AC_MSG_ERROR(bad value ${enableval} given for --enable-cycle-stats option) ;;
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esac])
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echo enable_cycle_accurate is $enable_cycle_accurate
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echo enable_cycle_stats is $enable_cycle_stats
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if test "x${enable_cycle_accurate}" != xno; then
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AC_DEFINE([CYCLE_ACCURATE])
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if test "x${enable_cycle_stats}" != xno; then
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AC_DEFINE([CYCLE_STATS])
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fi
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else
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if test "x${enable_cycle_stats}" != xno; then
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AC_ERROR([cycle-stats not available without cycle-accurate])
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fi
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fi
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# Bugs in autoconf 2.59 break the call to SIM_AC_COMMON, hack around
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# it by inlining the macro's contents.
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sinclude(../common/common.m4)
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19
sim/rx/cpu.h
19
sim/rx/cpu.h
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@ -76,8 +76,24 @@ typedef struct
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SI r_temp;
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DI r_acc;
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#ifdef CYCLE_ACCURATE
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/* If set, RTS/RTSD take 2 fewer cycles. */
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char fast_return;
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SI link_register;
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unsigned long long cycle_count;
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/* Bits saying what kind of memory operands the previous insn had. */
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int m2m;
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/* Target register for load. */
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int rt;
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#endif
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} regs_type;
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#define M2M_SRC 0x01
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#define M2M_DST 0x02
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#define M2M_BOTH 0x03
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#define sp 0
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#define psw 16
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#define pc 17
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@ -219,6 +235,9 @@ extern unsigned int heaptop;
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extern unsigned int heapbottom;
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extern int decode_opcode (void);
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extern void reset_pipeline_stats (void);
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extern void halt_pipeline_stats (void);
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extern void pipeline_stats (void);
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extern void trace_register_changes ();
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extern void generate_access_exception (void);
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@ -82,6 +82,8 @@ done (int exit_code)
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printf ("insns: %14s\n", comma (rx_cycles));
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else
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printf ("insns: %u\n", rx_cycles);
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pipeline_stats ();
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}
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exit (exit_code);
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}
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156
sim/rx/mem.c
156
sim/rx/mem.c
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@ -25,6 +25,7 @@ along with this program. If not, see <http://www.gnu.org/licenses/>. */
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1. */
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#define RDCHECK 0
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#include "config.h"
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#include <stdio.h>
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#include <stdlib.h>
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#include <string.h>
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@ -37,7 +38,7 @@ along with this program. If not, see <http://www.gnu.org/licenses/>. */
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#define L1_BITS (10)
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#define L2_BITS (10)
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#define OFF_BITS (12)
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#define OFF_BITS PAGE_BITS
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#define L1_LEN (1 << L1_BITS)
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#define L2_LEN (1 << L2_BITS)
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@ -70,15 +71,8 @@ init_mem (void)
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memset (mem_counters, 0, sizeof (mem_counters));
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}
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enum mem_ptr_action
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{
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MPA_WRITING,
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MPA_READING,
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MPA_CONTENT_TYPE
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};
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static unsigned char *
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mem_ptr (unsigned long address, enum mem_ptr_action action)
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unsigned char *
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rx_mem_ptr (unsigned long address, enum mem_ptr_action action)
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{
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int pt1 = (address >> (L2_BITS + OFF_BITS)) & ((1 << L1_BITS) - 1);
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int pt2 = (address >> OFF_BITS) & ((1 << L2_BITS) - 1);
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@ -240,7 +234,7 @@ e ()
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static char
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mtypec (int address)
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{
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unsigned char *cp = mem_ptr (address, MPA_CONTENT_TYPE);
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unsigned char *cp = rx_mem_ptr (address, MPA_CONTENT_TYPE);
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return "udp"[*cp];
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}
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@ -254,48 +248,75 @@ mem_put_byte (unsigned int address, unsigned char value)
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if (trace)
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tc = mtypec (address);
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m = mem_ptr (address, MPA_WRITING);
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m = rx_mem_ptr (address, MPA_WRITING);
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if (trace)
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printf (" %02x%c", value, tc);
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*m = value;
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switch (address)
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{
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case 0x00e1:
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{
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case 0x0008c02a: /* PA.DR */
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{
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static int old_led = -1;
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static char *led_on[] =
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{ "\033[31m O ", "\033[32m O ", "\033[34m O " };
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static char *led_off[] = { "\033[0m · ", "\033[0m · ", "\033[0m · " };
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int red_on = 0;
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int i;
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if (old_led != value)
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{
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fputs (" ", stdout);
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for (i = 0; i < 3; i++)
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fputs (" ", stdout);
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for (i = 0; i < 8; i++)
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if (value & (1 << i))
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fputs (led_off[i], stdout);
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{
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if (! red_on)
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{
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fputs ("\033[31m", stdout);
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red_on = 1;
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}
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fputs (" @", stdout);
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}
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else
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fputs (led_on[i], stdout);
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fputs ("\033[0m\r", stdout);
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{
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if (red_on)
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{
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fputs ("\033[0m", stdout);
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red_on = 0;
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}
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fputs (" *", stdout);
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}
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if (red_on)
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fputs ("\033[0m", stdout);
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fputs ("\r", stdout);
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fflush (stdout);
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old_led = value;
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}
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}
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break;
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case 0x3aa: /* uart1tx */
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#ifdef CYCLE_STATS
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case 0x0008c02b: /* PB.DR */
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{
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if (value == 0)
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halt_pipeline_stats ();
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else
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reset_pipeline_stats ();
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}
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#endif
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case 0x00088263: /* SCI4.TDR */
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{
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static int pending_exit = 0;
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if (value == 0)
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if (pending_exit == 2)
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{
|
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if (pending_exit)
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{
|
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step_result = RX_MAKE_EXITED(value);
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return;
|
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}
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pending_exit = 1;
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step_result = RX_MAKE_EXITED(value);
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longjmp (decode_jmp_buf, 1);
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}
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else if (value == 3)
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pending_exit ++;
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else
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putchar(value);
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pending_exit = 0;
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putchar(value);
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}
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break;
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|
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@ -314,19 +335,33 @@ mem_put_qi (int address, unsigned char value)
|
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COUNT (1, 1);
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}
|
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|
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static int tpu_base;
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|
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void
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mem_put_hi (int address, unsigned short value)
|
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{
|
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S ("<=");
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if (rx_big_endian)
|
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switch (address)
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{
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mem_put_byte (address, value >> 8);
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mem_put_byte (address + 1, value & 0xff);
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}
|
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else
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{
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mem_put_byte (address, value & 0xff);
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mem_put_byte (address + 1, value >> 8);
|
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#ifdef CYCLE_ACCURATE
|
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case 0x00088126: /* TPU1.TCNT */
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tpu_base = regs.cycle_count;
|
||||
break;
|
||||
case 0x00088136: /* TPU2.TCNT */
|
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tpu_base = regs.cycle_count;
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break;
|
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#endif
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default:
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if (rx_big_endian)
|
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{
|
||||
mem_put_byte (address, value >> 8);
|
||||
mem_put_byte (address + 1, value & 0xff);
|
||||
}
|
||||
else
|
||||
{
|
||||
mem_put_byte (address, value & 0xff);
|
||||
mem_put_byte (address + 1, value >> 8);
|
||||
}
|
||||
}
|
||||
E ();
|
||||
COUNT (1, 2);
|
||||
|
|
@ -388,7 +423,7 @@ mem_put_blk (int address, void *bufptr, int nbytes)
|
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unsigned char
|
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mem_get_pc (int address)
|
||||
{
|
||||
unsigned char *m = mem_ptr (address, MPA_READING);
|
||||
unsigned char *m = rx_mem_ptr (address, MPA_READING);
|
||||
COUNT (0, 0);
|
||||
return *m;
|
||||
}
|
||||
|
|
@ -399,12 +434,12 @@ mem_get_byte (unsigned int address)
|
|||
unsigned char *m;
|
||||
|
||||
S ("=>");
|
||||
m = mem_ptr (address, MPA_READING);
|
||||
m = rx_mem_ptr (address, MPA_READING);
|
||||
switch (address)
|
||||
{
|
||||
case 0x3ad: /* uart1c1 */
|
||||
case 0x00088264: /* SCI4.SSR */
|
||||
E();
|
||||
return 2; /* transmitter empty */
|
||||
return 0x04; /* transmitter empty */
|
||||
break;
|
||||
default:
|
||||
if (trace)
|
||||
|
|
@ -433,15 +468,28 @@ mem_get_hi (int address)
|
|||
{
|
||||
unsigned short rv;
|
||||
S ("=>");
|
||||
if (rx_big_endian)
|
||||
switch (address)
|
||||
{
|
||||
rv = mem_get_byte (address) << 8;
|
||||
rv |= mem_get_byte (address + 1);
|
||||
}
|
||||
else
|
||||
{
|
||||
rv = mem_get_byte (address);
|
||||
rv |= mem_get_byte (address + 1) << 8;
|
||||
#ifdef CYCLE_ACCURATE
|
||||
case 0x00088126: /* TPU1.TCNT */
|
||||
rv = (regs.cycle_count - tpu_base) >> 16;
|
||||
break;
|
||||
case 0x00088136: /* TPU2.TCNT */
|
||||
rv = (regs.cycle_count - tpu_base) >> 0;
|
||||
break;
|
||||
#endif
|
||||
|
||||
default:
|
||||
if (rx_big_endian)
|
||||
{
|
||||
rv = mem_get_byte (address) << 8;
|
||||
rv |= mem_get_byte (address + 1);
|
||||
}
|
||||
else
|
||||
{
|
||||
rv = mem_get_byte (address);
|
||||
rv |= mem_get_byte (address + 1) << 8;
|
||||
}
|
||||
}
|
||||
COUNT (0, 2);
|
||||
E ();
|
||||
|
|
@ -520,7 +568,7 @@ sign_ext (int v, int bits)
|
|||
void
|
||||
mem_set_content_type (int address, enum mem_content_type type)
|
||||
{
|
||||
unsigned char *mt = mem_ptr (address, MPA_CONTENT_TYPE);
|
||||
unsigned char *mt = rx_mem_ptr (address, MPA_CONTENT_TYPE);
|
||||
*mt = type;
|
||||
}
|
||||
|
||||
|
|
@ -537,7 +585,7 @@ mem_set_content_range (int start_address, int end_address, enum mem_content_type
|
|||
if (sz + ofs > L1_LEN)
|
||||
sz = L1_LEN - ofs;
|
||||
|
||||
mt = mem_ptr (start_address, MPA_CONTENT_TYPE);
|
||||
mt = rx_mem_ptr (start_address, MPA_CONTENT_TYPE);
|
||||
memset (mt, type, sz);
|
||||
|
||||
start_address += sz;
|
||||
|
|
@ -547,6 +595,6 @@ mem_set_content_range (int start_address, int end_address, enum mem_content_type
|
|||
enum mem_content_type
|
||||
mem_get_content_type (int address)
|
||||
{
|
||||
unsigned char *mt = mem_ptr (address, MPA_CONTENT_TYPE);
|
||||
unsigned char *mt = rx_mem_ptr (address, MPA_CONTENT_TYPE);
|
||||
return *mt;
|
||||
}
|
||||
|
|
|
|||
15
sim/rx/mem.h
15
sim/rx/mem.h
|
|
@ -25,10 +25,25 @@ enum mem_content_type {
|
|||
MC_NUM_TYPES
|
||||
};
|
||||
|
||||
enum mem_ptr_action
|
||||
{
|
||||
MPA_WRITING,
|
||||
MPA_READING,
|
||||
MPA_CONTENT_TYPE
|
||||
};
|
||||
|
||||
void init_mem (void);
|
||||
void mem_usage_stats (void);
|
||||
unsigned long mem_usage_cycles (void);
|
||||
|
||||
/* rx_mem_ptr returns a pointer which is valid as long as the address
|
||||
requested remains within the same page. */
|
||||
#define PAGE_BITS 12
|
||||
#define PAGE_SIZE (1 << PAGE_BITS)
|
||||
#define NONPAGE_MASK (~(PAGE_SIZE-1))
|
||||
|
||||
unsigned char *rx_mem_ptr (unsigned long address, enum mem_ptr_action action);
|
||||
|
||||
void mem_put_qi (int address, unsigned char value);
|
||||
void mem_put_hi (int address, unsigned short value);
|
||||
void mem_put_psi (int address, unsigned long value);
|
||||
|
|
|
|||
|
|
@ -19,6 +19,7 @@
|
|||
along with this program. If not, see <http://www.gnu.org/licenses/>. */
|
||||
|
||||
|
||||
#include "config.h"
|
||||
#include <stdio.h>
|
||||
#include <stdlib.h>
|
||||
#include <string.h>
|
||||
|
|
@ -67,6 +68,11 @@ init_regs (void)
|
|||
{
|
||||
memset (®s, 0, sizeof (regs));
|
||||
memset (&oldregs, 0, sizeof (oldregs));
|
||||
|
||||
#ifdef CYCLE_ACCURATE
|
||||
regs.rt = -1;
|
||||
oldregs.rt = -1;
|
||||
#endif
|
||||
}
|
||||
|
||||
static unsigned int
|
||||
|
|
|
|||
825
sim/rx/rx.c
825
sim/rx/rx.c
File diff suppressed because it is too large
Load Diff
|
|
@ -19,6 +19,7 @@ You should have received a copy of the GNU General Public License
|
|||
along with this program. If not, see <http://www.gnu.org/licenses/>. */
|
||||
|
||||
|
||||
#include "config.h"
|
||||
#include <stdio.h>
|
||||
#include <stdarg.h>
|
||||
#include <string.h>
|
||||
|
|
@ -321,7 +322,13 @@ sim_disasm_one (void)
|
|||
}
|
||||
|
||||
opbuf[0] = 0;
|
||||
printf ("\033[33m%06x: ", mypc);
|
||||
#ifdef CYCLE_ACCURATE
|
||||
printf ("\033[33m %04u %06x: ", (int)(regs.cycle_count % 10000), mypc);
|
||||
#else
|
||||
printf ("\033[33m %06x: ", mypc);
|
||||
|
||||
#endif
|
||||
|
||||
max = print_insn_rx (mypc, & info);
|
||||
|
||||
for (i = 0; i < max; i++)
|
||||
|
|
|
|||
Loading…
Reference in New Issue